cpu.h revision 1.45
1 /* $NetBSD: cpu.h,v 1.45 2007/08/04 09:49:53 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. All rights reserved. 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 36 */ 37 38 /* 39 * SH3/SH4 support. 40 * 41 * T.Horiuchi Brains Corp. 5/22/98 42 */ 43 44 #ifndef _SH3_CPU_H_ 45 #define _SH3_CPU_H_ 46 47 #if defined(_KERNEL_OPT) 48 #include "opt_lockdebug.h" 49 #endif 50 51 #include <sh3/psl.h> 52 #include <sh3/frame.h> 53 54 #ifdef _KERNEL 55 #include <sys/cpu_data.h> 56 struct cpu_info { 57 struct cpu_data ci_data; /* MI per-cpu data */ 58 cpuid_t ci_cpuid; 59 int ci_mtx_count; 60 int ci_mtx_oldspl; 61 }; 62 63 extern struct cpu_info cpu_info_store; 64 #define curcpu() (&cpu_info_store) 65 66 /* 67 * definitions of cpu-dependent requirements 68 * referenced in generic code 69 */ 70 #define cpu_number() 0 71 /* 72 * Can't swapout u-area, (__SWAP_BROKEN) 73 * since we use P1 converted address for trapframe. 74 */ 75 #define cpu_swapin(p) /* nothing */ 76 #define cpu_swapout(p) panic("cpu_swapout: can't get here"); 77 #define cpu_proc_fork(p1, p2) /* nothing */ 78 79 /* 80 * Arguments to hardclock and gatherstats encapsulate the previous 81 * machine state in an opaque clockframe. 82 */ 83 struct clockframe { 84 int spc; /* program counter at time of interrupt */ 85 int ssr; /* status register at time of interrupt */ 86 int ssp; /* stack pointer at time of interrupt */ 87 }; 88 89 #define CLKF_USERMODE(cf) (!KERNELMODE((cf)->ssr)) 90 #define CLKF_PC(cf) ((cf)->spc) 91 #define CLKF_INTR(cf) 0 /* XXX */ 92 93 /* 94 * This is used during profiling to integrate system time. It can safely 95 * assume that the process is resident. 96 */ 97 #define PROC_PC(p) \ 98 (((struct trapframe *)(p)->p_md.md_regs)->tf_spc) 99 100 /* 101 * Preempt the current process if in interrupt from user mode, 102 * or after the current trap/syscall if in system mode. 103 */ 104 #define cpu_need_resched(ci, flags) \ 105 do { \ 106 want_resched = 1; \ 107 if (curlwp != ci->ci_data.cpu_idlelwp) \ 108 aston(curlwp); \ 109 } while (/*CONSTCOND*/0) 110 111 /* 112 * MI code calls this with proper locking. 113 */ 114 #define cpu_did_resched() \ 115 do { \ 116 want_resched = 0; \ 117 } while (0) 118 119 120 /* 121 * Give a profiling tick to the current process when the user profiling 122 * buffer pages are invalid. On the MIPS, request an ast to send us 123 * through trap, marking the proc as needing a profiling tick. 124 */ 125 #define cpu_need_proftick(l) \ 126 do { \ 127 (l)->l_pflag |= LP_OWEUPC; \ 128 aston(l); \ 129 } while (/*CONSTCOND*/0) 130 131 /* 132 * Notify the current process (p) that it has a signal pending, 133 * process as soon as possible. 134 */ 135 #define cpu_signotify(l) aston(l) 136 137 #define aston(l) ((l)->l_md.md_astpending = 1) 138 139 extern int want_resched; /* need_resched() was called */ 140 141 /* 142 * We need a machine-independent name for this. 143 */ 144 #define DELAY(x) delay(x) 145 #endif /* _KERNEL */ 146 147 /* 148 * Logical address space of SH3/SH4 CPU. 149 */ 150 #define SH3_PHYS_MASK 0x1fffffff 151 152 #define SH3_P0SEG_BASE 0x00000000 /* TLB mapped, also U0SEG */ 153 #define SH3_P0SEG_END 0x7fffffff 154 #define SH3_P1SEG_BASE 0x80000000 /* pa == va */ 155 #define SH3_P1SEG_END 0x9fffffff 156 #define SH3_P2SEG_BASE 0xa0000000 /* pa == va, non-cacheable */ 157 #define SH3_P2SEG_END 0xbfffffff 158 #define SH3_P3SEG_BASE 0xc0000000 /* TLB mapped, kernel mode */ 159 #define SH3_P3SEG_END 0xdfffffff 160 #define SH3_P4SEG_BASE 0xe0000000 /* peripheral space */ 161 #define SH3_P4SEG_END 0xffffffff 162 163 #define SH3_P1SEG_TO_PHYS(x) ((uint32_t)(x) & SH3_PHYS_MASK) 164 #define SH3_P2SEG_TO_PHYS(x) ((uint32_t)(x) & SH3_PHYS_MASK) 165 #define SH3_PHYS_TO_P1SEG(x) ((uint32_t)(x) | SH3_P1SEG_BASE) 166 #define SH3_PHYS_TO_P2SEG(x) ((uint32_t)(x) | SH3_P2SEG_BASE) 167 #define SH3_P1SEG_TO_P2SEG(x) ((uint32_t)(x) | 0x20000000) 168 #define SH3_P2SEG_TO_P1SEG(x) ((uint32_t)(x) & ~0x20000000) 169 170 #ifndef __lint__ 171 172 /* switch from P1 to P2 */ 173 #define RUN_P2 do { \ 174 void *p; \ 175 p = &&P2; \ 176 goto *(void *)SH3_P1SEG_TO_P2SEG(p); \ 177 P2: (void)0; \ 178 } while (0) 179 180 /* switch from P2 to P1 */ 181 #define RUN_P1 do { \ 182 void *p; \ 183 p = &&P1; \ 184 __asm volatile("nop;nop;nop;nop;nop;nop;nop;nop"); \ 185 goto *(void *)SH3_P2SEG_TO_P1SEG(p); \ 186 P1: (void)0; \ 187 } while (0) 188 189 #else /* __lint__ */ 190 #define RUN_P2 do {} while (/* CONSTCOND */ 0) 191 #define RUN_P1 do {} while (/* CONSTCOND */ 0) 192 #endif 193 194 #if defined(SH4) 195 /* SH4 Processor Version Register */ 196 #define SH4_PVR_ADDR 0xff000030 /* P4 address */ 197 #define SH4_PVR (*(volatile uint32_t *) SH4_PVR_ADDR) 198 #define SH4_PRR_ADDR 0xff000044 /* P4 address */ 199 #define SH4_PRR (*(volatile uint32_t *) SH4_PRR_ADDR) 200 201 #define SH4_PVR_MASK 0xffffff00 202 #define SH4_PVR_SH7750 0x04020500 /* SH7750 */ 203 #define SH4_PVR_SH7750S 0x04020600 /* SH7750S */ 204 #define SH4_PVR_SH775xR 0x04050000 /* SH775xR */ 205 #define SH4_PVR_SH7751 0x04110000 /* SH7751 */ 206 207 #define SH4_PRR_MASK 0xfffffff0 208 #define SH4_PRR_7750R 0x00000100 /* SH7750R */ 209 #define SH4_PRR_7751R 0x00000110 /* SH7751R */ 210 #endif 211 212 /* 213 * pull in #defines for kinds of processors 214 */ 215 #include <machine/cputypes.h> 216 217 /* 218 * CTL_MACHDEP definitions. 219 */ 220 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 221 #define CPU_LOADANDRESET 2 /* load kernel image and reset */ 222 #define CPU_MAXID 3 /* number of valid machdep ids */ 223 224 #define CTL_MACHDEP_NAMES { \ 225 { 0, 0 }, \ 226 { "console_device", CTLTYPE_STRUCT }, \ 227 { "load_and_reset", CTLTYPE_INT }, \ 228 } 229 230 #ifdef _KERNEL 231 void sh_cpu_init(int, int); 232 void sh_startup(void); 233 void cpu_reset(void) __attribute__((__noreturn__)); /* soft reset */ 234 void _cpu_spin(uint32_t); /* for delay loop. */ 235 void delay(int); 236 struct pcb; 237 void savectx(struct pcb *); 238 void dumpsys(void); 239 #endif /* _KERNEL */ 240 #endif /* !_SH3_CPU_H_ */ 241
Indexes created Mon Sep 22 13:09:51 GMT 2025