cpu.h revision 1.46
1 /* $NetBSD: cpu.h,v 1.46 2007/10/01 21:26:03 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. All rights reserved. 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 36 */ 37 38 /* 39 * SH3/SH4 support. 40 * 41 * T.Horiuchi Brains Corp. 5/22/98 42 */ 43 44 #ifndef _SH3_CPU_H_ 45 #define _SH3_CPU_H_ 46 47 #if defined(_KERNEL_OPT) 48 #include "opt_lockdebug.h" 49 #endif 50 51 #include <sh3/psl.h> 52 #include <sh3/frame.h> 53 54 #ifdef _KERNEL 55 #include <sys/cpu_data.h> 56 struct cpu_info { 57 struct cpu_data ci_data; /* MI per-cpu data */ 58 cpuid_t ci_cpuid; 59 int ci_mtx_count; 60 int ci_mtx_oldspl; 61 int ci_want_resched; 62 }; 63 64 extern struct cpu_info cpu_info_store; 65 #define curcpu() (&cpu_info_store) 66 67 /* 68 * definitions of cpu-dependent requirements 69 * referenced in generic code 70 */ 71 #define cpu_number() 0 72 /* 73 * Can't swapout u-area, (__SWAP_BROKEN) 74 * since we use P1 converted address for trapframe. 75 */ 76 #define cpu_swapin(p) /* nothing */ 77 #define cpu_swapout(p) panic("cpu_swapout: can't get here"); 78 #define cpu_proc_fork(p1, p2) /* nothing */ 79 80 /* 81 * Arguments to hardclock and gatherstats encapsulate the previous 82 * machine state in an opaque clockframe. 83 */ 84 struct clockframe { 85 int spc; /* program counter at time of interrupt */ 86 int ssr; /* status register at time of interrupt */ 87 int ssp; /* stack pointer at time of interrupt */ 88 }; 89 90 #define CLKF_USERMODE(cf) (!KERNELMODE((cf)->ssr)) 91 #define CLKF_PC(cf) ((cf)->spc) 92 #define CLKF_INTR(cf) 0 /* XXX */ 93 94 /* 95 * This is used during profiling to integrate system time. It can safely 96 * assume that the process is resident. 97 */ 98 #define PROC_PC(p) \ 99 (((struct trapframe *)(p)->p_md.md_regs)->tf_spc) 100 101 /* 102 * Preempt the current process if in interrupt from user mode, 103 * or after the current trap/syscall if in system mode. 104 */ 105 #define cpu_need_resched(ci, flags) \ 106 do { \ 107 ci->ci_want_resched = 1; \ 108 if (curlwp != ci->ci_data.cpu_idlelwp) \ 109 aston(curlwp); \ 110 } while (/*CONSTCOND*/0) 111 112 /* 113 * Give a profiling tick to the current process when the user profiling 114 * buffer pages are invalid. On the MIPS, request an ast to send us 115 * through trap, marking the proc as needing a profiling tick. 116 */ 117 #define cpu_need_proftick(l) \ 118 do { \ 119 (l)->l_pflag |= LP_OWEUPC; \ 120 aston(l); \ 121 } while (/*CONSTCOND*/0) 122 123 /* 124 * Notify the current process (p) that it has a signal pending, 125 * process as soon as possible. 126 */ 127 #define cpu_signotify(l) aston(l) 128 129 #define aston(l) ((l)->l_md.md_astpending = 1) 130 131 /* 132 * We need a machine-independent name for this. 133 */ 134 #define DELAY(x) delay(x) 135 #endif /* _KERNEL */ 136 137 /* 138 * Logical address space of SH3/SH4 CPU. 139 */ 140 #define SH3_PHYS_MASK 0x1fffffff 141 142 #define SH3_P0SEG_BASE 0x00000000 /* TLB mapped, also U0SEG */ 143 #define SH3_P0SEG_END 0x7fffffff 144 #define SH3_P1SEG_BASE 0x80000000 /* pa == va */ 145 #define SH3_P1SEG_END 0x9fffffff 146 #define SH3_P2SEG_BASE 0xa0000000 /* pa == va, non-cacheable */ 147 #define SH3_P2SEG_END 0xbfffffff 148 #define SH3_P3SEG_BASE 0xc0000000 /* TLB mapped, kernel mode */ 149 #define SH3_P3SEG_END 0xdfffffff 150 #define SH3_P4SEG_BASE 0xe0000000 /* peripheral space */ 151 #define SH3_P4SEG_END 0xffffffff 152 153 #define SH3_P1SEG_TO_PHYS(x) ((uint32_t)(x) & SH3_PHYS_MASK) 154 #define SH3_P2SEG_TO_PHYS(x) ((uint32_t)(x) & SH3_PHYS_MASK) 155 #define SH3_PHYS_TO_P1SEG(x) ((uint32_t)(x) | SH3_P1SEG_BASE) 156 #define SH3_PHYS_TO_P2SEG(x) ((uint32_t)(x) | SH3_P2SEG_BASE) 157 #define SH3_P1SEG_TO_P2SEG(x) ((uint32_t)(x) | 0x20000000) 158 #define SH3_P2SEG_TO_P1SEG(x) ((uint32_t)(x) & ~0x20000000) 159 160 #ifndef __lint__ 161 162 /* switch from P1 to P2 */ 163 #define RUN_P2 do { \ 164 void *p; \ 165 p = &&P2; \ 166 goto *(void *)SH3_P1SEG_TO_P2SEG(p); \ 167 P2: (void)0; \ 168 } while (0) 169 170 /* switch from P2 to P1 */ 171 #define RUN_P1 do { \ 172 void *p; \ 173 p = &&P1; \ 174 __asm volatile("nop;nop;nop;nop;nop;nop;nop;nop"); \ 175 goto *(void *)SH3_P2SEG_TO_P1SEG(p); \ 176 P1: (void)0; \ 177 } while (0) 178 179 #else /* __lint__ */ 180 #define RUN_P2 do {} while (/* CONSTCOND */ 0) 181 #define RUN_P1 do {} while (/* CONSTCOND */ 0) 182 #endif 183 184 #if defined(SH4) 185 /* SH4 Processor Version Register */ 186 #define SH4_PVR_ADDR 0xff000030 /* P4 address */ 187 #define SH4_PVR (*(volatile uint32_t *) SH4_PVR_ADDR) 188 #define SH4_PRR_ADDR 0xff000044 /* P4 address */ 189 #define SH4_PRR (*(volatile uint32_t *) SH4_PRR_ADDR) 190 191 #define SH4_PVR_MASK 0xffffff00 192 #define SH4_PVR_SH7750 0x04020500 /* SH7750 */ 193 #define SH4_PVR_SH7750S 0x04020600 /* SH7750S */ 194 #define SH4_PVR_SH775xR 0x04050000 /* SH775xR */ 195 #define SH4_PVR_SH7751 0x04110000 /* SH7751 */ 196 197 #define SH4_PRR_MASK 0xfffffff0 198 #define SH4_PRR_7750R 0x00000100 /* SH7750R */ 199 #define SH4_PRR_7751R 0x00000110 /* SH7751R */ 200 #endif 201 202 /* 203 * pull in #defines for kinds of processors 204 */ 205 #include <machine/cputypes.h> 206 207 /* 208 * CTL_MACHDEP definitions. 209 */ 210 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 211 #define CPU_LOADANDRESET 2 /* load kernel image and reset */ 212 #define CPU_MAXID 3 /* number of valid machdep ids */ 213 214 #define CTL_MACHDEP_NAMES { \ 215 { 0, 0 }, \ 216 { "console_device", CTLTYPE_STRUCT }, \ 217 { "load_and_reset", CTLTYPE_INT }, \ 218 } 219 220 #ifdef _KERNEL 221 void sh_cpu_init(int, int); 222 void sh_startup(void); 223 void cpu_reset(void) __attribute__((__noreturn__)); /* soft reset */ 224 void _cpu_spin(uint32_t); /* for delay loop. */ 225 void delay(int); 226 struct pcb; 227 void savectx(struct pcb *); 228 void dumpsys(void); 229 #endif /* _KERNEL */ 230 #endif /* !_SH3_CPU_H_ */ 231
Indexes created Mon Sep 22 05:09:51 GMT 2025