cpu.h revision 1.49
1 /* $NetBSD: cpu.h,v 1.49 2007/12/14 00:58:37 uwe Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. All rights reserved. 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 36 */ 37 38 /* 39 * SH3/SH4 support. 40 * 41 * T.Horiuchi Brains Corp. 5/22/98 42 */ 43 44 #ifndef _SH3_CPU_H_ 45 #define _SH3_CPU_H_ 46 47 #if defined(_KERNEL_OPT) 48 #include "opt_lockdebug.h" 49 #endif 50 51 #include <sh3/psl.h> 52 #include <sh3/frame.h> 53 54 #ifdef _KERNEL 55 #include <sys/cpu_data.h> 56 struct cpu_info { 57 struct cpu_data ci_data; /* MI per-cpu data */ 58 cpuid_t ci_cpuid; 59 int ci_mtx_count; 60 int ci_mtx_oldspl; 61 int ci_want_resched; 62 int ci_idepth; 63 }; 64 65 extern struct cpu_info cpu_info_store; 66 #define curcpu() (&cpu_info_store) 67 68 /* 69 * definitions of cpu-dependent requirements 70 * referenced in generic code 71 */ 72 #define cpu_number() 0 73 /* 74 * Can't swapout u-area, (__SWAP_BROKEN) 75 * since we use P1 converted address for trapframe. 76 */ 77 #define cpu_swapin(p) /* nothing */ 78 #define cpu_swapout(p) panic("cpu_swapout: can't get here"); 79 #define cpu_proc_fork(p1, p2) /* nothing */ 80 81 /* 82 * Interrupt stack location. 83 */ 84 extern vaddr_t intstack, intfp, intsp; 85 86 /* 87 * Arguments to hardclock and gatherstats encapsulate the previous 88 * machine state in an opaque clockframe. 89 */ 90 struct clockframe { 91 int spc; /* program counter at time of interrupt */ 92 int ssr; /* status register at time of interrupt */ 93 int ssp; /* stack pointer at time of interrupt */ 94 }; 95 96 97 #define CLKF_USERMODE(cf) (!KERNELMODE((cf)->ssr)) 98 #define CLKF_PC(cf) ((cf)->spc) 99 #define CLKF_INTR(cf) ((vaddr_t)(cf)->ssp <= intsp) 100 101 /* 102 * This is used during profiling to integrate system time. It can safely 103 * assume that the process is resident. 104 */ 105 #define PROC_PC(p) \ 106 (((struct trapframe *)(p)->p_md.md_regs)->tf_spc) 107 108 /* 109 * Preempt the current process if in interrupt from user mode, 110 * or after the current trap/syscall if in system mode. 111 */ 112 #define cpu_need_resched(ci, flags) \ 113 do { \ 114 ci->ci_want_resched = 1; \ 115 if (curlwp != ci->ci_data.cpu_idlelwp) \ 116 aston(curlwp); \ 117 } while (/*CONSTCOND*/0) 118 119 /* 120 * Give a profiling tick to the current process when the user profiling 121 * buffer pages are invalid. On the MIPS, request an ast to send us 122 * through trap, marking the proc as needing a profiling tick. 123 */ 124 #define cpu_need_proftick(l) \ 125 do { \ 126 (l)->l_pflag |= LP_OWEUPC; \ 127 aston(l); \ 128 } while (/*CONSTCOND*/0) 129 130 /* 131 * Notify the current process (p) that it has a signal pending, 132 * process as soon as possible. 133 */ 134 #define cpu_signotify(l) aston(l) 135 136 #define aston(l) ((l)->l_md.md_astpending = 1) 137 138 /* 139 * We need a machine-independent name for this. 140 */ 141 #define DELAY(x) delay(x) 142 #endif /* _KERNEL */ 143 144 /* 145 * Logical address space of SH3/SH4 CPU. 146 */ 147 #define SH3_PHYS_MASK 0x1fffffff 148 149 #define SH3_P0SEG_BASE 0x00000000 /* TLB mapped, also U0SEG */ 150 #define SH3_P0SEG_END 0x7fffffff 151 #define SH3_P1SEG_BASE 0x80000000 /* pa == va */ 152 #define SH3_P1SEG_END 0x9fffffff 153 #define SH3_P2SEG_BASE 0xa0000000 /* pa == va, non-cacheable */ 154 #define SH3_P2SEG_END 0xbfffffff 155 #define SH3_P3SEG_BASE 0xc0000000 /* TLB mapped, kernel mode */ 156 #define SH3_P3SEG_END 0xdfffffff 157 #define SH3_P4SEG_BASE 0xe0000000 /* peripheral space */ 158 #define SH3_P4SEG_END 0xffffffff 159 160 #define SH3_P1SEG_TO_PHYS(x) ((uint32_t)(x) & SH3_PHYS_MASK) 161 #define SH3_P2SEG_TO_PHYS(x) ((uint32_t)(x) & SH3_PHYS_MASK) 162 #define SH3_PHYS_TO_P1SEG(x) ((uint32_t)(x) | SH3_P1SEG_BASE) 163 #define SH3_PHYS_TO_P2SEG(x) ((uint32_t)(x) | SH3_P2SEG_BASE) 164 #define SH3_P1SEG_TO_P2SEG(x) ((uint32_t)(x) | 0x20000000) 165 #define SH3_P2SEG_TO_P1SEG(x) ((uint32_t)(x) & ~0x20000000) 166 167 #ifndef __lint__ 168 169 /* switch from P1 to P2 */ 170 #define RUN_P2 do { \ 171 void *p; \ 172 p = &&P2; \ 173 goto *(void *)SH3_P1SEG_TO_P2SEG(p); \ 174 P2: (void)0; \ 175 } while (0) 176 177 /* switch from P2 to P1 */ 178 #define RUN_P1 do { \ 179 void *p; \ 180 p = &&P1; \ 181 __asm volatile("nop;nop;nop;nop;nop;nop;nop;nop"); \ 182 goto *(void *)SH3_P2SEG_TO_P1SEG(p); \ 183 P1: (void)0; \ 184 } while (0) 185 186 #else /* __lint__ */ 187 #define RUN_P2 do {} while (/* CONSTCOND */ 0) 188 #define RUN_P1 do {} while (/* CONSTCOND */ 0) 189 #endif 190 191 #if defined(SH4) 192 /* SH4 Processor Version Register */ 193 #define SH4_PVR_ADDR 0xff000030 /* P4 address */ 194 #define SH4_PVR (*(volatile uint32_t *) SH4_PVR_ADDR) 195 #define SH4_PRR_ADDR 0xff000044 /* P4 address */ 196 #define SH4_PRR (*(volatile uint32_t *) SH4_PRR_ADDR) 197 198 #define SH4_PVR_MASK 0xffffff00 199 #define SH4_PVR_SH7750 0x04020500 /* SH7750 */ 200 #define SH4_PVR_SH7750S 0x04020600 /* SH7750S */ 201 #define SH4_PVR_SH775xR 0x04050000 /* SH775xR */ 202 #define SH4_PVR_SH7751 0x04110000 /* SH7751 */ 203 204 #define SH4_PRR_MASK 0xfffffff0 205 #define SH4_PRR_7750R 0x00000100 /* SH7750R */ 206 #define SH4_PRR_7751R 0x00000110 /* SH7751R */ 207 #endif 208 209 /* 210 * pull in #defines for kinds of processors 211 */ 212 #include <machine/cputypes.h> 213 214 /* 215 * CTL_MACHDEP definitions. 216 */ 217 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 218 #define CPU_LOADANDRESET 2 /* load kernel image and reset */ 219 #define CPU_MAXID 3 /* number of valid machdep ids */ 220 221 #define CTL_MACHDEP_NAMES { \ 222 { 0, 0 }, \ 223 { "console_device", CTLTYPE_STRUCT }, \ 224 { "load_and_reset", CTLTYPE_INT }, \ 225 } 226 227 #ifdef _KERNEL 228 void sh_cpu_init(int, int); 229 void sh_startup(void); 230 void cpu_reset(void) __attribute__((__noreturn__)); /* soft reset */ 231 void _cpu_spin(uint32_t); /* for delay loop. */ 232 void delay(int); 233 struct pcb; 234 void savectx(struct pcb *); 235 void dumpsys(void); 236 #endif /* _KERNEL */ 237 #endif /* !_SH3_CPU_H_ */ 238
Indexes created Sun Sep 21 15:09:59 GMT 2025