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intr.h revision 1.20
      1  1.20  nonaka /*	$NetBSD: intr.h,v 1.20 2005/08/16 11:32:26 nonaka Exp $	*/
      2   1.1  itojun 
      3  1.16     uch /*-
      4  1.16     uch  * Copyright (c) 2002 The NetBSD Foundation, Inc.
      5  1.16     uch  * All rights reserved.
      6   1.1  itojun  *
      7   1.1  itojun  * Redistribution and use in source and binary forms, with or without
      8   1.1  itojun  * modification, are permitted provided that the following conditions
      9   1.1  itojun  * are met:
     10   1.1  itojun  * 1. Redistributions of source code must retain the above copyright
     11   1.1  itojun  *    notice, this list of conditions and the following disclaimer.
     12   1.1  itojun  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1  itojun  *    notice, this list of conditions and the following disclaimer in the
     14   1.1  itojun  *    documentation and/or other materials provided with the distribution.
     15   1.1  itojun  * 3. All advertising materials mentioning features or use of this software
     16   1.1  itojun  *    must display the following acknowledgement:
     17  1.16     uch  *        This product includes software developed by the NetBSD
     18  1.16     uch  *        Foundation, Inc. and its contributors.
     19  1.16     uch  * 4. Neither the name of The NetBSD Foundation nor the names of its
     20  1.16     uch  *    contributors may be used to endorse or promote products derived
     21  1.16     uch  *    from this software without specific prior written permission.
     22   1.1  itojun  *
     23  1.16     uch  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     24  1.16     uch  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25  1.16     uch  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26  1.16     uch  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     27  1.16     uch  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28  1.16     uch  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29  1.16     uch  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30  1.16     uch  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31  1.16     uch  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32  1.16     uch  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33  1.16     uch  * POSSIBILITY OF SUCH DAMAGE.
     34   1.1  itojun  */
     35   1.1  itojun 
     36   1.1  itojun #ifndef _SH3_INTR_H_
     37  1.16     uch #define	_SH3_INTR_H_
     38   1.1  itojun 
     39  1.16     uch #include <sys/device.h>
     40  1.16     uch #include <sys/lock.h>
     41  1.16     uch #include <sys/queue.h>
     42  1.15     uch #include <sh3/psl.h>
     43  1.14     uch 
     44   1.1  itojun /* Interrupt sharing types. */
     45  1.16     uch #define	IST_NONE		0	/* none */
     46  1.16     uch #define	IST_PULSE		1	/* pulsed */
     47  1.16     uch #define	IST_EDGE		2	/* edge-triggered */
     48  1.16     uch #define	IST_LEVEL		3	/* level-triggered */
     49  1.16     uch 
     50  1.16     uch /* Interrupt priority levels */
     51  1.16     uch #define	_IPL_N		15
     52  1.16     uch #define	_IPL_NSOFT	4
     53  1.16     uch 
     54  1.16     uch #define	IPL_NONE	0	/* nothing */
     55  1.16     uch #define	IPL_SOFT	1
     56  1.16     uch #define	IPL_SOFTCLOCK	2	/* timeouts */
     57  1.16     uch #define	IPL_SOFTNET	3	/* protocol stacks */
     58  1.16     uch #define	IPL_SOFTSERIAL	4	/* serial */
     59  1.16     uch 
     60  1.16     uch #define	IPL_SOFTNAMES {							\
     61  1.16     uch 	"misc",								\
     62  1.16     uch 	"clock",							\
     63  1.16     uch 	"net",								\
     64  1.16     uch 	"serial",							\
     65   1.1  itojun }
     66   1.1  itojun 
     67  1.16     uch struct intc_intrhand {
     68  1.16     uch 	int	(*ih_func)(void *);
     69  1.16     uch 	void	*ih_arg;
     70  1.16     uch 	int	ih_level;	/* SR.I[0:3] value */
     71  1.16     uch 	int	ih_evtcode;	/* INTEVT or INTEVT2(SH7709/SH7709A) */
     72  1.16     uch 	int	ih_idx;		/* evtcode -> intrhand mapping */
     73  1.16     uch };
     74  1.16     uch 
     75  1.17     uch #define	EVTCODE_TO_MAP_INDEX(x)		(((x) - 0x200) >> 5)
     76  1.17     uch #define	EVTCODE_TO_IH_INDEX(x)						\
     77  1.16     uch 	__intc_evtcode_to_ih[EVTCODE_TO_MAP_INDEX(x)]
     78  1.17     uch #define	EVTCODE_IH(x)	(&__intc_intrhand[EVTCODE_TO_IH_INDEX(x)])
     79  1.16     uch extern int8_t __intc_evtcode_to_ih[];
     80  1.16     uch extern struct intc_intrhand __intc_intrhand[];
     81  1.16     uch 
     82  1.16     uch void intc_init(void);
     83  1.16     uch void *intc_intr_establish(int, int, int, int (*)(void *), void *);
     84  1.16     uch void intc_intr_disestablish(void *);
     85  1.19     uwe void intc_intr_enable(int);
     86  1.19     uwe void intc_intr_disable(int);
     87  1.16     uch void intc_intr(int, int, int);
     88  1.16     uch 
     89  1.20  nonaka void intpri_intr_priority(int evtcode, int level);
     90  1.20  nonaka 
     91  1.16     uch /*
     92  1.16     uch  * software simulated interrupt
     93  1.16     uch  */
     94  1.16     uch struct sh_soft_intrhand {
     95  1.16     uch 	TAILQ_ENTRY(sh_soft_intrhand) sih_q;
     96  1.16     uch 	struct sh_soft_intr *sih_intrhead;
     97  1.16     uch 	void	(*sih_fn)(void *);
     98  1.16     uch 	void	*sih_arg;
     99  1.16     uch 	int	sih_pending;
    100  1.16     uch };
    101  1.16     uch 
    102  1.16     uch struct sh_soft_intr {
    103  1.16     uch 	TAILQ_HEAD(, sh_soft_intrhand) softintr_q;
    104  1.16     uch 	struct evcnt softintr_evcnt;
    105  1.16     uch 	struct simplelock softintr_slock;
    106  1.16     uch 	unsigned long softintr_ipl;
    107  1.16     uch };
    108  1.16     uch 
    109  1.16     uch #define	softintr_schedule(arg)						\
    110  1.16     uch do {									\
    111  1.16     uch 	struct sh_soft_intrhand *__sih = (arg);				\
    112  1.16     uch 	struct sh_soft_intr *__si = __sih->sih_intrhead;		\
    113  1.16     uch 	int __s;							\
    114  1.16     uch 									\
    115  1.16     uch 	__s = _cpu_intr_suspend();					\
    116  1.16     uch 	simple_lock(&__si->softintr_slock);				\
    117  1.16     uch 	if (__sih->sih_pending == 0) {					\
    118  1.16     uch 		TAILQ_INSERT_TAIL(&__si->softintr_q, __sih, sih_q);	\
    119  1.16     uch 		__sih->sih_pending = 1;					\
    120  1.16     uch 		setsoft(__si->softintr_ipl);				\
    121  1.16     uch 	}								\
    122  1.16     uch 	simple_unlock(&__si->softintr_slock);				\
    123  1.16     uch 	_cpu_intr_resume(__s);						\
    124  1.16     uch } while (/*CONSTCOND*/0)
    125  1.16     uch 
    126  1.16     uch void softintr_init(void);
    127  1.16     uch void *softintr_establish(int, void (*)(void *), void *);
    128  1.16     uch void softintr_disestablish(void *);
    129  1.16     uch void softintr_dispatch(int);
    130  1.16     uch void setsoft(int);
    131   1.1  itojun 
    132  1.16     uch /* XXX For legacy software interrupts. */
    133  1.16     uch extern struct sh_soft_intrhand *softnet_intrhand;
    134   1.1  itojun 
    135  1.16     uch #define	setsoftnet()	softintr_schedule(softnet_intrhand)
    136   1.1  itojun 
    137   1.1  itojun #endif /* !_SH3_INTR_H_ */
    138