mmu.h revision 1.3.2.3
1 1.3.2.3 nathanw /* $NetBSD: mmu.h,v 1.3.2.3 2002/06/20 03:40:52 nathanw Exp $ */ 2 1.1 uch 3 1.1 uch /*- 4 1.1 uch * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 1.1 uch * All rights reserved. 6 1.1 uch * 7 1.1 uch * This code is derived from software contributed to The NetBSD Foundation 8 1.1 uch * by UCHIYAMA Yasushi. 9 1.1 uch * 10 1.1 uch * Redistribution and use in source and binary forms, with or without 11 1.1 uch * modification, are permitted provided that the following conditions 12 1.1 uch * are met: 13 1.1 uch * 1. Redistributions of source code must retain the above copyright 14 1.1 uch * notice, this list of conditions and the following disclaimer. 15 1.1 uch * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 uch * notice, this list of conditions and the following disclaimer in the 17 1.1 uch * documentation and/or other materials provided with the distribution. 18 1.1 uch * 3. All advertising materials mentioning features or use of this software 19 1.1 uch * must display the following acknowledgement: 20 1.1 uch * This product includes software developed by the NetBSD 21 1.1 uch * Foundation, Inc. and its contributors. 22 1.1 uch * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.1 uch * contributors may be used to endorse or promote products derived 24 1.1 uch * from this software without specific prior written permission. 25 1.1 uch * 26 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.1 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.1 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.1 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.1 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.1 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.1 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.1 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.1 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.1 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.1 uch * POSSIBILITY OF SUCH DAMAGE. 37 1.1 uch */ 38 1.1 uch 39 1.1 uch #ifndef _SH3_MMU_H_ 40 1.3.2.3 nathanw #define _SH3_MMU_H_ 41 1.1 uch 42 1.1 uch /* 43 1.1 uch * Initialize routines. 44 1.3.2.3 nathanw * sh_mmu_init Assign function vector. Don't access hardware. 45 1.1 uch * Call as possible as first. 46 1.1 uch * sh_mmu_start Reset TLB entry, set default ASID, and start to 47 1.3.2.3 nathanw * translate address. 48 1.1 uch * Call after exception vector was installed. 49 1.1 uch * 50 1.1 uch * TLB access ops. 51 1.3.2.3 nathanw * sh_tlb_invalidate_addr invalidate TLB entris for given 52 1.1 uch * virtual addr with ASID. 53 1.1 uch * sh_tlb_invalidate_asid invalidate TLB entries for given ASID. 54 1.3.2.3 nathanw * sh_tlb_invalidate_all invalidate all non-wired TLB entries. 55 1.3.2.3 nathanw * sh_tlb_set_asid set ASID. 56 1.3.2.3 nathanw * sh_tlb_update load new PTE to TLB. 57 1.1 uch * 58 1.1 uch */ 59 1.1 uch 60 1.3.2.3 nathanw void sh_mmu_init(void); 61 1.3.2.3 nathanw void sh_mmu_information(void); 62 1.1 uch 63 1.1 uch extern void (*__sh_mmu_start)(void); 64 1.3.2.3 nathanw void sh3_mmu_start(void); 65 1.3.2.3 nathanw void sh4_mmu_start(void); 66 1.3.2.3 nathanw #define sh_mmu_start() (*__sh_mmu_start)() 67 1.1 uch 68 1.3.2.3 nathanw /* 69 1.3.2.3 nathanw * TLB access ops. 70 1.3.2.3 nathanw */ 71 1.1 uch extern void (*__sh_tlb_invalidate_addr)(int, vaddr_t); 72 1.1 uch extern void (*__sh_tlb_invalidate_asid)(int); 73 1.1 uch extern void (*__sh_tlb_invalidate_all)(void); 74 1.3.2.3 nathanw extern void (*__sh_tlb_update)(int, vaddr_t, u_int32_t); 75 1.3.2.3 nathanw void sh_tlb_set_asid(int); 76 1.3.2.3 nathanw void sh3_tlb_invalidate_addr(int, vaddr_t); 77 1.3.2.3 nathanw void sh3_tlb_invalidate_asid(int); 78 1.3.2.3 nathanw void sh3_tlb_invalidate_all(void); 79 1.3.2.3 nathanw void sh3_tlb_update(int, vaddr_t, u_int32_t); 80 1.3.2.3 nathanw void sh4_tlb_invalidate_addr(int, vaddr_t); 81 1.3.2.3 nathanw void sh4_tlb_invalidate_asid(int); 82 1.3.2.3 nathanw void sh4_tlb_invalidate_all(void); 83 1.3.2.3 nathanw void sh4_tlb_update(int, vaddr_t, u_int32_t); 84 1.1 uch 85 1.1 uch #if defined(SH3) && defined(SH4) 86 1.3.2.3 nathanw #define sh_tlb_invalidate_addr(a, va) (*__sh_tlb_invalidate_addr)(a, va) 87 1.3.2.3 nathanw #define sh_tlb_invalidate_asid(a) (*__sh_tlb_invalidate_asid)(a) 88 1.3.2.3 nathanw #define sh_tlb_invalidate_all() (*__sh_tlb_invalidate_all)() 89 1.3.2.3 nathanw #define sh_tlb_update(a, pte) (*__sh_tlb_update)(a, pte) 90 1.1 uch #elif defined(SH3) 91 1.3.2.3 nathanw #define sh_tlb_invalidate_addr(a, va) sh3_tlb_invalidate_addr(a, va) 92 1.3.2.3 nathanw #define sh_tlb_invalidate_asid(a) sh3_tlb_invalidate_asid(a) 93 1.3.2.3 nathanw #define sh_tlb_invalidate_all() sh3_tlb_invalidate_all() 94 1.3.2.3 nathanw #define sh_tlb_update(a, va, pte) sh3_tlb_update(a, va, pte) 95 1.1 uch #elif defined(SH4) 96 1.3.2.3 nathanw #define sh_tlb_invalidate_addr(a, va) sh4_tlb_invalidate_addr(a, va) 97 1.3.2.3 nathanw #define sh_tlb_invalidate_asid(a) sh4_tlb_invalidate_asid(a) 98 1.3.2.3 nathanw #define sh_tlb_invalidate_all() sh4_tlb_invalidate_all() 99 1.3.2.3 nathanw #define sh_tlb_update(a, va, pte) sh4_tlb_update(a, va, pte) 100 1.1 uch #endif 101 1.1 uch 102 1.1 uch #endif /* !_SH3_MMU_H_ */ 103
Indexes created Sun Oct 19 16:10:00 GMT 2025