mmu.h revision 1.5.28.1 1 /* $NetBSD: mmu.h,v 1.5.28.1 2006/06/21 14:55:31 yamt Exp $ */
2
3 /*-
4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #ifndef _SH3_MMU_H_
40 #define _SH3_MMU_H_
41
42 /*
43 * Initialize routines.
44 * sh_mmu_init Assign function vector. Don't access hardware.
45 * Call as early as possible.
46 * sh_mmu_start Reset TLB entry, set default ASID, and start to
47 * translate addresses.
48 * Call after exception vector was installed.
49 *
50 * TLB access ops.
51 * sh_tlb_invalidate_addr invalidate TLB entris for given
52 * virtual addr with ASID.
53 * sh_tlb_invalidate_asid invalidate TLB entries for given ASID.
54 * sh_tlb_invalidate_all invalidate all non-wired TLB entries.
55 * sh_tlb_set_asid set ASID.
56 * sh_tlb_update load new PTE to TLB.
57 *
58 */
59
60 void sh_mmu_init(void);
61 void sh_mmu_information(void);
62 void sh_tlb_set_asid(int);
63
64 #ifdef SH3
65 void sh3_mmu_start(void);
66 void sh3_tlb_invalidate_addr(int, vaddr_t);
67 void sh3_tlb_invalidate_asid(int);
68 void sh3_tlb_invalidate_all(void);
69 void sh3_tlb_update(int, vaddr_t, uint32_t);
70 #endif
71
72 #ifdef SH4
73 void sh4_mmu_start(void);
74 void sh4_tlb_invalidate_addr(int, vaddr_t);
75 void sh4_tlb_invalidate_asid(int);
76 void sh4_tlb_invalidate_all(void);
77 void sh4_tlb_update(int, vaddr_t, uint32_t);
78 #endif
79
80
81 #if defined(SH3) && defined(SH4)
82 extern uint32_t __sh_PTEH;
83
84 extern void (*__sh_mmu_start)(void);
85 extern void (*__sh_tlb_invalidate_addr)(int, vaddr_t);
86 extern void (*__sh_tlb_invalidate_asid)(int);
87 extern void (*__sh_tlb_invalidate_all)(void);
88 extern void (*__sh_tlb_update)(int, vaddr_t, uint32_t);
89
90 #define sh_mmu_start() (*__sh_mmu_start)()
91 #define sh_tlb_invalidate_addr(a, va) (*__sh_tlb_invalidate_addr)(a, va)
92 #define sh_tlb_invalidate_asid(a) (*__sh_tlb_invalidate_asid)(a)
93 #define sh_tlb_invalidate_all() (*__sh_tlb_invalidate_all)()
94 #define sh_tlb_update(a, va, pte) (*__sh_tlb_update)(a, va, pte)
95
96 #elif defined(SH3)
97
98 #define sh_mmu_start() sh3_mmu_start()
99 #define sh_tlb_invalidate_addr(a, va) sh3_tlb_invalidate_addr(a, va)
100 #define sh_tlb_invalidate_asid(a) sh3_tlb_invalidate_asid(a)
101 #define sh_tlb_invalidate_all() sh3_tlb_invalidate_all()
102 #define sh_tlb_update(a, va, pte) sh3_tlb_update(a, va, pte)
103
104 #elif defined(SH4)
105
106 #define sh_mmu_start() sh4_mmu_start()
107 #define sh_tlb_invalidate_addr(a, va) sh4_tlb_invalidate_addr(a, va)
108 #define sh_tlb_invalidate_asid(a) sh4_tlb_invalidate_asid(a)
109 #define sh_tlb_invalidate_all() sh4_tlb_invalidate_all()
110 #define sh_tlb_update(a, va, pte) sh4_tlb_update(a, va, pte)
111
112 #endif
113
114 #endif /* !_SH3_MMU_H_ */
115