pmap.h revision 1.18 1 1.18 uch /* $NetBSD: pmap.h,v 1.18 2002/02/28 01:58:53 uch Exp $ */
2 1.1 itojun
3 1.1 itojun /*
4 1.2 tsubai * Copyright (c) 1997 Charles D. Cranor and Washington University.
5 1.1 itojun * All rights reserved.
6 1.1 itojun *
7 1.1 itojun * Redistribution and use in source and binary forms, with or without
8 1.1 itojun * modification, are permitted provided that the following conditions
9 1.1 itojun * are met:
10 1.1 itojun * 1. Redistributions of source code must retain the above copyright
11 1.1 itojun * notice, this list of conditions and the following disclaimer.
12 1.1 itojun * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 itojun * notice, this list of conditions and the following disclaimer in the
14 1.1 itojun * documentation and/or other materials provided with the distribution.
15 1.1 itojun * 3. All advertising materials mentioning features or use of this software
16 1.2 tsubai * must display the following acknowledgment:
17 1.2 tsubai * This product includes software developed by Charles D. Cranor and
18 1.2 tsubai * Washington University.
19 1.2 tsubai * 4. The name of the author may not be used to endorse or promote products
20 1.2 tsubai * derived from this software without specific prior written permission.
21 1.2 tsubai *
22 1.2 tsubai * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.2 tsubai * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.2 tsubai * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.2 tsubai * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.2 tsubai * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.2 tsubai * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.2 tsubai * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.2 tsubai * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.2 tsubai * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.2 tsubai * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.1 itojun */
33 1.1 itojun
34 1.1 itojun /*
35 1.2 tsubai * pmap.h: see pmap.c for the history of this pmap module.
36 1.2 tsubai */
37 1.2 tsubai
38 1.2 tsubai #ifndef _SH3_PMAP_H_
39 1.2 tsubai #define _SH3_PMAP_H_
40 1.2 tsubai
41 1.15 uch #include <sh3/cache.h>
42 1.2 tsubai #include <machine/cpufunc.h>
43 1.2 tsubai #include <machine/pte.h>
44 1.2 tsubai #include <uvm/uvm_object.h>
45 1.2 tsubai
46 1.2 tsubai /*
47 1.2 tsubai * see pte.h for a description of i386 MMU terminology and hardware
48 1.2 tsubai * interface.
49 1.2 tsubai *
50 1.2 tsubai * a pmap describes a processes' 4GB virtual address space. this
51 1.2 tsubai * virtual address space can be broken up into 1024 4MB regions which
52 1.2 tsubai * are described by PDEs in the PDP. the PDEs are defined as follows:
53 1.2 tsubai *
54 1.2 tsubai * (ranges are inclusive -> exclusive, just like vm_map_entry start/end)
55 1.2 tsubai * (the following assumes that KERNBASE is 0xf0000000)
56 1.2 tsubai *
57 1.2 tsubai * PDE#s VA range usage
58 1.2 tsubai * 0->959 0x0 -> 0xefc00000 user address space, note that the
59 1.2 tsubai * max user address is 0xefbfe000
60 1.2 tsubai * the final two pages in the last 4MB
61 1.2 tsubai * used to be reserved for the UAREA
62 1.2 tsubai * but now are no longer used
63 1.2 tsubai * 959 0xefc00000-> recursive mapping of PDP (used for
64 1.2 tsubai * 0xf0000000 linear mapping of PTPs)
65 1.2 tsubai * 960->1023 0xf0000000-> kernel address space (constant
66 1.2 tsubai * 0xffc00000 across all pmap's/processes)
67 1.2 tsubai * 1023 0xffc00000-> "alternate" recursive PDP mapping
68 1.2 tsubai * <end> (for other pmaps)
69 1.2 tsubai *
70 1.2 tsubai *
71 1.2 tsubai * note: a recursive PDP mapping provides a way to map all the PTEs for
72 1.2 tsubai * a 4GB address space into a linear chunk of virtual memory. in other
73 1.2 tsubai * words, the PTE for page 0 is the first int mapped into the 4MB recursive
74 1.2 tsubai * area. the PTE for page 1 is the second int. the very last int in the
75 1.2 tsubai * 4MB range is the PTE that maps VA 0xffffe000 (the last page in a 4GB
76 1.2 tsubai * address).
77 1.2 tsubai *
78 1.2 tsubai * all pmap's PD's must have the same values in slots 960->1023 so that
79 1.2 tsubai * the kernel is always mapped in every process. these values are loaded
80 1.2 tsubai * into the PD at pmap creation time.
81 1.1 itojun *
82 1.2 tsubai * at any one time only one pmap can be active on a processor. this is
83 1.2 tsubai * the pmap whose PDP is pointed to by processor register %cr3. this pmap
84 1.2 tsubai * will have all its PTEs mapped into memory at the recursive mapping
85 1.2 tsubai * point (slot #959 as show above). when the pmap code wants to find the
86 1.2 tsubai * PTE for a virtual address, all it has to do is the following:
87 1.2 tsubai *
88 1.2 tsubai * address of PTE = (959 * 4MB) + (VA / NBPG) * sizeof(pt_entry_t)
89 1.2 tsubai * = 0xefc00000 + (VA / 4096) * 4
90 1.2 tsubai *
91 1.2 tsubai * what happens if the pmap layer is asked to perform an operation
92 1.2 tsubai * on a pmap that is not the one which is currently active? in that
93 1.2 tsubai * case we take the PA of the PDP of non-active pmap and put it in
94 1.2 tsubai * slot 1023 of the active pmap. this causes the non-active pmap's
95 1.2 tsubai * PTEs to get mapped in the final 4MB of the 4GB address space
96 1.2 tsubai * (e.g. starting at 0xffc00000).
97 1.2 tsubai *
98 1.2 tsubai * the following figure shows the effects of the recursive PDP mapping:
99 1.2 tsubai *
100 1.2 tsubai * PDP (%cr3)
101 1.2 tsubai * +----+
102 1.2 tsubai * | 0| -> PTP#0 that maps VA 0x0 -> 0x400000
103 1.2 tsubai * | |
104 1.2 tsubai * | |
105 1.2 tsubai * | 959| -> points back to PDP (%cr3) mapping VA 0xefc00000 -> 0xf0000000
106 1.2 tsubai * | 960| -> first kernel PTP (maps 0xf0000000 -> 0xf0400000)
107 1.2 tsubai * | |
108 1.2 tsubai * |1023| -> points to alternate pmap's PDP (maps 0xffc00000 -> end)
109 1.2 tsubai * +----+
110 1.2 tsubai *
111 1.2 tsubai * note that the PDE#959 VA (0xefc00000) is defined as "PTE_BASE"
112 1.2 tsubai * note that the PDE#1023 VA (0xffc00000) is defined as "APTE_BASE"
113 1.2 tsubai *
114 1.2 tsubai * starting at VA 0xefc00000 the current active PDP (%cr3) acts as a
115 1.2 tsubai * PTP:
116 1.2 tsubai *
117 1.2 tsubai * PTP#959 == PDP(%cr3) => maps VA 0xefc00000 -> 0xf0000000
118 1.2 tsubai * +----+
119 1.2 tsubai * | 0| -> maps the contents of PTP#0 at VA 0xefc00000->0xefc01000
120 1.2 tsubai * | |
121 1.2 tsubai * | |
122 1.2 tsubai * | 959| -> maps contents of PTP#959 (the PDP) at VA 0xeffbf000
123 1.2 tsubai * | 960| -> maps contents of first kernel PTP
124 1.2 tsubai * | |
125 1.2 tsubai * |1023|
126 1.2 tsubai * +----+
127 1.2 tsubai *
128 1.2 tsubai * note that mapping of the PDP at PTP#959's VA (0xeffbf000) is
129 1.2 tsubai * defined as "PDP_BASE".... within that mapping there are two
130 1.2 tsubai * defines:
131 1.2 tsubai * "PDP_PDE" (0xeffbfefc) is the VA of the PDE in the PDP
132 1.2 tsubai * which points back to itself.
133 1.2 tsubai * "APDP_PDE" (0xeffbfffc) is the VA of the PDE in the PDP which
134 1.2 tsubai * establishes the recursive mapping of the alternate pmap.
135 1.2 tsubai * to set the alternate PDP, one just has to put the correct
136 1.2 tsubai * PA info in *APDP_PDE.
137 1.2 tsubai *
138 1.2 tsubai * note that in the APTE_BASE space, the APDP appears at VA
139 1.2 tsubai * "APDP_BASE" (0xfffff000).
140 1.2 tsubai */
141 1.2 tsubai
142 1.2 tsubai /*
143 1.2 tsubai * the following defines identify the slots used as described above.
144 1.1 itojun */
145 1.1 itojun
146 1.2 tsubai #define PDSLOT_PTE ((u_int)0x33f) /* PTDPTDI for recursive PDP map */
147 1.2 tsubai #define PDSLOT_KERN ((u_int)0x340) /* KPTDI start of kernel space */
148 1.2 tsubai #define PDSLOT_APTE ((u_int)0x37f) /* alternative recursive slot */
149 1.2 tsubai
150 1.2 tsubai /*
151 1.2 tsubai * the following defines give the virtual addresses of various MMU
152 1.2 tsubai * data structures:
153 1.2 tsubai * PTE_BASE and APTE_BASE: the base VA of the linear PTE mappings
154 1.2 tsubai * PTD_BASE and APTD_BASE: the base VA of the recursive mapping of the PTD
155 1.2 tsubai * PDP_PDE and APDP_PDE: the VA of the PDE that points back to the PDP/APDP
156 1.2 tsubai */
157 1.2 tsubai
158 1.2 tsubai #define PTE_BASE ((pt_entry_t *) (PDSLOT_PTE * NBPD) )
159 1.2 tsubai #define APTE_BASE ((pt_entry_t *) (PDSLOT_APTE * NBPD) )
160 1.2 tsubai #define PDP_BASE ((pd_entry_t *)(((char *)PTE_BASE) + (PDSLOT_PTE * NBPG)))
161 1.2 tsubai #define APDP_BASE ((pd_entry_t *)(((char *)APTE_BASE) + (PDSLOT_APTE * NBPG)))
162 1.2 tsubai #define PDP_PDE (PDP_BASE + PDSLOT_PTE)
163 1.2 tsubai #define APDP_PDE (PDP_BASE + PDSLOT_APTE)
164 1.1 itojun
165 1.2 tsubai /*
166 1.2 tsubai * XXXCDC: tmp xlate from old names:
167 1.2 tsubai * PTDPTDI -> PDSLOT_PTE
168 1.2 tsubai * KPTDI -> PDSLOT_KERN
169 1.2 tsubai * APTDPTDI -> PDSLOT_APTE
170 1.2 tsubai */
171 1.1 itojun
172 1.2 tsubai /*
173 1.2 tsubai * the follow define determines how many PTPs should be set up for the
174 1.2 tsubai * kernel by locore.s at boot time. this should be large enough to
175 1.2 tsubai * get the VM system running. once the VM system is running, the
176 1.2 tsubai * pmap module can add more PTPs to the kernel area on demand.
177 1.2 tsubai */
178 1.1 itojun
179 1.2 tsubai #ifndef NKPTP
180 1.2 tsubai #define NKPTP 8 /* 32MB to start */
181 1.2 tsubai #endif
182 1.2 tsubai #define NKPTP_MIN 8 /* smallest value we allow */
183 1.2 tsubai #define NKPTP_MAX 63 /* (1024 - (0xd0000000/NBPD) - 1) */
184 1.2 tsubai /* largest value (-1 for APTP space) */
185 1.1 itojun
186 1.1 itojun /*
187 1.2 tsubai * various address macros
188 1.2 tsubai *
189 1.2 tsubai * vtopte: return a pointer to the PTE mapping a VA
190 1.2 tsubai * kvtopte: same as above (takes a KVA, but doesn't matter with this pmap)
191 1.2 tsubai * ptetov: given a pointer to a PTE, return the VA that it maps
192 1.2 tsubai * vtophys: translate a VA to the PA mapped to it
193 1.2 tsubai *
194 1.2 tsubai * plus alternative versions of the above
195 1.1 itojun */
196 1.1 itojun
197 1.2 tsubai #define vtopte(VA) (PTE_BASE + sh3_btop(VA))
198 1.2 tsubai #define kvtopte(VA) vtopte(VA)
199 1.2 tsubai #define ptetov(PT) (sh3_ptob(PT - PTE_BASE))
200 1.2 tsubai #define avtopte(VA) (APTE_BASE + sh3_btop(VA))
201 1.2 tsubai #define ptetoav(PT) (sh3_ptob(PT - APTE_BASE))
202 1.2 tsubai #define avtophys(VA) ((*avtopte(VA) & PG_FRAME) | \
203 1.2 tsubai ((unsigned)(VA) & ~PG_FRAME))
204 1.2 tsubai
205 1.1 itojun /*
206 1.2 tsubai * pdei/ptei: generate index into PDP/PTP from a VA
207 1.1 itojun */
208 1.2 tsubai #define pdei(VA) (((VA) & PD_MASK) >> PDSHIFT)
209 1.2 tsubai #define ptei(VA) (((VA) & PT_MASK) >> PGSHIFT)
210 1.2 tsubai
211 1.1 itojun /*
212 1.2 tsubai * PTP macros:
213 1.2 tsubai * a PTP's index is the PD index of the PDE that points to it
214 1.2 tsubai * a PTP's offset is the byte-offset in the PTE space that this PTP is at
215 1.2 tsubai * a PTP's VA is the first VA mapped by that PTP
216 1.2 tsubai *
217 1.2 tsubai * note that NBPG == number of bytes in a PTP (4096 bytes == 1024 entries)
218 1.2 tsubai * NBPD == number of bytes a PTP can map (4MB)
219 1.1 itojun */
220 1.1 itojun
221 1.2 tsubai #define ptp_i2o(I) ((I) * NBPG) /* index => offset */
222 1.2 tsubai #define ptp_o2i(O) ((O) / NBPG) /* offset => index */
223 1.2 tsubai #define ptp_i2v(I) ((I) * NBPD) /* index => VA */
224 1.2 tsubai #define ptp_v2i(V) ((V) / NBPD) /* VA => index (same as pdei) */
225 1.2 tsubai
226 1.1 itojun #ifdef _KERNEL
227 1.1 itojun /*
228 1.2 tsubai * pmap data structures: see pmap.c for details of locking.
229 1.1 itojun */
230 1.1 itojun
231 1.2 tsubai struct pmap;
232 1.2 tsubai typedef struct pmap *pmap_t;
233 1.1 itojun
234 1.1 itojun /*
235 1.2 tsubai * we maintain a list of all non-kernel pmaps
236 1.1 itojun */
237 1.2 tsubai
238 1.2 tsubai LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
239 1.1 itojun
240 1.1 itojun /*
241 1.2 tsubai * the pmap structure
242 1.2 tsubai *
243 1.2 tsubai * note that the pm_obj contains the simple_lock, the reference count,
244 1.2 tsubai * page list, and number of PTPs within the pmap.
245 1.1 itojun */
246 1.2 tsubai
247 1.2 tsubai struct pmap {
248 1.2 tsubai struct uvm_object pm_obj; /* object (lck by object lock) */
249 1.2 tsubai #define pm_lock pm_obj.vmobjlock
250 1.2 tsubai LIST_ENTRY(pmap) pm_list; /* list (lck by pm_list lock) */
251 1.2 tsubai pd_entry_t *pm_pdir; /* VA of PD (lck by object lock) */
252 1.2 tsubai u_int32_t pm_pdirpa; /* PA of PD (read-only after create) */
253 1.2 tsubai struct vm_page *pm_ptphint; /* pointer to a PTP in our pmap */
254 1.2 tsubai struct pmap_statistics pm_stats; /* pmap stats (lck by object lock) */
255 1.2 tsubai
256 1.2 tsubai int pm_flags; /* see below */
257 1.2 tsubai };
258 1.2 tsubai
259 1.2 tsubai /* pm_flags */
260 1.2 tsubai #define PMF_USER_LDT 0x01 /* pmap has user-set LDT */
261 1.1 itojun
262 1.1 itojun /*
263 1.2 tsubai * for each managed physical page we maintain a list of <PMAP,VA>'s
264 1.2 tsubai * which it is mapped at. the list is headed by a pv_head structure.
265 1.2 tsubai * there is one pv_head per managed phys page (allocated at boot time).
266 1.2 tsubai * the pv_head structure points to a list of pv_entry structures (each
267 1.2 tsubai * describes one mapping).
268 1.1 itojun */
269 1.2 tsubai
270 1.2 tsubai struct pv_entry;
271 1.2 tsubai
272 1.2 tsubai struct pv_head {
273 1.13 chs struct simplelock pvh_lock; /* locks every pv on this list */
274 1.2 tsubai struct pv_entry *pvh_list; /* head of list (locked by pvh_lock) */
275 1.2 tsubai };
276 1.2 tsubai
277 1.7 thorpej /* These are kept in the vm_physseg array. */
278 1.7 thorpej #define PGA_REFERENCED 0x01 /* page is referenced */
279 1.7 thorpej #define PGA_MODIFIED 0x02 /* page is modified */
280 1.7 thorpej
281 1.2 tsubai struct pv_entry { /* locked by its list's pvh_lock */
282 1.2 tsubai struct pv_entry *pv_next; /* next entry */
283 1.2 tsubai struct pmap *pv_pmap; /* the pmap */
284 1.2 tsubai vaddr_t pv_va; /* the virtual address */
285 1.2 tsubai struct vm_page *pv_ptp; /* the vm_page of the PTP */
286 1.1 itojun };
287 1.1 itojun
288 1.2 tsubai /*
289 1.2 tsubai * pv_entrys are dynamically allocated in chunks from a single page.
290 1.2 tsubai * we keep track of how many pv_entrys are in use for each page and
291 1.2 tsubai * we can free pv_entry pages if needed. there is one lock for the
292 1.2 tsubai * entire allocation system.
293 1.2 tsubai */
294 1.1 itojun
295 1.1 itojun struct pv_page_info {
296 1.2 tsubai TAILQ_ENTRY(pv_page) pvpi_list;
297 1.2 tsubai struct pv_entry *pvpi_pvfree;
298 1.2 tsubai int pvpi_nfree;
299 1.1 itojun };
300 1.1 itojun
301 1.1 itojun /*
302 1.2 tsubai * number of pv_entry's in a pv_page
303 1.2 tsubai * (note: won't work on systems where NPBG isn't a constant)
304 1.2 tsubai */
305 1.2 tsubai
306 1.2 tsubai #define PVE_PER_PVPAGE ((NBPG - sizeof(struct pv_page_info)) / \
307 1.2 tsubai sizeof(struct pv_entry))
308 1.2 tsubai
309 1.2 tsubai /*
310 1.2 tsubai * a pv_page: where pv_entrys are allocated from
311 1.1 itojun */
312 1.1 itojun
313 1.1 itojun struct pv_page {
314 1.2 tsubai struct pv_page_info pvinfo;
315 1.2 tsubai struct pv_entry pvents[PVE_PER_PVPAGE];
316 1.2 tsubai };
317 1.2 tsubai
318 1.2 tsubai /*
319 1.2 tsubai * pmap_remove_record: a record of VAs that have been unmapped, used to
320 1.2 tsubai * flush TLB. if we have more than PMAP_RR_MAX then we stop recording.
321 1.2 tsubai */
322 1.2 tsubai
323 1.2 tsubai #define PMAP_RR_MAX 16 /* max of 16 pages (64K) */
324 1.2 tsubai
325 1.2 tsubai struct pmap_remove_record {
326 1.2 tsubai int prr_npages;
327 1.2 tsubai vaddr_t prr_vas[PMAP_RR_MAX];
328 1.2 tsubai };
329 1.2 tsubai
330 1.2 tsubai /*
331 1.2 tsubai * pmap_transfer_location: used to pass the current location in the
332 1.2 tsubai * pmap between pmap_transfer and pmap_transfer_ptes [e.g. during
333 1.2 tsubai * a pmap_copy].
334 1.2 tsubai */
335 1.2 tsubai
336 1.2 tsubai struct pmap_transfer_location {
337 1.2 tsubai vaddr_t addr; /* the address (page-aligned) */
338 1.2 tsubai pt_entry_t *pte; /* the PTE that maps address */
339 1.2 tsubai struct vm_page *ptp; /* the PTP that the PTE lives in */
340 1.1 itojun };
341 1.1 itojun
342 1.2 tsubai /*
343 1.2 tsubai * global kernel variables
344 1.2 tsubai */
345 1.2 tsubai
346 1.2 tsubai /* PTDpaddr: is the physical address of the kernel's PDP */
347 1.2 tsubai extern u_long PTDpaddr;
348 1.2 tsubai
349 1.2 tsubai extern struct pmap kernel_pmap_store; /* kernel pmap */
350 1.2 tsubai extern int nkpde; /* current # of PDEs for kernel */
351 1.2 tsubai extern int pmap_pg_g; /* do we support PG_G? */
352 1.2 tsubai
353 1.2 tsubai /*
354 1.2 tsubai * macros
355 1.2 tsubai */
356 1.1 itojun
357 1.1 itojun #define pmap_kernel() (&kernel_pmap_store)
358 1.1 itojun #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
359 1.6 is #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
360 1.14 chris #define pmap_update(pmap) /* nothing (yet) */
361 1.1 itojun
362 1.7 thorpej #define pmap_is_referenced(pg) pmap_test_attrs(pg, PGA_REFERENCED)
363 1.7 thorpej #define pmap_is_modified(pg) pmap_test_attrs(pg, PGA_MODIFIED)
364 1.7 thorpej
365 1.2 tsubai #define pmap_copy(DP,SP,D,L,S) pmap_transfer(DP,SP,D,L,S, FALSE)
366 1.2 tsubai #define pmap_move(DP,SP,D,L,S) pmap_transfer(DP,SP,D,L,S, TRUE)
367 1.2 tsubai #define pmap_phys_address(ppn) sh3_ptob(ppn)
368 1.2 tsubai #define pmap_valid_entry(E) ((E) & PG_V) /* is PDE or PTE valid? */
369 1.2 tsubai
370 1.2 tsubai
371 1.2 tsubai /*
372 1.2 tsubai * prototypes
373 1.2 tsubai */
374 1.1 itojun
375 1.16 uch void pmap_activate(struct proc *);
376 1.16 uch void pmap_bootstrap(vaddr_t);
377 1.16 uch boolean_t pmap_change_attrs(struct vm_page *, int, int);
378 1.16 uch void pmap_deactivate(struct proc *);
379 1.16 uch void pmap_page_remove (struct vm_page *);
380 1.17 uch void pmap_protect(struct pmap *, vaddr_t,
381 1.16 uch vaddr_t, vm_prot_t);
382 1.16 uch void pmap_remove(struct pmap *, vaddr_t, vaddr_t);
383 1.16 uch boolean_t pmap_test_attrs(struct vm_page *, int);
384 1.16 uch void pmap_transfer(struct pmap *, struct pmap *, vaddr_t,
385 1.16 uch vsize_t, vaddr_t, boolean_t);
386 1.17 uch void pmap_update_pg(vaddr_t);
387 1.17 uch void pmap_update_2pg(vaddr_t,vaddr_t);
388 1.16 uch void pmap_write_protect(struct pmap *, vaddr_t,
389 1.16 uch vaddr_t, vm_prot_t);
390 1.2 tsubai
391 1.16 uch vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */
392 1.2 tsubai
393 1.2 tsubai #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */
394 1.5 tsubai
395 1.5 tsubai /*
396 1.5 tsubai * Alternate mapping hooks for pool pages. Avoids thrashing the TLB.
397 1.5 tsubai */
398 1.8 msaitoh /*
399 1.8 msaitoh * XXX Indeed, first, we should refine physical address v.s. virtual
400 1.8 msaitoh * address mapping.
401 1.8 msaitoh * See
402 1.8 msaitoh * uvm_km.c:uvm_km_free_poolpage1,
403 1.8 msaitoh * vm_page.h:PHYS_TO_VM_PAGE, vm_physseg_find
404 1.8 msaitoh * machdep.c:pmap_bootstrap (uvm_page_physload, etc)
405 1.8 msaitoh */
406 1.18 uch /* XXX broken */
407 1.8 msaitoh #define PMAP_MAP_POOLPAGE(pa) (pa)
408 1.8 msaitoh #define PMAP_UNMAP_POOLPAGE(va) (va)
409 1.2 tsubai
410 1.16 uch vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t);
411 1.16 uch paddr_t vtophys(vaddr_t);
412 1.16 uch void pmap_emulate_reference(struct proc *, vaddr_t, int, int);
413 1.2 tsubai
414 1.1 itojun #endif /* _KERNEL */
415 1.1 itojun #endif /* _SH3_PMAP_H_ */
416