pte.h revision 1.5 1 /* $NetBSD: pte.h,v 1.5 2002/02/11 18:06:06 uch Exp $ */
2
3 /*-
4 * Copyright (c) 1990 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * @(#)pte.h 5.5 (Berkeley) 5/9/91
39 */
40
41 /*
42 * SH3
43 *
44 * Page Table Entry
45 *
46 * T.Horiuchi Brains Corp. 05/26/1998
47 */
48 #ifndef _SH3_PTE_H_
49 #define _SH3_PTE_H_
50
51 #define PDSHIFT 22 /* LOG2(NBPDR) */
52 #define NBPD (1 << PDSHIFT) /* bytes/page dir */
53 #define PDOFSET (NBPD-1) /* byte offset into page dir */
54 #define NPTEPD (NBPD / NBPG)
55
56 #ifndef _LOCORE
57 typedef int pd_entry_t; /* page directory entry */
58 typedef int pt_entry_t; /* Mach page table entry */
59 #endif
60
61 #define PD_MASK 0xffc00000 /* page directory address bits */
62 #define PT_MASK 0x003ff000 /* page table address bits */
63 #define PTES_PER_PTP (NBPD / NBPG) /* # of PTEs in a PTP */
64
65 /*
66 *
67 * NetBSD/sh3 PTE format.
68 *
69 * SH3
70 * PPN V PR SZ C D SH
71 * [28:10][8][6:5][4][3][2][1]
72 *
73 * SH4
74 * V SZ PR SZ C D SH WT
75 * [28:10][8][7][6:5][4][3][2][1][0]
76 *
77 * + NetBSD/sh3 page size is 4KB. [11:10] and [7] can be used as SW bit.
78 * + [31:29] should be available for SW bit...
79 * + SH4 WT bit is not stored in PTE. U0 is always write-back. and
80 * P3 is always write-thurogh. (see sh3/trap.c::__setup_pte_sh4())
81 * We use WT bit as SW bit.
82 *
83 * Software bit assign
84 * [11:9] - SH4 PCMCIA Assistant bit. (space attribute bit only)
85 * [7] - Wired page bit.
86 * [0] - PVlist bit.
87 */
88
89 /*
90 * Hardware bits
91 */
92 #define PG_FRAME 0xfffff000 /* page frame mask XXX */
93 #define PG_V 0x00000100 /* present */
94 #define PG_UW 0x00000060 /* kernel/user read/write */
95 #define PG_URKR 0x00000040 /* kernel/user read only */
96 #define PG_KW 0x00000020 /* kernel read/write */
97 #define PG_KR 0x00000000 /* kernel read only */
98 #define PG_4K 0x00000010 /* page size 4KB */
99 #define PG_N 0x00000008 /* 0=non-cacheable */
100 #define PG_M 0x00000004 /* has been modified */
101 #define PG_G 0x00000002 /* share status */
102 #define PG_WT 0x00000001 /* write through (SH4) */
103
104 #define PG_HW_BITS 0x1ffff17e /* [28:12][8][6:1] */
105
106 /*
107 * Software bits
108 */
109 #define PG_W 0x00000080 /* page is wired */
110 #define PG_PVLIST 0x00000001 /* mapping has entry on pvlist */
111 /* SH4 PCMCIA MMU support bits */
112 /* PTEA SA (Space Attribute bit) */
113 #define _PG_PCMCIA 0x00000e00
114 #define _PG_PCMCIA_SHIFT 9
115 #define _PG_PCMCIA_NONE 0x00000000 /* Non PCMCIA space */
116 #define _PG_PCMCIA_IO 0x00000200 /* IOIS16 signal */
117 #define _PG_PCMCIA_IO8 0x00000400 /* 8 bit I/O */
118 #define _PG_PCMCIA_IO16 0x00000600 /* 16 bit I/O */
119 #define _PG_PCMCIA_MEM8 0x00000800 /* 8 bit common memory */
120 #define _PG_PCMCIA_MEM16 0x00000a00 /* 16 bit common memory */
121 #define _PG_PCMCIA_ATTR8 0x00000c00 /* 8 bit attribute */
122 #define _PG_PCMCIA_ATTR16 0x00000e00 /* 16 bit attribute */
123
124 #endif /* !_SH3_PTE_H_ */
125