Home | History | Annotate | Line # | Download | only in include
rtcreg.h revision 1.3
      1  1.3  msaitoh /* $Id: rtcreg.h,v 1.3 1999/12/21 22:06:04 msaitoh Exp $ */
      2  1.3  msaitoh /* $NetBSD: rtcreg.h,v 1.3 1999/12/21 22:06:04 msaitoh Exp $ */
      3  1.1   itojun 
      4  1.1   itojun /*-
      5  1.1   itojun  * Copyright (C) 1999 SAITOH Masanobu.  All rights reserved.
      6  1.1   itojun  *
      7  1.1   itojun  * Redistribution and use in source and binary forms, with or without
      8  1.1   itojun  * modification, are permitted provided that the following conditions
      9  1.1   itojun  * are met:
     10  1.1   itojun  * 1. Redistributions of source code must retain the above copyright
     11  1.1   itojun  *    notice, this list of conditions and the following disclaimer.
     12  1.1   itojun  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1   itojun  *    notice, this list of conditions and the following disclaimer in the
     14  1.1   itojun  *    documentation and/or other materials provided with the distribution.
     15  1.1   itojun  * 3. The name of the author may not be used to endorse or promote products
     16  1.1   itojun  *    derived from this software without specific prior written permission.
     17  1.1   itojun  *
     18  1.1   itojun  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19  1.1   itojun  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20  1.1   itojun  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21  1.1   itojun  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22  1.1   itojun  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     23  1.1   itojun  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     24  1.1   itojun  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     25  1.1   itojun  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     26  1.1   itojun  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     27  1.1   itojun  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     28  1.1   itojun  */
     29  1.1   itojun 
     30  1.1   itojun #ifndef _SH3_RTCREG_H__
     31  1.1   itojun #define _SH3_RTCREG_H__
     32  1.1   itojun 
     33  1.1   itojun /*
     34  1.1   itojun  * Real Time Clock
     35  1.1   itojun  */
     36  1.1   itojun 
     37  1.1   itojun #if !defined(SH4)
     38  1.1   itojun 
     39  1.1   itojun /* SH3 definitions */
     40  1.1   itojun 
     41  1.1   itojun #define SHREG_R64CNT	(*(volatile unsigned char *)	0xFFFFFEC0)
     42  1.1   itojun #define SHREG_RSECCNT	(*(volatile unsigned char *)	0xFFFFFEC2)
     43  1.1   itojun #define SHREG_RMINCNT	(*(volatile unsigned char *)	0xFFFFFEC4)
     44  1.1   itojun #define SHREG_RHRCNT	(*(volatile unsigned char *)	0xFFFFFEC6)
     45  1.1   itojun #define SHREG_RWKCNT	(*(volatile unsigned char *)	0xFFFFFEC8)
     46  1.1   itojun #define SHREG_RDAYCNT	(*(volatile unsigned char *)	0xFFFFFECA)
     47  1.1   itojun #define SHREG_RMONCNT	(*(volatile unsigned char *)	0xFFFFFECC)
     48  1.1   itojun #define SHREG_RYRCNT	(*(volatile unsigned char *)	0xFFFFFECE)
     49  1.1   itojun #define SHREG_RSECAR	(*(volatile unsigned char *)	0xFFFFFED0)
     50  1.1   itojun #define SHREG_RMINAR	(*(volatile unsigned char *)	0xFFFFFED2)
     51  1.1   itojun #define SHREG_RHRAR	(*(volatile unsigned char *)	0xFFFFFED4)
     52  1.1   itojun #define SHREG_RWKAR	(*(volatile unsigned char *)	0xFFFFFED6)
     53  1.1   itojun #define SHREG_RDAYAR	(*(volatile unsigned char *)	0xFFFFFED8)
     54  1.1   itojun #define SHREG_RMONAR	(*(volatile unsigned char *)	0xFFFFFEDA)
     55  1.1   itojun #define SHREG_RCR1	(*(volatile unsigned char *)	0xFFFFFEDC)
     56  1.1   itojun #define SHREG_RCR2	(*(volatile unsigned char *)	0xFFFFFEDE)
     57  1.1   itojun 
     58  1.1   itojun #else
     59  1.1   itojun 
     60  1.1   itojun /* SH4 definitions */
     61  1.1   itojun 
     62  1.1   itojun #define SHREG_R64CNT	(*(volatile unsigned char *)	0xffc80000)
     63  1.1   itojun #define SHREG_RSECCNT	(*(volatile unsigned char *)	0xffc80004)
     64  1.1   itojun #define SHREG_RMINCNT	(*(volatile unsigned char *)	0xffc80008)
     65  1.1   itojun #define SHREG_RHRCNT	(*(volatile unsigned char *)	0xffc8000c)
     66  1.1   itojun #define SHREG_RWKCNT	(*(volatile unsigned char *)	0xffc80010)
     67  1.1   itojun #define SHREG_RDAYCNT	(*(volatile unsigned char *)	0xffc80014)
     68  1.1   itojun #define SHREG_RMONCNT	(*(volatile unsigned char *)	0xffc80018)
     69  1.1   itojun #define SHREG_RYRCNT	(*(volatile unsigned short *)	0xffc8001c)
     70  1.1   itojun #define SHREG_RSECAR	(*(volatile unsigned char *)	0xffc80020)
     71  1.1   itojun #define SHREG_RMINAR	(*(volatile unsigned char *)	0xffc80024)
     72  1.1   itojun #define SHREG_RHRAR	(*(volatile unsigned char *)	0xffc80028)
     73  1.1   itojun #define SHREG_RWKAR	(*(volatile unsigned char *)	0xffc8002c)
     74  1.1   itojun #define SHREG_RDAYAR	(*(volatile unsigned char *)	0xffc80030)
     75  1.1   itojun #define SHREG_RMONAR	(*(volatile unsigned char *)	0xffc80034)
     76  1.1   itojun #define SHREG_RCR1	(*(volatile unsigned char *)	0xffc80038)
     77  1.1   itojun #define SHREG_RCR2	(*(volatile unsigned char *)	0xffc8003c)
     78  1.1   itojun 
     79  1.1   itojun #endif
     80  1.1   itojun 
     81  1.3  msaitoh #define SHREG_RCR2_PEF		0x80
     82  1.3  msaitoh #define SHREG_RCR2_PES2		0x40
     83  1.3  msaitoh #define SHREG_RCR2_PES1		0x20
     84  1.3  msaitoh #define SHREG_RCR2_PES0		0x10
     85  1.3  msaitoh #define SHREG_RCR2_ENABLE	0x08
     86  1.3  msaitoh #define SHREG_RCR2_ADJ		0x04
     87  1.1   itojun #define SHREG_RCR2_RESET	0x02
     88  1.1   itojun #define SHREG_RCR2_START	0x01
     89  1.3  msaitoh 
     90  1.3  msaitoh #define SHREG_RCR2_P64		(SHREG_RCR2_PES1)
     91  1.1   itojun 
     92  1.1   itojun #endif /* !_SH3_RTCREG_H__ */
     93