rtcreg.h revision 1.6
1 1.6 uch /* $NetBSD: rtcreg.h,v 1.6 2002/02/28 01:56:58 uch Exp $ */ 2 1.1 itojun 3 1.1 itojun /*- 4 1.1 itojun * Copyright (C) 1999 SAITOH Masanobu. All rights reserved. 5 1.1 itojun * 6 1.1 itojun * Redistribution and use in source and binary forms, with or without 7 1.1 itojun * modification, are permitted provided that the following conditions 8 1.1 itojun * are met: 9 1.1 itojun * 1. Redistributions of source code must retain the above copyright 10 1.1 itojun * notice, this list of conditions and the following disclaimer. 11 1.1 itojun * 2. Redistributions in binary form must reproduce the above copyright 12 1.1 itojun * notice, this list of conditions and the following disclaimer in the 13 1.1 itojun * documentation and/or other materials provided with the distribution. 14 1.1 itojun * 3. The name of the author may not be used to endorse or promote products 15 1.1 itojun * derived from this software without specific prior written permission. 16 1.1 itojun * 17 1.1 itojun * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 1.1 itojun * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 1.1 itojun * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 1.1 itojun * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 1.1 itojun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 1.1 itojun * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 1.1 itojun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 1.1 itojun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 1.1 itojun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 1.1 itojun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 1.1 itojun */ 28 1.1 itojun 29 1.1 itojun #ifndef _SH3_RTCREG_H__ 30 1.1 itojun #define _SH3_RTCREG_H__ 31 1.6 uch #include <sh3/devreg.h> 32 1.1 itojun 33 1.1 itojun /* 34 1.5 uch * RTC 35 1.1 itojun */ 36 1.5 uch #define SH3_R64CNT 0xfffffec0 37 1.5 uch #define SH3_RSECCNT 0xfffffec2 38 1.5 uch #define SH3_RMINCNT 0xfffffec4 39 1.5 uch #define SH3_RHRCNT 0xfffffec6 40 1.5 uch #define SH3_RWKCNT 0xfffffec8 41 1.5 uch #define SH3_RDAYCNT 0xfffffeca 42 1.5 uch #define SH3_RMONCNT 0xfffffecc 43 1.5 uch #define SH3_RYRCNT 0xfffffece 44 1.5 uch #define SH3_RSECAR 0xfffffed0 45 1.5 uch #define SH3_RMINAR 0xfffffed2 46 1.5 uch #define SH3_RHRAR 0xfffffed4 47 1.5 uch #define SH3_RWKAR 0xfffffed6 48 1.5 uch #define SH3_RDAYAR 0xfffffed8 49 1.5 uch #define SH3_RMONAR 0xfffffeda 50 1.5 uch #define SH3_RCR1 0xfffffedc 51 1.5 uch #define SH3_RCR2 0xfffffede 52 1.5 uch 53 1.5 uch #define SH4_R64CNT 0xffc80000 54 1.5 uch #define SH4_RSECCNT 0xffc80004 55 1.5 uch #define SH4_RMINCNT 0xffc80008 56 1.5 uch #define SH4_RHRCNT 0xffc8000c 57 1.5 uch #define SH4_RWKCNT 0xffc80010 58 1.5 uch #define SH4_RDAYCNT 0xffc80014 59 1.5 uch #define SH4_RMONCNT 0xffc80018 60 1.5 uch #define SH4_RYRCNT 0xffc8001c /* 16 bit */ 61 1.5 uch #define SH4_RSECAR 0xffc80020 62 1.5 uch #define SH4_RMINAR 0xffc80024 63 1.5 uch #define SH4_RHRAR 0xffc80028 64 1.5 uch #define SH4_RWKAR 0xffc8002c 65 1.5 uch #define SH4_RDAYAR 0xffc80030 66 1.5 uch #define SH4_RMONAR 0xffc80034 67 1.5 uch #define SH4_RCR1 0xffc80038 68 1.5 uch #define SH4_RCR2 0xffc8003c 69 1.5 uch 70 1.5 uch #define SH_RCR1_CF 0x80 71 1.5 uch #define SH_RCR1_CIE 0x10 72 1.5 uch #define SH_RCR1_AIE 0x08 73 1.5 uch #define SH_RCR1_AF 0x01 74 1.5 uch #define SH_RCR2_PEF 0x80 75 1.5 uch #define SH_RCR2_PES2 0x40 76 1.5 uch #define SH_RCR2_PES1 0x20 77 1.5 uch #define SH_RCR2_PES0 0x10 78 1.5 uch #define SH_RCR2_ENABLE 0x08 79 1.5 uch #define SH_RCR2_ADJ 0x04 80 1.5 uch #define SH_RCR2_RESET 0x02 81 1.5 uch #define SH_RCR2_START 0x01 82 1.6 uch 83 1.6 uch #ifndef _LOCORE 84 1.6 uch #if defined(SH3) && defined(SH4) 85 1.6 uch extern u_int32_t __sh_R64CNT; 86 1.6 uch extern u_int32_t __sh_RSECCNT; 87 1.6 uch extern u_int32_t __sh_RMINCNT; 88 1.6 uch extern u_int32_t __sh_RHRCNT; 89 1.6 uch extern u_int32_t __sh_RWKCNT; 90 1.6 uch extern u_int32_t __sh_RDAYCNT; 91 1.6 uch extern u_int32_t __sh_RMONCNT; 92 1.6 uch extern u_int32_t __sh_RYRCNT; 93 1.6 uch extern u_int32_t __sh_RSECAR; 94 1.6 uch extern u_int32_t __sh_RMINAR; 95 1.6 uch extern u_int32_t __sh_RHRAR; 96 1.6 uch extern u_int32_t __sh_RWKAR; 97 1.6 uch extern u_int32_t __sh_RDAYAR; 98 1.6 uch extern u_int32_t __sh_RMONAR; 99 1.6 uch extern u_int32_t __sh_RCR1; 100 1.6 uch extern u_int32_t __sh_RCR2; 101 1.6 uch #endif /* SH3 && SH4 */ 102 1.6 uch #endif /* !_LOCORE */ 103 1.1 itojun 104 1.1 itojun #endif /* !_SH3_RTCREG_H__ */ 105
Indexes created Thu Sep 25 16:09:42 GMT 2025