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scireg.h revision 1.9
      1  1.9   nonaka /* $NetBSD: scireg.h,v 1.9 2009/04/30 05:19:38 nonaka Exp $ */
      2  1.1   itojun 
      3  1.1   itojun /*-
      4  1.1   itojun  * Copyright (C) 1999 SAITOH Masanobu.  All rights reserved.
      5  1.1   itojun  *
      6  1.1   itojun  * Redistribution and use in source and binary forms, with or without
      7  1.1   itojun  * modification, are permitted provided that the following conditions
      8  1.1   itojun  * are met:
      9  1.1   itojun  * 1. Redistributions of source code must retain the above copyright
     10  1.1   itojun  *    notice, this list of conditions and the following disclaimer.
     11  1.1   itojun  * 2. Redistributions in binary form must reproduce the above copyright
     12  1.1   itojun  *    notice, this list of conditions and the following disclaimer in the
     13  1.1   itojun  *    documentation and/or other materials provided with the distribution.
     14  1.1   itojun  * 3. The name of the author may not be used to endorse or promote products
     15  1.1   itojun  *    derived from this software without specific prior written permission.
     16  1.1   itojun  *
     17  1.1   itojun  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  1.1   itojun  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  1.1   itojun  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  1.1   itojun  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  1.1   itojun  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  1.1   itojun  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  1.1   itojun  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  1.1   itojun  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  1.1   itojun  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  1.1   itojun  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  1.1   itojun  */
     28  1.1   itojun 
     29  1.1   itojun #ifndef _SH3_SCIREG_H_
     30  1.7      uch #define	_SH3_SCIREG_H_
     31  1.1   itojun 
     32  1.1   itojun /*
     33  1.1   itojun  * Serial Communication Interface (SCI)
     34  1.1   itojun  */
     35  1.1   itojun 
     36  1.1   itojun #if !defined(SH4)
     37  1.1   itojun 
     38  1.1   itojun /* SH3 definitions */
     39  1.1   itojun 
     40  1.7      uch #define	SHREG_SCSMR	(*(volatile unsigned char *)	0xFFFFFE80)
     41  1.7      uch #define	SHREG_SCBRR	(*(volatile unsigned char *)	0xFFFFFE82)
     42  1.7      uch #define	SHREG_SCSCR	(*(volatile unsigned char *)	0xFFFFFE84)
     43  1.7      uch #define	SHREG_SCTDR	(*(volatile unsigned char *)	0xFFFFFE86)
     44  1.7      uch #define	SHREG_SCSSR	(*(volatile unsigned char *)	0xFFFFFE88)
     45  1.7      uch #define	SHREG_SCRDR	(*(volatile unsigned char *)	0xFFFFFE8A)
     46  1.9   nonaka #define	SHREG_SCSCMR	(*(volatile unsigned char *)	0xFFFFFE8C)
     47  1.7      uch #define	SHREG_SCSPDR	(*(volatile unsigned char *)	0xf4000136)
     48  1.1   itojun 
     49  1.1   itojun #else
     50  1.1   itojun 
     51  1.1   itojun /* SH4 definitions */
     52  1.1   itojun 
     53  1.7      uch #define	SHREG_SCSMR	(*(volatile unsigned char *)	0xffe00000)
     54  1.7      uch #define	SHREG_SCBRR	(*(volatile unsigned char *)	0xffe00004)
     55  1.7      uch #define	SHREG_SCSCR	(*(volatile unsigned char *)	0xffe00008)
     56  1.7      uch #define	SHREG_SCTDR	(*(volatile unsigned char *)	0xffe0000c)
     57  1.7      uch #define	SHREG_SCSSR	(*(volatile unsigned char *)	0xffe00010)
     58  1.7      uch #define	SHREG_SCRDR	(*(volatile unsigned char *)	0xffe00014)
     59  1.7      uch #define	SHREG_SCSPTR	(*(volatile unsigned char *)	0xffe0001c)
     60  1.1   itojun 
     61  1.1   itojun #endif
     62  1.1   itojun 
     63  1.9   nonaka #define	SCSMR_CA	0x80
     64  1.9   nonaka #define	SCSMR_CHR	0x40
     65  1.9   nonaka #define	SCSMR_PE	0x20
     66  1.9   nonaka #define	SCSMR_OE	0x10
     67  1.9   nonaka #define	SCSMR_STOP	0x08
     68  1.9   nonaka #define	SCSMR_MP	0x04
     69  1.9   nonaka #define	SCSMR_CKS1	0x02
     70  1.9   nonaka #define	SCSMR_CKS0	0x01
     71  1.9   nonaka 
     72  1.7      uch #define	SCSCR_TIE	0x80	/* Transmit Interrupt Enable */
     73  1.7      uch #define	SCSCR_RIE	0x40	/* Receive Interrupt Enable */
     74  1.7      uch #define	SCSCR_TE	0x20	/* Transmit Enable */
     75  1.7      uch #define	SCSCR_RE	0x10	/* Receive Enable */
     76  1.7      uch #define	SCSCR_MPIE	0x08	/* Multi Processor Interrupt Enable */
     77  1.7      uch #define	SCSCR_TEIE	0x04	/* Transmit End Interrupt Enable */
     78  1.7      uch #define	SCSCR_CKE1	0x02	/* ClocK Enable 1 */
     79  1.7      uch #define	SCSCR_CKE0	0x01	/* ClocK Enable 0 */
     80  1.7      uch 
     81  1.7      uch #define	SCSSR_TDRE	0x80
     82  1.7      uch #define	SCSSR_RDRF	0x40
     83  1.7      uch #define	SCSSR_ORER	0x20
     84  1.7      uch #define	SCSSR_FER	0x10
     85  1.7      uch #define	SCSSR_PER	0x08
     86  1.9   nonaka #define	SCSSR_TEND	0x04
     87  1.9   nonaka #define	SCSSR_MPB	0x02
     88  1.9   nonaka #define	SCSSR_MPBT	0x01
     89  1.4      uch 
     90  1.4      uch #define	SCSPTR_SPB1IO	0x08
     91  1.4      uch #define	SCSPTR_SPB1DT	0x04
     92  1.4      uch #define	SCSPTR_SPB0IO	0x02
     93  1.4      uch #define	SCSPTR_SPB0DT	0x01
     94  1.5  msaitoh 
     95  1.5  msaitoh #if defined(SH3)
     96  1.8      uwe #define	SCSPDR_SCP0DT	0x01
     97  1.5  msaitoh #endif
     98  1.1   itojun 
     99  1.1   itojun #endif /* !_SH3_SCIREG_ */
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