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scireg.h revision 1.4 
      1 /* $NetBSD: scireg.h,v 1.4 2002/03/24 18:04:40 uch Exp $ */
      2 
      3 /*-
      4  * Copyright (C) 1999 SAITOH Masanobu.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. The name of the author may not be used to endorse or promote products
     15  *    derived from this software without specific prior written permission.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #ifndef _SH3_SCIREG_H_
     30 #define _SH3_SCIREG_H_
     31 
     32 /*
     33  * Serial Communication Interface (SCI)
     34  */
     35 
     36 #if !defined(SH4)
     37 
     38 /* SH3 definitions */
     39 
     40 #define SHREG_SCSMR	(*(volatile unsigned char *)	0xFFFFFE80)
     41 #define SHREG_SCBRR	(*(volatile unsigned char *)	0xFFFFFE82)
     42 #define SHREG_SCSCR	(*(volatile unsigned char *)	0xFFFFFE84)
     43 #define SHREG_SCTDR	(*(volatile unsigned char *)	0xFFFFFE86)
     44 #define SHREG_SCSSR	(*(volatile unsigned char *)	0xFFFFFE88)
     45 #define SHREG_SCRDR	(*(volatile unsigned char *)	0xFFFFFE8A)
     46 #define SHREG_SCSPTR	(*(volatile unsigned char *)	0xffffff7c)
     47 
     48 #else
     49 
     50 /* SH4 definitions */
     51 
     52 #define SHREG_SCSMR	(*(volatile unsigned char *)	0xffe00000)
     53 #define SHREG_SCBRR	(*(volatile unsigned char *)	0xffe00004)
     54 #define SHREG_SCSCR	(*(volatile unsigned char *)	0xffe00008)
     55 #define SHREG_SCTDR	(*(volatile unsigned char *)	0xffe0000c)
     56 #define SHREG_SCSSR	(*(volatile unsigned char *)	0xffe00010)
     57 #define SHREG_SCRDR	(*(volatile unsigned char *)	0xffe00014)
     58 
     59 #endif
     60 
     61 #define SCSCR_TIE	0x80	/* Transmit Interrupt Enable */
     62 #define SCSCR_RIE	0x40	/* Receive Interrupt Enable */
     63 #define SCSCR_TE	0x20	/* Transmit Enable */
     64 #define SCSCR_RE	0x10	/* Receive Enable */
     65 #define SCSCR_MPIE	0x08	/* Multi Processor Interrupt Enable */
     66 #define SCSCR_TEIE	0x04	/* Transmit End Interrupt Enable */
     67 #define SCSCR_CKE1	0x02	/* ClocK Enable 1 */
     68 #define SCSCR_CKE0	0x01	/* ClocK Enable 0 */
     69 
     70 #define SCSSR_TDRE	0x80
     71 #define SCSSR_RDRF	0x40
     72 #define SCSSR_ORER	0x20
     73 #define SCSSR_FER	0x10
     74 #define SCSSR_PER	0x08
     75 
     76 #define	SCSPTR_SPB1IO	0x08
     77 #define	SCSPTR_SPB1DT	0x04
     78 #define	SCSPTR_SPB0IO	0x02
     79 #define	SCSPTR_SPB0DT	0x01
     80 
     81 #endif /* !_SH3_SCIREG_ */
     82