tmureg.h revision 1.3 1 1.1 itojun /* $NetBSD: tmureg.h,v 1.3 2000/01/17 21:41:14 msaitoh Exp $ */
2 1.1 itojun
3 1.1 itojun /*-
4 1.1 itojun * Copyright (C) 1999 SAITOH Masanobu. All rights reserved.
5 1.1 itojun *
6 1.1 itojun * Redistribution and use in source and binary forms, with or without
7 1.1 itojun * modification, are permitted provided that the following conditions
8 1.1 itojun * are met:
9 1.1 itojun * 1. Redistributions of source code must retain the above copyright
10 1.1 itojun * notice, this list of conditions and the following disclaimer.
11 1.1 itojun * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 itojun * notice, this list of conditions and the following disclaimer in the
13 1.1 itojun * documentation and/or other materials provided with the distribution.
14 1.1 itojun * 3. The name of the author may not be used to endorse or promote products
15 1.1 itojun * derived from this software without specific prior written permission.
16 1.1 itojun *
17 1.1 itojun * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 itojun * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 itojun * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 itojun * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 itojun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 itojun * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 itojun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 itojun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 itojun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 itojun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 itojun */
28 1.1 itojun
29 1.1 itojun #ifndef _SH3_TMUREG_H_
30 1.1 itojun #define _SH3_TMUREG_H_
31 1.1 itojun
32 1.1 itojun /*
33 1.1 itojun * Timer Unit
34 1.1 itojun */
35 1.1 itojun
36 1.1 itojun #if !defined(SH4)
37 1.1 itojun
38 1.1 itojun /* SH3 definition */
39 1.1 itojun
40 1.2 msaitoh /* common */
41 1.2 msaitoh #define SHREG_TOCR (*(volatile unsigned char *) 0xfffffe90)
42 1.2 msaitoh #define SHREG_TSTR (*(volatile unsigned char *) 0xfffffe92)
43 1.2 msaitoh
44 1.2 msaitoh /* ch. 0 */
45 1.2 msaitoh #define SHREG_TCOR0 (*(volatile unsigned int *) 0xfffffe94)
46 1.2 msaitoh #define SHREG_TCNT0 (*(volatile unsigned int *) 0xfffffe98)
47 1.2 msaitoh #define SHREG_TCR0 (*(volatile unsigned short *) 0xfffffe9c)
48 1.2 msaitoh
49 1.2 msaitoh /* ch. 1 */
50 1.2 msaitoh #define SHREG_TCOR1 (*(volatile unsigned int *) 0xfffffea0)
51 1.2 msaitoh #define SHREG_TCNT1 (*(volatile unsigned int *) 0xfffffea4)
52 1.2 msaitoh #define SHREG_TCR1 (*(volatile unsigned short *) 0xfffffea8)
53 1.2 msaitoh
54 1.2 msaitoh /* ch. 2 */
55 1.2 msaitoh #define SHREG_TCOR2 (*(volatile unsigned int *) 0xfffffeac)
56 1.2 msaitoh #define SHREG_TCNT2 (*(volatile unsigned int *) 0xfffffeb0)
57 1.2 msaitoh #define SHREG_TCR2 (*(volatile unsigned short *) 0xfffffeb4)
58 1.2 msaitoh #define SHREG_TCPR2 (*(volatile unsigned int *) 0xfffffeb8)
59 1.1 itojun
60 1.1 itojun #else
61 1.1 itojun
62 1.1 itojun /* SH4 address definition */
63 1.1 itojun
64 1.2 msaitoh /* common */
65 1.2 msaitoh #define SHREG_TOCR (*(volatile unsigned char *) 0xffd80000)
66 1.2 msaitoh #define SHREG_TSTR (*(volatile unsigned char *) 0xffd80004)
67 1.2 msaitoh
68 1.2 msaitoh /* ch. 0 */
69 1.2 msaitoh #define SHREG_TCOR0 (*(volatile unsigned int *) 0xffd80008)
70 1.2 msaitoh #define SHREG_TCNT0 (*(volatile unsigned int *) 0xffd8000c)
71 1.2 msaitoh #define SHREG_TCR0 (*(volatile unsigned short *) 0xffd80010)
72 1.2 msaitoh
73 1.2 msaitoh /* ch. 1 */
74 1.2 msaitoh #define SHREG_TCOR1 (*(volatile unsigned int *) 0xffd80014)
75 1.2 msaitoh #define SHREG_TCNT1 (*(volatile unsigned int *) 0xffd80018)
76 1.2 msaitoh #define SHREG_TCR1 (*(volatile unsigned short *) 0xffd8001c)
77 1.2 msaitoh
78 1.2 msaitoh /* ch. 2 */
79 1.2 msaitoh #define SHREG_TCOR2 (*(volatile unsigned int *) 0xffd80020)
80 1.2 msaitoh #define SHREG_TCNT2 (*(volatile unsigned int *) 0xffd80024)
81 1.2 msaitoh #define SHREG_TCR2 (*(volatile unsigned short *) 0xffd80028)
82 1.2 msaitoh #define SHREG_TCPR2 (*(volatile unsigned int *) 0xffd8002c)
83 1.1 itojun
84 1.1 itojun #endif
85 1.1 itojun
86 1.1 itojun #define TOCR_TCOE 0x01
87 1.1 itojun
88 1.1 itojun #define TSTR_STR2 0x04
89 1.1 itojun #define TSTR_STR1 0x02
90 1.1 itojun #define TSTR_STR0 0x01
91 1.1 itojun
92 1.1 itojun #define TCR_ICPF 0x0200
93 1.1 itojun #define TCR_UNF 0x0100
94 1.1 itojun #define TCR_ICPE1 0x0080
95 1.1 itojun #define TCR_ICPE0 0x0040
96 1.1 itojun #define TCR_UNIE 0x0020
97 1.1 itojun #define TCR_CKEG1 0x0010
98 1.1 itojun #define TCR_CKEG0 0x0008
99 1.1 itojun #define TCR_TPSC2 0x0004
100 1.1 itojun #define TCR_TPSC1 0x0002
101 1.1 itojun #define TCR_TPSC0 0x0001
102 1.1 itojun
103 1.3 msaitoh #define TCR_TPSC_P4 0x0000
104 1.3 msaitoh #define TCR_TPSC_P16 0x0001
105 1.3 msaitoh #define TCR_TPSC_P64 0x0002
106 1.3 msaitoh #define TCR_TPSC_P256 0x0003
107 1.3 msaitoh #define TCR_TPSC_RTC 0x0004
108 1.3 msaitoh #define TCR_TPSC_TCLK 0x0005
109 1.3 msaitoh
110 1.1 itojun #endif /* !_SH3_TMUREG_H_ */
111