tmureg.h revision 1.7
1 1.7 uch /* $NetBSD: tmureg.h,v 1.7 2002/04/28 17:10:37 uch Exp $ */ 2 1.1 itojun 3 1.1 itojun /*- 4 1.1 itojun * Copyright (C) 1999 SAITOH Masanobu. All rights reserved. 5 1.1 itojun * 6 1.1 itojun * Redistribution and use in source and binary forms, with or without 7 1.1 itojun * modification, are permitted provided that the following conditions 8 1.1 itojun * are met: 9 1.1 itojun * 1. Redistributions of source code must retain the above copyright 10 1.1 itojun * notice, this list of conditions and the following disclaimer. 11 1.1 itojun * 2. Redistributions in binary form must reproduce the above copyright 12 1.1 itojun * notice, this list of conditions and the following disclaimer in the 13 1.1 itojun * documentation and/or other materials provided with the distribution. 14 1.1 itojun * 3. The name of the author may not be used to endorse or promote products 15 1.1 itojun * derived from this software without specific prior written permission. 16 1.1 itojun * 17 1.1 itojun * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 1.1 itojun * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 1.1 itojun * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 1.1 itojun * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 1.1 itojun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 1.1 itojun * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 1.1 itojun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 1.1 itojun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 1.1 itojun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 1.1 itojun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 1.1 itojun */ 28 1.1 itojun 29 1.1 itojun #ifndef _SH3_TMUREG_H_ 30 1.7 uch #define _SH3_TMUREG_H_ 31 1.6 uch #include <sh3/devreg.h> 32 1.1 itojun 33 1.1 itojun /* 34 1.5 uch * TMU 35 1.1 itojun */ 36 1.7 uch #define SH3_TOCR 0xfffffe90 37 1.7 uch #define SH3_TSTR 0xfffffe92 38 1.7 uch #define SH3_TCOR0 0xfffffe94 39 1.7 uch #define SH3_TCNT0 0xfffffe98 40 1.7 uch #define SH3_TCR0 0xfffffe9c 41 1.7 uch #define SH3_TCOR1 0xfffffea0 42 1.7 uch #define SH3_TCNT1 0xfffffea4 43 1.7 uch #define SH3_TCR1 0xfffffea8 44 1.7 uch #define SH3_TCOR2 0xfffffeac 45 1.7 uch #define SH3_TCNT2 0xfffffeb0 46 1.7 uch #define SH3_TCR2 0xfffffeb4 47 1.7 uch #define SH3_TCPR2 0xfffffeb8 48 1.5 uch 49 1.7 uch #define SH4_TOCR 0xffd80000 50 1.7 uch #define SH4_TSTR 0xffd80004 51 1.7 uch #define SH4_TCOR0 0xffd80008 52 1.7 uch #define SH4_TCNT0 0xffd8000c 53 1.7 uch #define SH4_TCR0 0xffd80010 54 1.7 uch #define SH4_TCOR1 0xffd80014 55 1.7 uch #define SH4_TCNT1 0xffd80018 56 1.7 uch #define SH4_TCR1 0xffd8001c 57 1.7 uch #define SH4_TCOR2 0xffd80020 58 1.7 uch #define SH4_TCNT2 0xffd80024 59 1.7 uch #define SH4_TCR2 0xffd80028 60 1.7 uch #define SH4_TCPR2 0xffd8002c 61 1.5 uch 62 1.7 uch #define TOCR_TCOE 0x01 63 1.7 uch #define TSTR_STR2 0x04 64 1.7 uch #define TSTR_STR1 0x02 65 1.7 uch #define TSTR_STR0 0x01 66 1.7 uch #define TCR_ICPF 0x0200 67 1.7 uch #define TCR_UNF 0x0100 68 1.7 uch #define TCR_ICPE1 0x0080 69 1.7 uch #define TCR_ICPE0 0x0040 70 1.7 uch #define TCR_UNIE 0x0020 71 1.7 uch #define TCR_CKEG1 0x0010 72 1.7 uch #define TCR_CKEG0 0x0008 73 1.7 uch #define TCR_TPSC2 0x0004 74 1.7 uch #define TCR_TPSC1 0x0002 75 1.7 uch #define TCR_TPSC0 0x0001 76 1.7 uch #define TCR_TPSC_P4 0x0000 77 1.7 uch #define TCR_TPSC_P16 0x0001 78 1.7 uch #define TCR_TPSC_P64 0x0002 79 1.7 uch #define TCR_TPSC_P256 0x0003 80 1.7 uch #define SH3_TCR_TPSC_RTC 0x0004 81 1.7 uch #define SH3_TCR_TPSC_TCLK 0x0005 82 1.7 uch #define SH4_TCR_TPSC_P512 0x0004 83 1.7 uch #define SH4_TCR_TPSC_RTC 0x0006 84 1.7 uch #define SH4_TCR_TPSC_TCLK 0x0007 85 1.6 uch 86 1.6 uch #ifndef _LOCORE 87 1.6 uch #if defined(SH3) && defined(SH4) 88 1.6 uch extern u_int32_t __sh_TOCR; 89 1.6 uch extern u_int32_t __sh_TSTR; 90 1.6 uch extern u_int32_t __sh_TCOR0; 91 1.6 uch extern u_int32_t __sh_TCNT0; 92 1.6 uch extern u_int32_t __sh_TCR0; 93 1.6 uch extern u_int32_t __sh_TCOR1; 94 1.6 uch extern u_int32_t __sh_TCNT1; 95 1.6 uch extern u_int32_t __sh_TCR1; 96 1.6 uch extern u_int32_t __sh_TCOR2; 97 1.6 uch extern u_int32_t __sh_TCNT2; 98 1.6 uch extern u_int32_t __sh_TCR2; 99 1.6 uch extern u_int32_t __sh_TCPR2; 100 1.6 uch #endif /* SH3 && SH4 */ 101 1.6 uch #endif /* !_LOCORE */ 102 1.3 msaitoh 103 1.1 itojun #endif /* !_SH3_TMUREG_H_ */ 104
Indexes created Fri Sep 26 08:10:20 GMT 2025