intr.h revision 1.7
11.7Smatt/* $NetBSD: intr.h,v 1.7 2007/03/08 20:48:39 matt Exp $ */ 21.1Sthorpej 31.1Sthorpej/* 41.1Sthorpej * Copyright (c) 1997 Mark Brinicombe. 51.1Sthorpej * All rights reserved. 61.1Sthorpej * 71.1Sthorpej * Redistribution and use in source and binary forms, with or without 81.1Sthorpej * modification, are permitted provided that the following conditions 91.1Sthorpej * are met: 101.1Sthorpej * 1. Redistributions of source code must retain the above copyright 111.1Sthorpej * notice, this list of conditions and the following disclaimer. 121.1Sthorpej * 2. Redistributions in binary form must reproduce the above copyright 131.1Sthorpej * notice, this list of conditions and the following disclaimer in the 141.1Sthorpej * documentation and/or other materials provided with the distribution. 151.1Sthorpej * 3. All advertising materials mentioning features or use of this software 161.1Sthorpej * must display the following acknowledgement: 171.1Sthorpej * This product includes software developed by Mark Brinicombe 181.1Sthorpej * for the NetBSD Project. 191.1Sthorpej * 4. The name of the company nor the name of the author may be used to 201.1Sthorpej * endorse or promote products derived from this software without specific 211.1Sthorpej * prior written permission. 221.1Sthorpej * 231.1Sthorpej * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 241.1Sthorpej * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 251.1Sthorpej * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 261.1Sthorpej * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 271.1Sthorpej * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 281.1Sthorpej * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 291.1Sthorpej * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 301.1Sthorpej * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 311.1Sthorpej * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 321.1Sthorpej * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 331.1Sthorpej * SUCH DAMAGE. 341.1Sthorpej */ 351.1Sthorpej 361.7Smatt#ifndef _SHARK_INTR_H_ 371.7Smatt#define _SHARK_INTR_H_ 381.1Sthorpej 391.1Sthorpej/* Define the various Interrupt Priority Levels */ 401.1Sthorpej 411.1Sthorpej/* Hardware Interrupt Priority Levels are not mutually exclusive. */ 421.1Sthorpej 431.5Smatt#define IPL_NONE 0 441.6Smatt#define IPL_SOFT 1 451.6Smatt#define IPL_SOFTCLOCK 2 461.6Smatt#define IPL_SOFTNET 3 471.6Smatt#define IPL_BIO 4 /* block I/O */ 481.6Smatt#define IPL_NET 5 /* network */ 491.6Smatt#define IPL_SOFTSERIAL 6 501.6Smatt#define IPL_TTY 7 /* terminal */ 511.6Smatt#define IPL_VM 8 /* memory allocation */ 521.6Smatt#define IPL_AUDIO 9 /* audio */ 531.6Smatt#define IPL_CLOCK 10 /* clock */ 541.6Smatt#define IPL_STATCLOCK 11 551.6Smatt#define IPL_SERIAL 12 /* serial */ 561.6Smatt#define IPL_HIGH 13 /* */ 571.4Syamt#define IPL_LOCK IPL_HIGH 581.4Syamt#define IPL_SCHED IPL_HIGH 591.1Sthorpej 601.6Smatt#define IPL_LEVELS 14 611.1Sthorpej 621.1Sthorpej#define IST_UNUSABLE -1 /* interrupt cannot be used */ 631.1Sthorpej#define IST_NONE 0 /* none (dummy) */ 641.1Sthorpej#define IST_PULSE 1 /* pulsed */ 651.1Sthorpej#define IST_EDGE 2 /* edge-triggered */ 661.1Sthorpej#define IST_LEVEL 3 /* level-triggered */ 671.1Sthorpej 681.1Sthorpej#include <arm/arm32/psl.h> 691.1Sthorpej 701.7Smatt#endif /* _SHARK_INTR_H */ 71