irqhandler.h revision 1.1
1 /* $NetBSD: irqhandler.h,v 1.1 2002/02/10 01:57:23 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1996 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Mark Brinicombe 21 * for the NetBSD Project. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 28 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * IRQ related stuff (defines + structures) 39 * 40 * Created : 30/09/94 41 */ 42 43 #ifndef _ARM32_IRQHANDLER_H_ 44 #define _ARM32_IRQHANDLER_H_ 45 46 #ifndef _LOCORE 47 #include <sys/types.h> 48 #endif /* _LOCORE */ 49 50 /* Define the IRQ bits */ 51 52 /* 53 * XXX this is really getting rather horrible. 54 * Shortly to be replaced with system specific interrupt tables and handling 55 */ 56 57 #ifdef OFWGENCFG 58 /* These are just made up for now! -JJK */ 59 #define IRQ_TIMER0 0 60 #endif 61 62 #ifdef SHARK 63 /* 64 * shark hardware requirements for IRQ's: 65 * IDE: 14 (hardwired) 66 * PCI: 5, 9, 10, 11, 15(mapped to UMIPCI inta, intb, intc, intd) 67 * UMIISA: 10, 11, 12 68 * SuperIO: 1, 3..12, 14, 15(all may be remapped. defaults as follows.) 69 * KBC: 1 70 * USI: 3 (UART with Slow Infrared support) 71 * UART: 4 72 * FLOPPY: 6 (not currently used on shark) 73 * PARALLEL: 7 74 * RTC: 8 (not used on shark: RTC in sequoia used) 75 * MOUSE: 12 76 * Sequoia: 8 (internal RTC hardwired to irq 8) 77 * Codec: 5, 7, 9, 10, 15 (irqe, connected to 15, has special status.) 78 * CS8900: 5, 10, 11, 12 (P.14 of datasheet sez only 1 used/time) 79 * FERR#: 13 (unconnected floating point error) 80 * 81 * total of 15 irqs: 82 * timer, ide, 2 umi = isa/pci, ethernet, 2 codec, kb, usi, uart, floppy, 83 * parallel, rtc, mouse, ferr (irq 13) 84 * 85 * eventually, need to read the OFW dev info tree, and allocate IRQs. 86 * hardcoded for now. 87 */ 88 #define IRQ_TIMER0 0x00 /* hardwired to 8254 counter 0 in sequoia */ 89 #define IRQ_KEYBOARD 0x01 90 #define IRQ_CASCADE 0x02 /* hardwired IRQ for second 8259 = IRQ_SLAVE */ 91 #define IRQ_USI 0x03 92 #define IRQ_UART 0x04 93 #define IRQ_ETHERNET 0x05 94 #define IRQ_FLOPPY 0x06 95 #define IRQ_PARALLEL 0x07 96 97 #define IRQ_RTC 0x08 /* hardwired to the sequoia RTC */ 98 #define IRQ_CODEC1 0x09 99 #define IRQ_UMI1 0x0A /* isa or pci */ 100 #define IRQ_UMI2 0x0B /* isa or pci */ 101 102 #define IRQ_MOUSE 0x0C 103 #define IRQ_FERR 0x0D /* FERR# pin on sequoia needs to be connected */ 104 #define IRQ_IDE 0x0E /* hardwired to the IDE connector */ 105 #define IRQ_CODEC2 0x0F /* special interrupt on codec */ 106 107 /* XXX should this go into isa_machdep.h. Somewhere else? */ 108 /* Interrupt sharing types. */ 109 #define IST_NONE 0 /* none */ 110 #define IST_PULSE 1 /* pulsed */ 111 #define IST_EDGE 2 /* edge-triggered */ 112 #define IST_LEVEL 3 /* level-triggered */ 113 114 #endif /* SHARK */ 115 116 #define IRQ_VSYNC IRQ_FLYBACK /* Aliased */ 117 #define IRQ_NETSLOT IRQ_EXTENDED 118 119 #define IRQ_INSTRUCT -1 120 #define NIRQS 0x20 121 122 #include <machine/intr.h> 123 124 #ifndef _LOCORE 125 typedef struct irqhandler { 126 int (*ih_func) __P((void *arg));/* handler function */ 127 void *ih_arg; /* Argument to handler */ 128 int ih_level; /* Interrupt level */ 129 int ih_num; /* Interrupt number (for accounting) */ 130 const char *ih_name; /* Name of interrupt (for vmstat -i) */ 131 u_int ih_flags; /* Interrupt flags */ 132 u_int ih_maskaddr; /* mask address for expansion cards */ 133 u_int ih_maskbits; /* interrupt bit for expansion cards */ 134 struct irqhandler *ih_next; /* next handler */ 135 } irqhandler_t; 136 137 #ifdef _KERNEL 138 extern u_int irqmasks[IPL_LEVELS]; 139 extern irqhandler_t *irqhandlers[NIRQS]; 140 141 void irq_init __P((void)); 142 int irq_claim __P((int, irqhandler_t *)); 143 int irq_release __P((int, irqhandler_t *)); 144 void *intr_claim __P((int irq, int level, const char *name, int (*func) __P((void *)), void *arg)); 145 int intr_release __P((void *ih)); 146 void irq_setmasks __P((void)); 147 void disable_irq __P((int)); 148 void enable_irq __P((int)); 149 #endif /* _KERNEL */ 150 #endif /* _LOCORE */ 151 152 #define IRQ_FLAG_ACTIVE 0x00000001 /* This is the active handler in list */ 153 154 #endif /* _ARM32_IRQHANDLER_H_ */ 155 156 /* End of irqhandler.h */ 157
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