vlpci.c revision 1.7
1 /* $NetBSD: vlpci.c,v 1.7 2017/04/18 12:17:12 flxd Exp $ */ 2 3 /* 4 * Copyright (c) 2017 Jonathan A. Kollasch 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: vlpci.c,v 1.7 2017/04/18 12:17:12 flxd Exp $"); 31 32 #include "opt_pci.h" 33 #include "pci.h" 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/device.h> 38 #include <sys/extent.h> 39 #include <sys/mutex.h> 40 #include <uvm/uvm.h> 41 #include <machine/pio.h> 42 #include <machine/pmap.h> 43 #include <machine/ofw.h> 44 45 #include <dev/isa/isavar.h> 46 47 #include <dev/ofw/openfirm.h> 48 49 #include <dev/pci/pcivar.h> 50 #include <dev/pci/pciconf.h> 51 #include <arm/pci_machdep.h> 52 53 static int vlpci_match(device_t, struct cfdata *, void *); 54 static void vlpci_attach(device_t, device_t, void *); 55 56 static void vlpci_pc_attach_hook(device_t, device_t, 57 struct pcibus_attach_args *); 58 static int vlpci_pc_bus_maxdevs(void *, int); 59 static pcitag_t vlpci_pc_make_tag(void *, int, int, int); 60 static void vlpci_pc_decompose_tag(void *, pcitag_t, int *, int *, int *); 61 static pcireg_t vlpci_pc_conf_read(void *, pcitag_t, int); 62 static void vlpci_pc_conf_write(void *, pcitag_t, int, pcireg_t); 63 64 static int vlpci_pc_intr_map(const struct pci_attach_args *, 65 pci_intr_handle_t *); 66 static const char * vlpci_pc_intr_string(void *, pci_intr_handle_t, char *, 67 size_t); 68 static const struct evcnt * vlpci_pc_intr_evcnt(void *, pci_intr_handle_t); 69 static void * vlpci_pc_intr_establish(void *, pci_intr_handle_t, int, 70 int (*)(void *), void *); 71 static void vlpci_pc_intr_disestablish(void *, void *); 72 73 #ifdef __HAVE_PCI_CONF_HOOK 74 static int vlpci_pc_conf_hook(void *, int, int, int, pcireg_t); 75 #endif 76 static void vlpci_pc_conf_interrupt(void *, int, int, int, int, int *); 77 78 struct vlpci_softc { 79 device_t sc_dev; 80 kmutex_t sc_lock; 81 bus_space_handle_t sc_conf_ioh; 82 bus_space_handle_t sc_reg_ioh; 83 struct arm32_pci_chipset sc_pc; 84 }; 85 86 CFATTACH_DECL_NEW(vlpci, sizeof(struct vlpci_softc), 87 vlpci_match, vlpci_attach, NULL, NULL); 88 89 static const char * const compat_strings[] = { "via,vt82c505", NULL }; 90 91 vaddr_t vlpci_mem_vaddr = 0; 92 paddr_t vlpci_mem_paddr; 93 struct bus_space vlpci_memt; 94 95 static void 96 regwrite_1(struct vlpci_softc * const sc, uint8_t off, uint8_t val) 97 { 98 99 mutex_spin_enter(&sc->sc_lock); 100 bus_space_write_1(&isa_io_bs_tag, sc->sc_reg_ioh, 0, off); 101 bus_space_write_1(&isa_io_bs_tag, sc->sc_reg_ioh, 1, val); 102 mutex_spin_exit(&sc->sc_lock); 103 } 104 105 static uint8_t 106 regread_1(struct vlpci_softc * const sc, uint8_t off) 107 { 108 uint8_t reg; 109 110 mutex_spin_enter(&sc->sc_lock); 111 bus_space_write_1(&isa_io_bs_tag, sc->sc_reg_ioh, 0, off); 112 reg = bus_space_read_1(&isa_io_bs_tag, sc->sc_reg_ioh, 1); 113 mutex_spin_exit(&sc->sc_lock); 114 return reg; 115 } 116 117 static void 118 vlpci_dump_window(struct vlpci_softc *sc, int num) 119 { 120 int regaddr = 0x87 + 3 * num; 121 uint32_t addr, size; 122 uint8_t attr; 123 124 addr = regread_1(sc, regaddr) << 24; 125 addr |= regread_1(sc, regaddr + 1) << 16; 126 attr = regread_1(sc, regaddr + 2); 127 size = 0x00010000 << ((attr & 0x1c) >> 2); 128 printf("memory window #%d at %08x size %08x flags %x\n", num, addr, 129 size, attr); 130 } 131 132 static int 133 vlpci_map(void *t, bus_addr_t bpa, bus_size_t size, int cacheable, 134 bus_space_handle_t *bshp) 135 { 136 137 *bshp = vlpci_mem_vaddr - 0x02000000 + bpa; 138 printf("%s: %08lx -> %08lx\n", __func__, bpa, *bshp); 139 return(0); 140 } 141 142 static paddr_t 143 vlpci_mmap(void *cookie, bus_addr_t addr, off_t off, int prot, 144 int flags) 145 { 146 paddr_t ret; 147 148 ret = vlpci_mem_paddr + addr + off; 149 150 if (flags & BUS_SPACE_MAP_PREFETCHABLE) 151 return (arm_btop(ret) | ARM32_MMAP_WRITECOMBINE); 152 else 153 return arm_btop(ret); 154 } 155 156 static int 157 vlpci_match(device_t parent, struct cfdata *match, void *aux) 158 { 159 struct ofbus_attach_args * const oba = aux; 160 161 if (of_compatible(oba->oba_phandle, compat_strings) < 0) 162 return 0; 163 164 return 2; /* beat generic ofbus */ 165 } 166 167 static void 168 vlpci_attach(device_t parent, device_t self, void *aux) 169 { 170 struct vlpci_softc * const sc = device_private(self); 171 pci_chipset_tag_t const pc = &sc->sc_pc; 172 struct pcibus_attach_args pba; 173 174 aprint_normal("\n"); 175 176 sc->sc_dev = self; 177 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 178 memset(&pba, 0, sizeof(pba)); 179 180 if (bus_space_map(&isa_io_bs_tag, 0xa8, 0x2, 181 0, &sc->sc_reg_ioh) != 0) { 182 aprint_error_dev(self, "failed to map 0xa8-9\n"); 183 return; 184 } 185 if (bus_space_map(&isa_io_bs_tag, 0xcf8, 0x8, 186 0, &sc->sc_conf_ioh) != 0) { 187 aprint_error_dev(self, "failed to map 0xcf8-f\n"); 188 return; 189 } 190 191 /* Enable VLB/PCI bridge */ 192 regwrite_1(sc, 0x96, 0x18); /* enable LOCAL#, compatible mode */ 193 regwrite_1(sc, 0x93, 0x60); /* IOCHCK# on IOCHCK#/NMI */ 194 regwrite_1(sc, 0x86, 0x61); /* invert all INTx to IRQ */ 195 regwrite_1(sc, 0x97, 0x00); /* don't do per-INTx conversions */ 196 regwrite_1(sc, 0x91, 0xbb); /* enable INT[AB] to IRQ 10 */ 197 regwrite_1(sc, 0x90, 0xbb); /* enable INT[CD] to IRQ 10 */ 198 /* 199 * XXX 200 * set memory size to 255MB, so the bridge knows which cycles go to RAM 201 * shark's RAM is in the upper half of the lower 256MB, part of the 202 * lower half is occupied by the graphics chip 203 * ... or that's the theory. OF puts PCI BARS at 0x02000000 which 204 * overlaps with when we do this and pci memory access doesn't work. 205 */ 206 regwrite_1(sc, 0x81, 0x1); 207 208 regwrite_1(sc, 0x82, 0x08); /* PCI dynamic acceleration decoding enable */ 209 regwrite_1(sc, 0x83, 0x08); 210 printf("reg 0x83 %02x\n", regread_1(sc, 0x83)); 211 212 #if 1 213 /* program window #0 to 0x08000000 */ 214 regwrite_1(sc, 0x87, 0x08); 215 regwrite_1(sc, 0x88, 0x00); 216 regwrite_1(sc, 0x89, 0x38); /* VL, unbuffered, 4MB */ 217 #else 218 regwrite_1(sc, 0x87, 0x00); 219 regwrite_1(sc, 0x88, 0x00); 220 regwrite_1(sc, 0x89, 0x00); 221 #endif 222 223 vlpci_mem_paddr = 0x02000000; /* get from OF! */ 224 225 /* 226 * we map in 1MB at 0x02000000, so program window #1 accordingly 227 */ 228 regwrite_1(sc, 0x8a, vlpci_mem_paddr >> 24); 229 regwrite_1(sc, 0x8b, (vlpci_mem_paddr >> 16) & 0xff); 230 regwrite_1(sc, 0x8c, 0x90); /* PCI, unbuffered, 1MB */ 231 232 /* now map in some of the memory space */ 233 printf("vlpci_mem_vaddr %08lx\n", vlpci_mem_vaddr); 234 memcpy(&vlpci_memt, &isa_io_bs_tag, sizeof(struct bus_space)); 235 vlpci_memt.bs_cookie = (void *)vlpci_mem_vaddr; 236 vlpci_memt.bs_map = vlpci_map; 237 vlpci_memt.bs_mmap = vlpci_mmap; 238 239 pc->pc_conf_v = sc; 240 pc->pc_attach_hook = vlpci_pc_attach_hook; 241 pc->pc_bus_maxdevs = vlpci_pc_bus_maxdevs; 242 pc->pc_make_tag = vlpci_pc_make_tag; 243 pc->pc_decompose_tag = vlpci_pc_decompose_tag; 244 pc->pc_conf_read = vlpci_pc_conf_read; 245 pc->pc_conf_write = vlpci_pc_conf_write; 246 247 pc->pc_intr_v = sc; 248 pc->pc_intr_map = vlpci_pc_intr_map; 249 pc->pc_intr_string = vlpci_pc_intr_string; 250 pc->pc_intr_evcnt = vlpci_pc_intr_evcnt; 251 pc->pc_intr_establish = vlpci_pc_intr_establish; 252 pc->pc_intr_disestablish = vlpci_pc_intr_disestablish; 253 254 #ifdef __HAVE_PCI_CONF_HOOK 255 pc->pc_conf_hook = vlpci_pc_conf_hook; 256 #endif 257 pc->pc_conf_interrupt = vlpci_pc_conf_interrupt; 258 259 /* try to assure IO space is enabled on the default device-function */ 260 vlpci_pc_conf_write(sc, vlpci_pc_make_tag(sc, 0, 6, 0), 261 PCI_COMMAND_STATUS_REG, 262 vlpci_pc_conf_read(sc, vlpci_pc_make_tag(sc, 0, 6, 0), 263 PCI_COMMAND_STATUS_REG) | 264 PCI_COMMAND_IO_ENABLE); 265 266 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY; 267 pba.pba_iot = &isa_io_bs_tag; 268 pba.pba_memt = &vlpci_memt; 269 pba.pba_dmat = &isa_bus_dma_tag; 270 pba.pba_pc = &sc->sc_pc; 271 pba.pba_bus = 0; 272 273 printf("dma %lx %lx, %lx\n", isa_bus_dma_tag._ranges[0].dr_sysbase, 274 isa_bus_dma_tag._ranges[0].dr_busbase, 275 isa_bus_dma_tag._ranges[0].dr_len); 276 277 vlpci_dump_window(sc, 0); 278 vlpci_dump_window(sc, 1); 279 vlpci_dump_window(sc, 2); 280 281 config_found_ia(self, "pcibus", &pba, pcibusprint); 282 } 283 284 static void 285 vlpci_pc_attach_hook(device_t parent, device_t self, 286 struct pcibus_attach_args *pba) 287 { 288 } 289 290 static int 291 vlpci_pc_bus_maxdevs(void *v, int busno) 292 { 293 294 return busno == 0 ? 32 : 0; 295 } 296 297 static pcitag_t 298 vlpci_pc_make_tag(void *v, int b, int d, int f) 299 { 300 301 return (b << 16) | (d << 11) | (f << 8); 302 } 303 304 static void 305 vlpci_pc_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp) 306 { 307 308 if (bp) 309 *bp = (tag >> 16) & 0xff; 310 if (dp) 311 *dp = (tag >> 11) & 0x1f; 312 if (fp) 313 *fp = (tag >> 8) & 0x7; 314 } 315 316 static pcireg_t 317 vlpci_pc_conf_read(void *v, pcitag_t tag, int offset) 318 { 319 struct vlpci_softc * const sc = v; 320 pcireg_t ret; 321 322 KASSERT((offset & 3) == 0); 323 324 if (offset >= PCI_CONF_SIZE) 325 return 0xffffffff; 326 327 mutex_spin_enter(&sc->sc_lock); 328 bus_space_write_4(&isa_io_bs_tag, sc->sc_conf_ioh, 0, 329 0x80000000UL|tag|offset); 330 ret = bus_space_read_4(&isa_io_bs_tag, sc->sc_conf_ioh, 4); 331 mutex_spin_exit(&sc->sc_lock); 332 333 #if 0 334 device_printf(sc->sc_dev, "%s tag %x offset %x ret %x\n", 335 __func__, (unsigned int)tag, offset, ret); 336 #endif 337 338 return ret; 339 } 340 341 static void 342 vlpci_pc_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val) 343 { 344 struct vlpci_softc * const sc = v; 345 346 KASSERT((offset & 3) == 0); 347 348 if (offset >= PCI_CONF_SIZE) 349 return; 350 351 #if 0 352 device_printf(sc->sc_dev, "%s tag %x offset %x val %x\n", 353 __func__, (unsigned int)tag, offset, val); 354 #endif 355 356 mutex_spin_enter(&sc->sc_lock); 357 bus_space_write_4(&isa_io_bs_tag, sc->sc_conf_ioh, 0, 358 0x80000000UL|tag|offset); 359 bus_space_write_4(&isa_io_bs_tag, sc->sc_conf_ioh, 4, val); 360 mutex_spin_exit(&sc->sc_lock); 361 } 362 363 static int 364 vlpci_pc_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ih) 365 { 366 367 switch (pa->pa_intrpin) { 368 default: 369 case 0: 370 return EINVAL; 371 case 1: 372 case 2: 373 case 3: 374 case 4: 375 *ih = 10; 376 return 0; 377 } 378 } 379 380 static const char * 381 vlpci_pc_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len) 382 { 383 384 if (ih == PCI_INTERRUPT_PIN_NONE) 385 return NULL; 386 snprintf(buf, len, "irq %lu", ih); 387 return buf; 388 } 389 390 static const struct evcnt * 391 vlpci_pc_intr_evcnt(void *v, pci_intr_handle_t ih) 392 { 393 394 return NULL; 395 } 396 397 static void * 398 vlpci_pc_intr_establish(void *v, pci_intr_handle_t pih, int ipl, 399 int (*callback)(void *), void *arg) 400 { 401 402 if (pih == 0) 403 return NULL; 404 405 return isa_intr_establish(NULL, pih, IST_LEVEL, ipl, callback, arg); 406 } 407 408 static void 409 vlpci_pc_intr_disestablish(void *v, void *w) 410 { 411 412 return isa_intr_disestablish(NULL, v); 413 } 414 415 #ifdef __HAVE_PCI_CONF_HOOK 416 static int 417 vlpci_pc_conf_hook(void *v, int b, int d, int f, pcireg_t id) 418 { 419 420 return PCI_CONF_DEFAULT /*& ~PCI_CONF_ENABLE_BM*/; 421 } 422 #endif 423 424 static void 425 vlpci_pc_conf_interrupt(void *v, int bus, int dev, int ipin, int swiz, 426 int *ilinep) 427 { 428 429 *ilinep = 0xff; /* XXX */ 430 } 431
Indexes created Thu Sep 25 16:09:42 GMT 2025