1 1.42 thorpej /* $NetBSD: ebus.c,v 1.42 2022/01/22 11:49:16 thorpej Exp $ */ 2 1.1 uwe 3 1.1 uwe /* 4 1.1 uwe * Copyright (c) 1999, 2000 Matthew R. Green 5 1.1 uwe * All rights reserved. 6 1.1 uwe * 7 1.1 uwe * Redistribution and use in source and binary forms, with or without 8 1.1 uwe * modification, are permitted provided that the following conditions 9 1.1 uwe * are met: 10 1.1 uwe * 1. Redistributions of source code must retain the above copyright 11 1.1 uwe * notice, this list of conditions and the following disclaimer. 12 1.1 uwe * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 uwe * notice, this list of conditions and the following disclaimer in the 14 1.1 uwe * documentation and/or other materials provided with the distribution. 15 1.1 uwe * 16 1.1 uwe * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.1 uwe * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.1 uwe * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.1 uwe * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.1 uwe * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.1 uwe * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.1 uwe * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.1 uwe * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.1 uwe * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1 uwe * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1 uwe * SUCH DAMAGE. 27 1.1 uwe */ 28 1.1 uwe 29 1.1 uwe /* 30 1.1 uwe * EBus support for PCI based SPARC systems (ms-IIep, Ultra). 31 1.1 uwe * EBus is documented in PCIO manual (Sun Part#: 802-7837-01). 32 1.1 uwe */ 33 1.14 lukem 34 1.14 lukem #include <sys/cdefs.h> 35 1.42 thorpej __KERNEL_RCSID(0, "$NetBSD: ebus.c,v 1.42 2022/01/22 11:49:16 thorpej Exp $"); 36 1.1 uwe 37 1.3 uwe #if defined(DEBUG) && !defined(EBUS_DEBUG) 38 1.3 uwe #define EBUS_DEBUG 39 1.3 uwe #endif 40 1.1 uwe 41 1.3 uwe #ifdef EBUS_DEBUG 42 1.1 uwe #define EDB_PROM 0x01 43 1.1 uwe #define EDB_CHILD 0x02 44 1.1 uwe #define EDB_INTRMAP 0x04 45 1.1 uwe #define EDB_BUSMAP 0x08 46 1.1 uwe #define EDB_BUSDMA 0x10 47 1.1 uwe #define EDB_INTR 0x20 48 1.1 uwe int ebus_debug = 0; 49 1.1 uwe #define DPRINTF(l, s) do { if (ebus_debug & l) printf s; } while (0) 50 1.1 uwe #else 51 1.1 uwe #define DPRINTF(l, s) 52 1.1 uwe #endif 53 1.1 uwe 54 1.1 uwe #include <sys/param.h> 55 1.21 uwe #include <sys/systm.h> 56 1.1 uwe #include <sys/device.h> 57 1.1 uwe #include <sys/errno.h> 58 1.1 uwe #include <sys/malloc.h> 59 1.38 thorpej #include <sys/kmem.h> 60 1.22 macallan #include <sys/callout.h> 61 1.22 macallan #include <sys/kernel.h> 62 1.1 uwe 63 1.1 uwe #define _SPARC_BUS_DMA_PRIVATE 64 1.32 dyoung #include <sys/bus.h> 65 1.1 uwe #include <machine/autoconf.h> 66 1.1 uwe 67 1.1 uwe #include <dev/pci/pcivar.h> 68 1.1 uwe #include <dev/pci/pcireg.h> 69 1.1 uwe #include <dev/pci/pcidevs.h> 70 1.1 uwe 71 1.1 uwe #include <dev/ofw/ofw_pci.h> 72 1.1 uwe 73 1.4 uwe #include <dev/ebus/ebusreg.h> 74 1.4 uwe #include <dev/ebus/ebusvar.h> 75 1.1 uwe 76 1.22 macallan #include "opt_blink.h" 77 1.22 macallan 78 1.22 macallan volatile uint32_t *ebus_LED = NULL; 79 1.22 macallan 80 1.22 macallan #ifdef BLINK 81 1.28 ad static callout_t ebus_blink_ch; 82 1.22 macallan static void ebus_blink(void *); 83 1.22 macallan #endif 84 1.1 uwe 85 1.4 uwe struct ebus_softc { 86 1.33 mrg device_t sc_dev; 87 1.31 tsutsui device_t sc_parent; /* PCI bus */ 88 1.4 uwe 89 1.4 uwe int sc_node; /* PROM node */ 90 1.4 uwe 91 1.4 uwe bus_space_tag_t sc_bustag; /* mem tag from pci */ 92 1.4 uwe 93 1.21 uwe /* 94 1.4 uwe * "reg" contains exactly the info we'd get by processing 95 1.4 uwe * "ranges", so don't bother with "ranges" and use "reg" directly. 96 1.4 uwe */ 97 1.4 uwe struct ofw_pci_register *sc_reg; 98 1.4 uwe int sc_nreg; 99 1.4 uwe }; 100 1.4 uwe 101 1.31 tsutsui static int ebus_match(device_t, cfdata_t, void *); 102 1.31 tsutsui static void ebus_attach(device_t, device_t, void *); 103 1.1 uwe 104 1.33 mrg CFATTACH_DECL_NEW(ebus, sizeof(struct ebus_softc), 105 1.9 thorpej ebus_match, ebus_attach, NULL, NULL); 106 1.1 uwe 107 1.21 uwe static int ebus_setup_attach_args(struct ebus_softc *, bus_space_tag_t, 108 1.21 uwe bus_dma_tag_t, int, struct ebus_attach_args *); 109 1.21 uwe static void ebus_destroy_attach_args(struct ebus_attach_args *); 110 1.21 uwe static int ebus_print(void *, const char *); 111 1.1 uwe 112 1.1 uwe /* 113 1.13 wiz * here are our bus space and bus DMA routines. 114 1.1 uwe */ 115 1.1 uwe static paddr_t ebus_bus_mmap(bus_space_tag_t, bus_addr_t, off_t, int, int); 116 1.21 uwe static int _ebus_bus_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, 117 1.21 uwe vaddr_t, bus_space_handle_t *); 118 1.10 pk static void *ebus_intr_establish(bus_space_tag_t, int, int, 119 1.10 pk int (*)(void *), void *, void (*)(void)); 120 1.1 uwe 121 1.4 uwe static bus_dma_tag_t ebus_alloc_dma_tag(struct ebus_softc *, bus_dma_tag_t); 122 1.4 uwe 123 1.4 uwe 124 1.1 uwe /* 125 1.1 uwe * Working around PROM bogosity. 126 1.1 uwe * 127 1.1 uwe * EBus doesn't have official OFW binding. sparc64 has a de-facto 128 1.1 uwe * standard but patching it in in prompatch.c and then decoding it 129 1.1 uwe * here would be an overkill for ms-IIep. 130 1.1 uwe * 131 1.1 uwe * So we assume that all ms-IIep based systems use PCIO chip only in 132 1.1 uwe * "motherboard mode" with interrupt lines wired directly to ms-IIep 133 1.1 uwe * interrupt inputs. 134 1.1 uwe * 135 1.1 uwe * Note that this is ineligible for prompatch.c, as we are not 136 1.1 uwe * correcting PROM to conform to some established standard, this hack 137 1.1 uwe * is tied to this version of ebus driver and as such it's better stay 138 1.1 uwe * private to the driver. 139 1.1 uwe */ 140 1.1 uwe 141 1.1 uwe struct msiiep_ebus_intr_wiring { 142 1.1 uwe const char *name; /* PROM node */ 143 1.1 uwe int line; /* ms-IIep interrupt input */ 144 1.1 uwe }; 145 1.1 uwe 146 1.21 uwe static const struct msiiep_ebus_intr_wiring krups_ebus_intr_wiring[] = { 147 1.1 uwe { "su", 0 }, { "8042", 0 }, { "sound", 3 } 148 1.1 uwe }; 149 1.1 uwe 150 1.25 jdc static const struct msiiep_ebus_intr_wiring espresso_ebus_intr_wiring[] = { 151 1.25 jdc { "su", 0 }, { "8042", 0 }, { "sound", 3 }, { "parallel", 4 } 152 1.25 jdc }; 153 1.25 jdc 154 1.1 uwe 155 1.1 uwe struct msiiep_known_ebus_wiring { 156 1.1 uwe const char *model; 157 1.21 uwe const struct msiiep_ebus_intr_wiring *map; 158 1.1 uwe int mapsize; 159 1.1 uwe }; 160 1.1 uwe 161 1.1 uwe #define MSIIEP_MODEL_WIRING(name, map) \ 162 1.1 uwe { name, map, sizeof(map)/sizeof(map[0]) } 163 1.1 uwe 164 1.21 uwe static const struct msiiep_known_ebus_wiring known_models[] = { 165 1.1 uwe MSIIEP_MODEL_WIRING("SUNW,501-4267", krups_ebus_intr_wiring), 166 1.25 jdc MSIIEP_MODEL_WIRING("SUNW,375-0059", espresso_ebus_intr_wiring), 167 1.1 uwe { NULL, NULL, 0} 168 1.1 uwe }; 169 1.1 uwe 170 1.1 uwe 171 1.1 uwe /* 172 1.1 uwe * XXX: This assumes single EBus. However I don't think any ms-IIep 173 1.1 uwe * system ever used more than one. In any case, without looking at a 174 1.1 uwe * system with multiple PCIO chips I don't know how to correctly 175 1.1 uwe * program the driver to handle PROM glitches in them, so for the time 176 1.1 uwe * being just use globals. 177 1.1 uwe */ 178 1.21 uwe static const struct msiiep_ebus_intr_wiring *wiring_map; 179 1.1 uwe static int wiring_map_size; 180 1.1 uwe 181 1.1 uwe static int ebus_init_wiring_table(struct ebus_softc *); 182 1.1 uwe 183 1.1 uwe 184 1.21 uwe static int 185 1.31 tsutsui ebus_match(device_t parent, cfdata_t cf, void *aux) 186 1.1 uwe { 187 1.1 uwe struct pci_attach_args *pa = aux; 188 1.1 uwe char name[10]; 189 1.1 uwe int node; 190 1.1 uwe 191 1.1 uwe /* Only attach if there's a PROM node. */ 192 1.1 uwe node = PCITAG_NODE(pa->pa_tag); 193 1.1 uwe if (node == -1) 194 1.1 uwe return (0); 195 1.1 uwe 196 1.16 pk prom_getpropstringA(node, "name", name, sizeof name); 197 1.1 uwe if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE 198 1.1 uwe && PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN 199 1.1 uwe && PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS 200 1.1 uwe && strcmp(name, "ebus") == 0) 201 1.1 uwe return (1); 202 1.1 uwe 203 1.1 uwe return (0); 204 1.1 uwe } 205 1.1 uwe 206 1.1 uwe 207 1.1 uwe static int 208 1.21 uwe ebus_init_wiring_table(struct ebus_softc *sc) 209 1.1 uwe { 210 1.21 uwe const struct msiiep_known_ebus_wiring *p; 211 1.1 uwe char buf[32]; 212 1.1 uwe char *model; 213 1.1 uwe 214 1.1 uwe if (wiring_map != NULL) { 215 1.36 msaitoh printf("%s: global ebus wiring map already initialized\n", 216 1.33 mrg device_xname(sc->sc_dev)); 217 1.1 uwe return (0); 218 1.1 uwe } 219 1.1 uwe 220 1.16 pk model = prom_getpropstringA(prom_findroot(), "model", 221 1.1 uwe buf, sizeof(buf)); 222 1.1 uwe if (model == NULL) 223 1.1 uwe panic("ebus_init_wiring_table: no \"model\" property"); 224 1.1 uwe 225 1.1 uwe for (p = known_models; p->model != NULL; ++p) 226 1.1 uwe if (strcmp(model, p->model) == 0) { 227 1.1 uwe wiring_map = p->map; 228 1.1 uwe wiring_map_size = p->mapsize; 229 1.1 uwe return (1); 230 1.1 uwe } 231 1.1 uwe 232 1.1 uwe /* not found? we should have failed in pci_attach_hook then. */ 233 1.1 uwe panic("ebus_init_wiring_table: unknown model %s", model); 234 1.1 uwe } 235 1.1 uwe 236 1.1 uwe 237 1.1 uwe /* 238 1.35 snj * attach an ebus and all its children. this code is modeled 239 1.1 uwe * after the sbus code which does similar things. 240 1.1 uwe */ 241 1.21 uwe static void 242 1.31 tsutsui ebus_attach(device_t parent, device_t self, void *aux) 243 1.1 uwe { 244 1.31 tsutsui struct ebus_softc *sc = device_private(self); 245 1.1 uwe struct pci_attach_args *pa = aux; 246 1.1 uwe struct ebus_attach_args ea; 247 1.18 pk bus_space_tag_t sbt; 248 1.18 pk bus_dma_tag_t dmatag; 249 1.22 macallan bus_space_handle_t hLED; 250 1.24 he pcireg_t base14; 251 1.1 uwe int node, error; 252 1.1 uwe char devinfo[256]; 253 1.1 uwe 254 1.33 mrg sc->sc_dev = self; 255 1.33 mrg 256 1.28 ad #ifdef BLINK 257 1.28 ad callout_init(&ebus_blink_ch, 0); 258 1.28 ad #endif 259 1.28 ad 260 1.17 kleink pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 261 1.2 uwe printf(": %s, revision 0x%02x\n", 262 1.2 uwe devinfo, PCI_REVISION(pa->pa_class)); 263 1.1 uwe 264 1.1 uwe node = PCITAG_NODE(pa->pa_tag); 265 1.1 uwe if (node == -1) 266 1.31 tsutsui panic("%s: unable to find ebus node", device_xname(self)); 267 1.1 uwe 268 1.1 uwe if (ebus_init_wiring_table(sc) == 0) 269 1.1 uwe return; 270 1.1 uwe 271 1.22 macallan /* map the LED register */ 272 1.22 macallan base14 = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x14); 273 1.22 macallan if (bus_space_map(pa->pa_memt, base14 + 0x726000, 4, 0, &hLED) == 0) { 274 1.22 macallan ebus_LED = bus_space_vaddr(pa->pa_memt, hLED); 275 1.22 macallan #ifdef BLINK 276 1.27 christos ebus_blink((void *)0); 277 1.22 macallan #endif 278 1.22 macallan } else { 279 1.22 macallan printf("unable to map the LED register\n"); 280 1.22 macallan } 281 1.22 macallan 282 1.1 uwe sc->sc_node = node; 283 1.1 uwe sc->sc_parent = parent; /* XXX: unused so far */ 284 1.1 uwe sc->sc_bustag = pa->pa_memt; /* EBus only does PCI MEM32 space */ 285 1.18 pk 286 1.18 pk if ((sbt = bus_space_tag_alloc(sc->sc_bustag, sc)) == NULL) 287 1.18 pk panic("unable to allocate ebus bus tag"); 288 1.18 pk 289 1.18 pk sbt->sparc_bus_map = _ebus_bus_map; 290 1.18 pk sbt->sparc_bus_mmap = ebus_bus_mmap; 291 1.18 pk sbt->sparc_intr_establish = ebus_intr_establish; 292 1.18 pk 293 1.18 pk dmatag = ebus_alloc_dma_tag(sc, pa->pa_dmat); 294 1.1 uwe 295 1.1 uwe /* 296 1.1 uwe * Setup ranges. The interesting thing is that we use "reg" 297 1.1 uwe * not "ranges", since "reg" on ebus has exactly the data we'd 298 1.1 uwe * get by processing "ranges". 299 1.1 uwe */ 300 1.16 pk error = prom_getprop(node, "reg", sizeof(struct ofw_pci_register), 301 1.15 mrg &sc->sc_nreg, &sc->sc_reg); 302 1.1 uwe if (error) 303 1.1 uwe panic("%s: unable to read ebus registers (error %d)", 304 1.31 tsutsui device_xname(self), error); 305 1.1 uwe 306 1.1 uwe /* 307 1.1 uwe * now attach all our children 308 1.1 uwe */ 309 1.1 uwe DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node)); 310 1.42 thorpej devhandle_t selfh = device_handle(self); 311 1.1 uwe for (node = firstchild(node); node; node = nextsibling(node)) { 312 1.16 pk char *name = prom_getpropstring(node, "name"); 313 1.1 uwe 314 1.18 pk if (ebus_setup_attach_args(sc, sbt, dmatag, node, &ea) != 0) { 315 1.1 uwe printf("ebus_attach: %s: incomplete\n", name); 316 1.1 uwe continue; 317 1.1 uwe } 318 1.1 uwe DPRINTF(EDB_CHILD, 319 1.1 uwe ("- found child `%s', attaching\n", ea.ea_name)); 320 1.40 thorpej (void)config_found(self, &ea, ebus_print, 321 1.42 thorpej CFARGS(.devhandle = prom_node_to_devhandle(selfh, node))); 322 1.1 uwe ebus_destroy_attach_args(&ea); 323 1.1 uwe } 324 1.1 uwe } 325 1.1 uwe 326 1.21 uwe static int 327 1.21 uwe ebus_setup_attach_args(struct ebus_softc *sc, 328 1.21 uwe bus_space_tag_t bustag, bus_dma_tag_t dmatag, int node, 329 1.21 uwe struct ebus_attach_args *ea) 330 1.1 uwe { 331 1.1 uwe int n, err; 332 1.1 uwe 333 1.1 uwe memset(ea, 0, sizeof(struct ebus_attach_args)); 334 1.1 uwe 335 1.16 pk err = prom_getprop(node, "name", 1, &n, &ea->ea_name); 336 1.1 uwe if (err != 0) 337 1.1 uwe return (err); 338 1.34 mrg KASSERT(ea->ea_name[n-1] == '\0'); 339 1.1 uwe 340 1.1 uwe ea->ea_node = node; 341 1.18 pk ea->ea_bustag = bustag; 342 1.18 pk ea->ea_dmatag = dmatag; 343 1.1 uwe 344 1.16 pk err = prom_getprop(node, "reg", sizeof(struct ebus_regs), 345 1.15 mrg &ea->ea_nreg, &ea->ea_reg); 346 1.1 uwe if (err != 0) 347 1.1 uwe return (err); 348 1.1 uwe 349 1.4 uwe /* 350 1.4 uwe * On Ultra the bar is the _offset_ of the BAR in PCI config 351 1.4 uwe * space but in (some?) ms-IIep systems (e.g. Krups) it's the 352 1.4 uwe * _number_ of the BAR - e.g. BAR1 is represented by 1 in 353 1.4 uwe * Krups PROM, while on Ultra it's 0x14. Fix it here. 354 1.4 uwe */ 355 1.20 macallan for (n = 0; n < ea->ea_nreg; ++n) 356 1.4 uwe if (ea->ea_reg[n].hi < PCI_MAPREG_START) { 357 1.4 uwe ea->ea_reg[n].hi = PCI_MAPREG_START 358 1.4 uwe + ea->ea_reg[n].hi * sizeof(pcireg_t); 359 1.4 uwe } 360 1.4 uwe 361 1.21 uwe err = prom_getprop(node, "address", sizeof(uint32_t), 362 1.15 mrg &ea->ea_nvaddr, &ea->ea_vaddr); 363 1.1 uwe if (err != ENOENT) { 364 1.1 uwe if (err != 0) 365 1.1 uwe return (err); 366 1.1 uwe 367 1.1 uwe if (ea->ea_nreg != ea->ea_nvaddr) 368 1.1 uwe printf("ebus loses: device %s: %d regs and %d addrs\n", 369 1.1 uwe ea->ea_name, ea->ea_nreg, ea->ea_nvaddr); 370 1.1 uwe } else 371 1.1 uwe ea->ea_nvaddr = 0; 372 1.1 uwe 373 1.1 uwe /* XXX: "interrupts" hack */ 374 1.1 uwe for (n = 0; n < wiring_map_size; ++n) { 375 1.21 uwe const struct msiiep_ebus_intr_wiring *w = &wiring_map[n]; 376 1.1 uwe if (strcmp(w->name, ea->ea_name) == 0) { 377 1.21 uwe ea->ea_intr = malloc(sizeof(uint32_t), 378 1.37 chs M_DEVBUF, M_WAITOK); 379 1.1 uwe ea->ea_intr[0] = w->line; 380 1.1 uwe ea->ea_nintr = 1; 381 1.1 uwe break; 382 1.1 uwe } 383 1.1 uwe } 384 1.1 uwe 385 1.1 uwe return (0); 386 1.1 uwe } 387 1.1 uwe 388 1.21 uwe static void 389 1.21 uwe ebus_destroy_attach_args(struct ebus_attach_args *ea) 390 1.1 uwe { 391 1.1 uwe 392 1.1 uwe if (ea->ea_name) 393 1.1 uwe free((void *)ea->ea_name, M_DEVBUF); 394 1.1 uwe if (ea->ea_reg) 395 1.1 uwe free((void *)ea->ea_reg, M_DEVBUF); 396 1.1 uwe if (ea->ea_intr) 397 1.1 uwe free((void *)ea->ea_intr, M_DEVBUF); 398 1.1 uwe if (ea->ea_vaddr) 399 1.1 uwe free((void *)ea->ea_vaddr, M_DEVBUF); 400 1.1 uwe } 401 1.1 uwe 402 1.21 uwe static int 403 1.21 uwe ebus_print(void *aux, const char *p) 404 1.1 uwe { 405 1.1 uwe struct ebus_attach_args *ea = aux; 406 1.1 uwe int i; 407 1.1 uwe 408 1.1 uwe if (p) 409 1.11 thorpej aprint_normal("%s at %s", ea->ea_name, p); 410 1.1 uwe for (i = 0; i < ea->ea_nreg; ++i) 411 1.11 thorpej aprint_normal("%s bar %x offset 0x%x", i == 0 ? "" : ",", 412 1.4 uwe ea->ea_reg[i].hi, ea->ea_reg[i].lo); 413 1.1 uwe for (i = 0; i < ea->ea_nintr; ++i) 414 1.11 thorpej aprint_normal(" line %d", ea->ea_intr[i]); 415 1.1 uwe return (UNCONF); 416 1.1 uwe } 417 1.1 uwe 418 1.1 uwe 419 1.1 uwe /* 420 1.13 wiz * bus space and bus DMA methods below here 421 1.1 uwe */ 422 1.21 uwe static bus_dma_tag_t 423 1.21 uwe ebus_alloc_dma_tag(struct ebus_softc *sc, bus_dma_tag_t pdt) 424 1.1 uwe { 425 1.1 uwe bus_dma_tag_t dt; 426 1.1 uwe 427 1.38 thorpej dt = kmem_zalloc(sizeof(*dt), KM_SLEEP); 428 1.1 uwe dt->_cookie = sc; 429 1.1 uwe #define PCOPY(x) dt->x = pdt->x 430 1.1 uwe PCOPY(_dmamap_create); 431 1.1 uwe PCOPY(_dmamap_destroy); 432 1.1 uwe PCOPY(_dmamap_load); 433 1.1 uwe PCOPY(_dmamap_load_mbuf); 434 1.1 uwe PCOPY(_dmamap_load_uio); 435 1.1 uwe PCOPY(_dmamap_load_raw); 436 1.1 uwe PCOPY(_dmamap_unload); 437 1.1 uwe PCOPY(_dmamap_sync); 438 1.1 uwe PCOPY(_dmamem_alloc); 439 1.1 uwe PCOPY(_dmamem_free); 440 1.1 uwe PCOPY(_dmamem_map); 441 1.1 uwe PCOPY(_dmamem_unmap); 442 1.1 uwe PCOPY(_dmamem_mmap); 443 1.1 uwe #undef PCOPY 444 1.1 uwe return (dt); 445 1.1 uwe } 446 1.1 uwe 447 1.1 uwe /* 448 1.1 uwe * bus space support. <sparc64/dev/psychoreg.h> has a discussion 449 1.1 uwe * about PCI physical addresses, which also applies to ebus. 450 1.1 uwe */ 451 1.1 uwe static int 452 1.21 uwe _ebus_bus_map(bus_space_tag_t t, bus_addr_t ba, bus_size_t size, int flags, 453 1.21 uwe vaddr_t va, bus_space_handle_t *hp) 454 1.1 uwe { 455 1.1 uwe struct ebus_softc *sc = t->cookie; 456 1.1 uwe u_int bar; 457 1.1 uwe paddr_t offset; 458 1.1 uwe int i; 459 1.1 uwe 460 1.5 pk bar = BUS_ADDR_IOSPACE(ba); 461 1.5 pk offset = BUS_ADDR_PADDR(ba); 462 1.1 uwe 463 1.1 uwe DPRINTF(EDB_BUSMAP, 464 1.1 uwe ("\n_ebus_bus_map: bar %d offset %08x sz %x flags %x va %p\n", 465 1.21 uwe (int)bar, (uint32_t)offset, (uint32_t)size, 466 1.5 pk flags, (void *)va)); 467 1.1 uwe 468 1.4 uwe /* EBus has only two BARs */ 469 1.4 uwe if (PCI_MAPREG_NUM(bar) > 1) { 470 1.1 uwe DPRINTF(EDB_BUSMAP, 471 1.1 uwe ("\n_ebus_bus_map: impossible bar\n")); 472 1.1 uwe return (EINVAL); 473 1.1 uwe } 474 1.1 uwe 475 1.1 uwe /* 476 1.1 uwe * Almost all of the interesting ebus children are mapped by 477 1.1 uwe * BAR1, the last entry in sc_reg[], so work our way backwards. 478 1.1 uwe */ 479 1.1 uwe for (i = sc->sc_nreg - 1; i >= 0; --i) { 480 1.1 uwe bus_addr_t pciaddr; 481 1.21 uwe uint32_t ss; 482 1.1 uwe 483 1.1 uwe /* EBus only does MEM32 */ 484 1.1 uwe ss = sc->sc_reg[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK; 485 1.1 uwe if (ss != OFW_PCI_PHYS_HI_SPACE_MEM32) 486 1.1 uwe continue; 487 1.1 uwe 488 1.1 uwe if (bar != (sc->sc_reg[i].phys_hi 489 1.1 uwe & OFW_PCI_PHYS_HI_REGISTERMASK)) 490 1.1 uwe continue; 491 1.1 uwe 492 1.1 uwe pciaddr = (bus_addr_t)sc->sc_reg[i].phys_lo + offset; 493 1.1 uwe 494 1.1 uwe if (pciaddr + size > sc->sc_reg[i].phys_lo 495 1.1 uwe + sc->sc_reg[i].size_lo) 496 1.1 uwe continue; 497 1.1 uwe 498 1.1 uwe DPRINTF(EDB_BUSMAP, 499 1.1 uwe ("_ebus_bus_map: mapping to PCI addr %x\n", 500 1.21 uwe (uint32_t)pciaddr)); 501 1.1 uwe 502 1.1 uwe /* pass it onto the pci controller */ 503 1.18 pk return (bus_space_map2(t->parent, pciaddr, size, 504 1.5 pk flags, va, hp)); 505 1.1 uwe } 506 1.1 uwe 507 1.1 uwe DPRINTF(EDB_BUSMAP, (": FAILED\n")); 508 1.1 uwe return (EINVAL); 509 1.1 uwe } 510 1.1 uwe 511 1.1 uwe static paddr_t 512 1.21 uwe ebus_bus_mmap(bus_space_tag_t t, bus_addr_t ba, off_t off, int prot, int flags) 513 1.1 uwe { 514 1.1 uwe 515 1.18 pk /* XXX: not implemented yet */ 516 1.1 uwe return (-1); 517 1.1 uwe } 518 1.1 uwe 519 1.21 uwe /* 520 1.1 uwe * Install an interrupt handler for a EBus device. 521 1.1 uwe */ 522 1.21 uwe static void * 523 1.21 uwe ebus_intr_establish(bus_space_tag_t t, int pri, int level, 524 1.21 uwe int (*handler)(void *), void *arg, 525 1.21 uwe void (*fastvec)(void)) 526 1.1 uwe { 527 1.21 uwe 528 1.10 pk return (bus_intr_establish(t->parent, pri, level, handler, arg)); 529 1.1 uwe } 530 1.22 macallan 531 1.22 macallan #ifdef BLINK 532 1.22 macallan 533 1.22 macallan static void 534 1.22 macallan ebus_blink(void *zero) 535 1.22 macallan { 536 1.22 macallan register int s; 537 1.22 macallan 538 1.22 macallan s = splhigh(); 539 1.22 macallan *ebus_LED = ~*ebus_LED; 540 1.22 macallan splx(s); 541 1.22 macallan /* 542 1.22 macallan * Blink rate is: 543 1.22 macallan * full cycle every second if completely idle (loadav = 0) 544 1.22 macallan * full cycle every 2 seconds if loadav = 1 545 1.22 macallan * full cycle every 3 seconds if loadav = 2 546 1.22 macallan * etc. 547 1.22 macallan */ 548 1.22 macallan s = (((averunnable.ldavg[0] + FSCALE) * hz) >> (FSHIFT + 1)); 549 1.22 macallan callout_reset(&ebus_blink_ch, s, ebus_blink, NULL); 550 1.22 macallan } 551 1.23 he #endif 552