ebus.c revision 1.1.2.3
1 1.1.2.3 nathanw /* $NetBSD: ebus.c,v 1.1.2.3 2002/02/28 04:12:01 nathanw Exp $ */ 2 1.1.2.2 nathanw 3 1.1.2.2 nathanw /* 4 1.1.2.2 nathanw * Copyright (c) 1999, 2000 Matthew R. Green 5 1.1.2.2 nathanw * All rights reserved. 6 1.1.2.2 nathanw * 7 1.1.2.2 nathanw * Redistribution and use in source and binary forms, with or without 8 1.1.2.2 nathanw * modification, are permitted provided that the following conditions 9 1.1.2.2 nathanw * are met: 10 1.1.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 11 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer. 12 1.1.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 13 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 14 1.1.2.2 nathanw * documentation and/or other materials provided with the distribution. 15 1.1.2.2 nathanw * 3. The name of the author may not be used to endorse or promote products 16 1.1.2.2 nathanw * derived from this software without specific prior written permission. 17 1.1.2.2 nathanw * 18 1.1.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 1.1.2.2 nathanw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 1.1.2.2 nathanw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 1.1.2.2 nathanw * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 1.1.2.2 nathanw * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 1.1.2.2 nathanw * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 1.1.2.2 nathanw * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 1.1.2.2 nathanw * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 1.1.2.2 nathanw * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 1.1.2.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 1.1.2.2 nathanw * SUCH DAMAGE. 29 1.1.2.2 nathanw */ 30 1.1.2.2 nathanw 31 1.1.2.2 nathanw /* 32 1.1.2.2 nathanw * EBus support for PCI based SPARC systems (ms-IIep, Ultra). 33 1.1.2.2 nathanw * EBus is documented in PCIO manual (Sun Part#: 802-7837-01). 34 1.1.2.2 nathanw */ 35 1.1.2.2 nathanw 36 1.1.2.3 nathanw #if defined(DEBUG) && !defined(EBUS_DEBUG) 37 1.1.2.3 nathanw #define EBUS_DEBUG 38 1.1.2.3 nathanw #endif 39 1.1.2.2 nathanw 40 1.1.2.3 nathanw #ifdef EBUS_DEBUG 41 1.1.2.2 nathanw #define EDB_PROM 0x01 42 1.1.2.2 nathanw #define EDB_CHILD 0x02 43 1.1.2.2 nathanw #define EDB_INTRMAP 0x04 44 1.1.2.2 nathanw #define EDB_BUSMAP 0x08 45 1.1.2.2 nathanw #define EDB_BUSDMA 0x10 46 1.1.2.2 nathanw #define EDB_INTR 0x20 47 1.1.2.2 nathanw int ebus_debug = 0; 48 1.1.2.2 nathanw #define DPRINTF(l, s) do { if (ebus_debug & l) printf s; } while (0) 49 1.1.2.2 nathanw #else 50 1.1.2.2 nathanw #define DPRINTF(l, s) 51 1.1.2.2 nathanw #endif 52 1.1.2.2 nathanw 53 1.1.2.2 nathanw #include <sys/param.h> 54 1.1.2.2 nathanw #include <sys/conf.h> 55 1.1.2.2 nathanw #include <sys/device.h> 56 1.1.2.2 nathanw #include <sys/errno.h> 57 1.1.2.2 nathanw #include <sys/extent.h> 58 1.1.2.2 nathanw #include <sys/malloc.h> 59 1.1.2.2 nathanw #include <sys/systm.h> 60 1.1.2.2 nathanw #include <sys/time.h> 61 1.1.2.2 nathanw 62 1.1.2.2 nathanw #define _SPARC_BUS_DMA_PRIVATE 63 1.1.2.2 nathanw #include <machine/bus.h> 64 1.1.2.2 nathanw #include <machine/autoconf.h> 65 1.1.2.2 nathanw #include <machine/openfirm.h> 66 1.1.2.2 nathanw 67 1.1.2.2 nathanw #include <dev/pci/pcivar.h> 68 1.1.2.2 nathanw #include <dev/pci/pcireg.h> 69 1.1.2.2 nathanw #include <dev/pci/pcidevs.h> 70 1.1.2.2 nathanw 71 1.1.2.2 nathanw #include <dev/ofw/ofw_pci.h> 72 1.1.2.2 nathanw 73 1.1.2.3 nathanw #include <dev/ebus/ebusreg.h> 74 1.1.2.3 nathanw #include <dev/ebus/ebusvar.h> 75 1.1.2.3 nathanw 76 1.1.2.3 nathanw 77 1.1.2.3 nathanw struct ebus_softc { 78 1.1.2.3 nathanw struct device sc_dev; 79 1.1.2.3 nathanw struct device *sc_parent; /* PCI bus */ 80 1.1.2.3 nathanw 81 1.1.2.3 nathanw int sc_node; /* PROM node */ 82 1.1.2.2 nathanw 83 1.1.2.3 nathanw bus_space_tag_t sc_bustag; /* mem tag from pci */ 84 1.1.2.3 nathanw bus_dma_tag_t sc_dmatag; /* XXX */ 85 1.1.2.3 nathanw 86 1.1.2.3 nathanw bus_space_tag_t sc_childbustag; /* EBus tag */ 87 1.1.2.3 nathanw 88 1.1.2.3 nathanw /* 89 1.1.2.3 nathanw * "reg" contains exactly the info we'd get by processing 90 1.1.2.3 nathanw * "ranges", so don't bother with "ranges" and use "reg" directly. 91 1.1.2.3 nathanw */ 92 1.1.2.3 nathanw struct ofw_pci_register *sc_reg; 93 1.1.2.3 nathanw int sc_nreg; 94 1.1.2.3 nathanw }; 95 1.1.2.2 nathanw 96 1.1.2.2 nathanw int ebus_match(struct device *, struct cfdata *, void *); 97 1.1.2.2 nathanw void ebus_attach(struct device *, struct device *, void *); 98 1.1.2.2 nathanw 99 1.1.2.2 nathanw struct cfattach ebus_ca = { 100 1.1.2.2 nathanw sizeof(struct ebus_softc), ebus_match, ebus_attach 101 1.1.2.2 nathanw }; 102 1.1.2.2 nathanw 103 1.1.2.2 nathanw 104 1.1.2.2 nathanw int ebus_setup_attach_args(struct ebus_softc *, int, 105 1.1.2.2 nathanw struct ebus_attach_args *); 106 1.1.2.2 nathanw void ebus_destroy_attach_args(struct ebus_attach_args *); 107 1.1.2.2 nathanw int ebus_print(void *, const char *); 108 1.1.2.2 nathanw 109 1.1.2.2 nathanw /* 110 1.1.2.2 nathanw * here are our bus space and bus dma routines. 111 1.1.2.2 nathanw */ 112 1.1.2.2 nathanw static paddr_t ebus_bus_mmap(bus_space_tag_t, bus_addr_t, off_t, int, int); 113 1.1.2.2 nathanw static int _ebus_bus_map(bus_space_tag_t, bus_type_t, bus_addr_t, 114 1.1.2.2 nathanw bus_size_t, int, vaddr_t, bus_space_handle_t *); 115 1.1.2.2 nathanw static void *ebus_intr_establish(bus_space_tag_t, int, int, int, 116 1.1.2.2 nathanw int (*)(void *), void *); 117 1.1.2.2 nathanw 118 1.1.2.3 nathanw static bus_space_tag_t ebus_alloc_bus_tag(struct ebus_softc *); 119 1.1.2.3 nathanw static bus_dma_tag_t ebus_alloc_dma_tag(struct ebus_softc *, bus_dma_tag_t); 120 1.1.2.3 nathanw 121 1.1.2.3 nathanw 122 1.1.2.2 nathanw /* 123 1.1.2.2 nathanw * Working around PROM bogosity. 124 1.1.2.2 nathanw * 125 1.1.2.2 nathanw * EBus doesn't have official OFW binding. sparc64 has a de-facto 126 1.1.2.2 nathanw * standard but patching it in in prompatch.c and then decoding it 127 1.1.2.2 nathanw * here would be an overkill for ms-IIep. 128 1.1.2.2 nathanw * 129 1.1.2.2 nathanw * So we assume that all ms-IIep based systems use PCIO chip only in 130 1.1.2.2 nathanw * "motherboard mode" with interrupt lines wired directly to ms-IIep 131 1.1.2.2 nathanw * interrupt inputs. 132 1.1.2.2 nathanw * 133 1.1.2.2 nathanw * Note that this is ineligible for prompatch.c, as we are not 134 1.1.2.2 nathanw * correcting PROM to conform to some established standard, this hack 135 1.1.2.2 nathanw * is tied to this version of ebus driver and as such it's better stay 136 1.1.2.2 nathanw * private to the driver. 137 1.1.2.2 nathanw */ 138 1.1.2.2 nathanw 139 1.1.2.2 nathanw struct msiiep_ebus_intr_wiring { 140 1.1.2.2 nathanw const char *name; /* PROM node */ 141 1.1.2.2 nathanw int line; /* ms-IIep interrupt input */ 142 1.1.2.2 nathanw }; 143 1.1.2.2 nathanw 144 1.1.2.2 nathanw static struct msiiep_ebus_intr_wiring krups_ebus_intr_wiring[] = { 145 1.1.2.2 nathanw { "su", 0 }, { "8042", 0 }, { "sound", 3 } 146 1.1.2.2 nathanw }; 147 1.1.2.2 nathanw 148 1.1.2.2 nathanw 149 1.1.2.2 nathanw struct msiiep_known_ebus_wiring { 150 1.1.2.2 nathanw const char *model; 151 1.1.2.2 nathanw struct msiiep_ebus_intr_wiring *map; 152 1.1.2.2 nathanw int mapsize; 153 1.1.2.2 nathanw }; 154 1.1.2.2 nathanw 155 1.1.2.2 nathanw #define MSIIEP_MODEL_WIRING(name, map) \ 156 1.1.2.2 nathanw { name, map, sizeof(map)/sizeof(map[0]) } 157 1.1.2.2 nathanw 158 1.1.2.2 nathanw static struct msiiep_known_ebus_wiring known_models[] = { 159 1.1.2.2 nathanw MSIIEP_MODEL_WIRING("SUNW,501-4267", krups_ebus_intr_wiring), 160 1.1.2.2 nathanw { NULL, NULL, 0} 161 1.1.2.2 nathanw }; 162 1.1.2.2 nathanw 163 1.1.2.2 nathanw 164 1.1.2.2 nathanw /* 165 1.1.2.2 nathanw * XXX: This assumes single EBus. However I don't think any ms-IIep 166 1.1.2.2 nathanw * system ever used more than one. In any case, without looking at a 167 1.1.2.2 nathanw * system with multiple PCIO chips I don't know how to correctly 168 1.1.2.2 nathanw * program the driver to handle PROM glitches in them, so for the time 169 1.1.2.2 nathanw * being just use globals. 170 1.1.2.2 nathanw */ 171 1.1.2.2 nathanw static struct msiiep_ebus_intr_wiring *wiring_map; 172 1.1.2.2 nathanw static int wiring_map_size; 173 1.1.2.2 nathanw 174 1.1.2.2 nathanw static int ebus_init_wiring_table(struct ebus_softc *); 175 1.1.2.2 nathanw 176 1.1.2.2 nathanw 177 1.1.2.2 nathanw int 178 1.1.2.2 nathanw ebus_match(parent, match, aux) 179 1.1.2.2 nathanw struct device *parent; 180 1.1.2.2 nathanw struct cfdata *match; 181 1.1.2.2 nathanw void *aux; 182 1.1.2.2 nathanw { 183 1.1.2.2 nathanw struct pci_attach_args *pa = aux; 184 1.1.2.2 nathanw char name[10]; 185 1.1.2.2 nathanw int node; 186 1.1.2.2 nathanw 187 1.1.2.2 nathanw /* Only attach if there's a PROM node. */ 188 1.1.2.2 nathanw node = PCITAG_NODE(pa->pa_tag); 189 1.1.2.2 nathanw if (node == -1) 190 1.1.2.2 nathanw return (0); 191 1.1.2.2 nathanw 192 1.1.2.2 nathanw PROM_getpropstringA(node, "name", name, sizeof name); 193 1.1.2.2 nathanw if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE 194 1.1.2.2 nathanw && PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN 195 1.1.2.2 nathanw && PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS 196 1.1.2.2 nathanw && strcmp(name, "ebus") == 0) 197 1.1.2.2 nathanw return (1); 198 1.1.2.2 nathanw 199 1.1.2.2 nathanw return (0); 200 1.1.2.2 nathanw } 201 1.1.2.2 nathanw 202 1.1.2.2 nathanw 203 1.1.2.2 nathanw static int 204 1.1.2.2 nathanw ebus_init_wiring_table(sc) 205 1.1.2.2 nathanw struct ebus_softc *sc; 206 1.1.2.2 nathanw { 207 1.1.2.2 nathanw struct msiiep_known_ebus_wiring *p; 208 1.1.2.2 nathanw char buf[32]; 209 1.1.2.2 nathanw char *model; 210 1.1.2.2 nathanw 211 1.1.2.2 nathanw if (wiring_map != NULL) { 212 1.1.2.2 nathanw printf("%s: global ebus wiring map already initalized\n", 213 1.1.2.2 nathanw sc->sc_dev.dv_xname); 214 1.1.2.2 nathanw return (0); 215 1.1.2.2 nathanw } 216 1.1.2.2 nathanw 217 1.1.2.2 nathanw model = PROM_getpropstringA(prom_findroot(), "model", 218 1.1.2.2 nathanw buf, sizeof(buf)); 219 1.1.2.2 nathanw if (model == NULL) 220 1.1.2.2 nathanw panic("ebus_init_wiring_table: no \"model\" property"); 221 1.1.2.2 nathanw 222 1.1.2.2 nathanw for (p = known_models; p->model != NULL; ++p) 223 1.1.2.2 nathanw if (strcmp(model, p->model) == 0) { 224 1.1.2.2 nathanw wiring_map = p->map; 225 1.1.2.2 nathanw wiring_map_size = p->mapsize; 226 1.1.2.2 nathanw return (1); 227 1.1.2.2 nathanw } 228 1.1.2.2 nathanw 229 1.1.2.2 nathanw /* not found? we should have failed in pci_attach_hook then. */ 230 1.1.2.2 nathanw panic("ebus_init_wiring_table: unknown model %s", model); 231 1.1.2.2 nathanw } 232 1.1.2.2 nathanw 233 1.1.2.2 nathanw 234 1.1.2.2 nathanw /* 235 1.1.2.2 nathanw * attach an ebus and all it's children. this code is modeled 236 1.1.2.2 nathanw * after the sbus code which does similar things. 237 1.1.2.2 nathanw */ 238 1.1.2.2 nathanw void 239 1.1.2.2 nathanw ebus_attach(parent, self, aux) 240 1.1.2.2 nathanw struct device *parent, *self; 241 1.1.2.2 nathanw void *aux; 242 1.1.2.2 nathanw { 243 1.1.2.2 nathanw struct ebus_softc *sc = (struct ebus_softc *)self; 244 1.1.2.2 nathanw struct pci_attach_args *pa = aux; 245 1.1.2.2 nathanw struct ebus_attach_args ea; 246 1.1.2.2 nathanw int node, error; 247 1.1.2.2 nathanw char devinfo[256]; 248 1.1.2.2 nathanw 249 1.1.2.2 nathanw pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 250 1.1.2.3 nathanw printf(": %s, revision 0x%02x\n", 251 1.1.2.3 nathanw devinfo, PCI_REVISION(pa->pa_class)); 252 1.1.2.2 nathanw 253 1.1.2.2 nathanw node = PCITAG_NODE(pa->pa_tag); 254 1.1.2.2 nathanw if (node == -1) 255 1.1.2.2 nathanw panic("%s: unable to find ebus node", self->dv_xname); 256 1.1.2.2 nathanw 257 1.1.2.2 nathanw if (ebus_init_wiring_table(sc) == 0) 258 1.1.2.2 nathanw return; 259 1.1.2.2 nathanw 260 1.1.2.2 nathanw sc->sc_node = node; 261 1.1.2.2 nathanw sc->sc_parent = parent; /* XXX: unused so far */ 262 1.1.2.2 nathanw sc->sc_bustag = pa->pa_memt; /* EBus only does PCI MEM32 space */ 263 1.1.2.2 nathanw sc->sc_childbustag = ebus_alloc_bus_tag(sc); 264 1.1.2.2 nathanw sc->sc_dmatag = ebus_alloc_dma_tag(sc, pa->pa_dmat); 265 1.1.2.2 nathanw 266 1.1.2.2 nathanw /* 267 1.1.2.2 nathanw * Setup ranges. The interesting thing is that we use "reg" 268 1.1.2.2 nathanw * not "ranges", since "reg" on ebus has exactly the data we'd 269 1.1.2.2 nathanw * get by processing "ranges". 270 1.1.2.2 nathanw * 271 1.1.2.2 nathanw */ 272 1.1.2.2 nathanw error = PROM_getprop(node, "reg", sizeof(struct ofw_pci_register), 273 1.1.2.2 nathanw &sc->sc_nreg, (void **)&sc->sc_reg); 274 1.1.2.2 nathanw if (error) 275 1.1.2.2 nathanw panic("%s: unable to read ebus registers (error %d)", 276 1.1.2.2 nathanw self->dv_xname, error); 277 1.1.2.2 nathanw 278 1.1.2.2 nathanw /* 279 1.1.2.2 nathanw * now attach all our children 280 1.1.2.2 nathanw */ 281 1.1.2.2 nathanw DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node)); 282 1.1.2.2 nathanw for (node = firstchild(node); node; node = nextsibling(node)) { 283 1.1.2.2 nathanw char *name = PROM_getpropstring(node, "name"); 284 1.1.2.2 nathanw 285 1.1.2.2 nathanw if (ebus_setup_attach_args(sc, node, &ea) != 0) { 286 1.1.2.2 nathanw printf("ebus_attach: %s: incomplete\n", name); 287 1.1.2.2 nathanw continue; 288 1.1.2.2 nathanw } 289 1.1.2.2 nathanw DPRINTF(EDB_CHILD, 290 1.1.2.2 nathanw ("- found child `%s', attaching\n", ea.ea_name)); 291 1.1.2.2 nathanw (void)config_found(self, &ea, ebus_print); 292 1.1.2.2 nathanw ebus_destroy_attach_args(&ea); 293 1.1.2.2 nathanw } 294 1.1.2.2 nathanw } 295 1.1.2.2 nathanw 296 1.1.2.2 nathanw int 297 1.1.2.2 nathanw ebus_setup_attach_args(sc, node, ea) 298 1.1.2.2 nathanw struct ebus_softc *sc; 299 1.1.2.2 nathanw int node; 300 1.1.2.2 nathanw struct ebus_attach_args *ea; 301 1.1.2.2 nathanw { 302 1.1.2.2 nathanw int n, err; 303 1.1.2.2 nathanw 304 1.1.2.2 nathanw memset(ea, 0, sizeof(struct ebus_attach_args)); 305 1.1.2.2 nathanw 306 1.1.2.2 nathanw err = PROM_getprop(node, "name", 1, &n, (void **)&ea->ea_name); 307 1.1.2.2 nathanw if (err != 0) 308 1.1.2.2 nathanw return (err); 309 1.1.2.2 nathanw ea->ea_name[n] = '\0'; 310 1.1.2.2 nathanw 311 1.1.2.2 nathanw ea->ea_node = node; 312 1.1.2.2 nathanw ea->ea_bustag = sc->sc_childbustag; 313 1.1.2.2 nathanw ea->ea_dmatag = sc->sc_dmatag; 314 1.1.2.2 nathanw 315 1.1.2.3 nathanw err = PROM_getprop(node, "reg", sizeof(struct ebus_regs), 316 1.1.2.2 nathanw &ea->ea_nreg, (void **)&ea->ea_reg); 317 1.1.2.2 nathanw if (err != 0) 318 1.1.2.2 nathanw return (err); 319 1.1.2.2 nathanw 320 1.1.2.3 nathanw /* 321 1.1.2.3 nathanw * On Ultra the bar is the _offset_ of the BAR in PCI config 322 1.1.2.3 nathanw * space but in (some?) ms-IIep systems (e.g. Krups) it's the 323 1.1.2.3 nathanw * _number_ of the BAR - e.g. BAR1 is represented by 1 in 324 1.1.2.3 nathanw * Krups PROM, while on Ultra it's 0x14. Fix it here. 325 1.1.2.3 nathanw */ 326 1.1.2.3 nathanw for (n = 0; n < ea->ea_nreg; ++n) 327 1.1.2.3 nathanw if (ea->ea_reg[n].hi < PCI_MAPREG_START) { 328 1.1.2.3 nathanw ea->ea_reg[n].hi = PCI_MAPREG_START 329 1.1.2.3 nathanw + ea->ea_reg[n].hi * sizeof(pcireg_t); 330 1.1.2.3 nathanw } 331 1.1.2.3 nathanw 332 1.1.2.3 nathanw 333 1.1.2.2 nathanw err = PROM_getprop(node, "address", sizeof(u_int32_t), 334 1.1.2.2 nathanw &ea->ea_nvaddr, (void **)&ea->ea_vaddr); 335 1.1.2.2 nathanw if (err != ENOENT) { 336 1.1.2.2 nathanw if (err != 0) 337 1.1.2.2 nathanw return (err); 338 1.1.2.2 nathanw 339 1.1.2.2 nathanw if (ea->ea_nreg != ea->ea_nvaddr) 340 1.1.2.2 nathanw printf("ebus loses: device %s: %d regs and %d addrs\n", 341 1.1.2.2 nathanw ea->ea_name, ea->ea_nreg, ea->ea_nvaddr); 342 1.1.2.2 nathanw } else 343 1.1.2.2 nathanw ea->ea_nvaddr = 0; 344 1.1.2.2 nathanw 345 1.1.2.2 nathanw /* XXX: "interrupts" hack */ 346 1.1.2.2 nathanw for (n = 0; n < wiring_map_size; ++n) { 347 1.1.2.2 nathanw struct msiiep_ebus_intr_wiring *w = &wiring_map[n]; 348 1.1.2.2 nathanw if (strcmp(w->name, ea->ea_name) == 0) { 349 1.1.2.2 nathanw ea->ea_intr = malloc(sizeof(u_int32_t), 350 1.1.2.2 nathanw M_DEVBUF, M_NOWAIT); 351 1.1.2.2 nathanw ea->ea_intr[0] = w->line; 352 1.1.2.2 nathanw ea->ea_nintr = 1; 353 1.1.2.2 nathanw break; 354 1.1.2.2 nathanw } 355 1.1.2.2 nathanw } 356 1.1.2.2 nathanw 357 1.1.2.2 nathanw return (0); 358 1.1.2.2 nathanw } 359 1.1.2.2 nathanw 360 1.1.2.2 nathanw void 361 1.1.2.2 nathanw ebus_destroy_attach_args(ea) 362 1.1.2.2 nathanw struct ebus_attach_args *ea; 363 1.1.2.2 nathanw { 364 1.1.2.2 nathanw 365 1.1.2.2 nathanw if (ea->ea_name) 366 1.1.2.2 nathanw free((void *)ea->ea_name, M_DEVBUF); 367 1.1.2.2 nathanw if (ea->ea_reg) 368 1.1.2.2 nathanw free((void *)ea->ea_reg, M_DEVBUF); 369 1.1.2.2 nathanw if (ea->ea_intr) 370 1.1.2.2 nathanw free((void *)ea->ea_intr, M_DEVBUF); 371 1.1.2.2 nathanw if (ea->ea_vaddr) 372 1.1.2.2 nathanw free((void *)ea->ea_vaddr, M_DEVBUF); 373 1.1.2.2 nathanw } 374 1.1.2.2 nathanw 375 1.1.2.2 nathanw int 376 1.1.2.2 nathanw ebus_print(aux, p) 377 1.1.2.2 nathanw void *aux; 378 1.1.2.2 nathanw const char *p; 379 1.1.2.2 nathanw { 380 1.1.2.2 nathanw struct ebus_attach_args *ea = aux; 381 1.1.2.2 nathanw int i; 382 1.1.2.2 nathanw 383 1.1.2.2 nathanw if (p) 384 1.1.2.2 nathanw printf("%s at %s", ea->ea_name, p); 385 1.1.2.2 nathanw for (i = 0; i < ea->ea_nreg; ++i) 386 1.1.2.3 nathanw printf("%s bar %x offset 0x%x", i == 0 ? "" : ",", 387 1.1.2.3 nathanw ea->ea_reg[i].hi, ea->ea_reg[i].lo); 388 1.1.2.2 nathanw for (i = 0; i < ea->ea_nintr; ++i) 389 1.1.2.2 nathanw printf(" line %d", ea->ea_intr[i]); 390 1.1.2.2 nathanw return (UNCONF); 391 1.1.2.2 nathanw } 392 1.1.2.2 nathanw 393 1.1.2.2 nathanw 394 1.1.2.2 nathanw /* 395 1.1.2.2 nathanw * bus space and bus dma methods below here 396 1.1.2.2 nathanw */ 397 1.1.2.2 nathanw 398 1.1.2.2 nathanw bus_space_tag_t 399 1.1.2.2 nathanw ebus_alloc_bus_tag(sc) 400 1.1.2.2 nathanw struct ebus_softc *sc; 401 1.1.2.2 nathanw { 402 1.1.2.2 nathanw bus_space_tag_t bt; 403 1.1.2.2 nathanw 404 1.1.2.2 nathanw bt = (bus_space_tag_t) 405 1.1.2.2 nathanw malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 406 1.1.2.2 nathanw if (bt == NULL) 407 1.1.2.3 nathanw panic("unable to allocate ebus bus tag"); 408 1.1.2.2 nathanw 409 1.1.2.2 nathanw memset(bt, 0, sizeof *bt); 410 1.1.2.2 nathanw bt->cookie = sc; 411 1.1.2.2 nathanw bt->parent = sc->sc_bustag; 412 1.1.2.2 nathanw bt->sparc_bus_map = _ebus_bus_map; 413 1.1.2.2 nathanw bt->sparc_bus_mmap = ebus_bus_mmap; 414 1.1.2.2 nathanw bt->sparc_intr_establish = ebus_intr_establish; 415 1.1.2.2 nathanw return (bt); 416 1.1.2.2 nathanw } 417 1.1.2.2 nathanw 418 1.1.2.2 nathanw 419 1.1.2.2 nathanw bus_dma_tag_t 420 1.1.2.2 nathanw ebus_alloc_dma_tag(sc, pdt) 421 1.1.2.2 nathanw struct ebus_softc *sc; 422 1.1.2.2 nathanw bus_dma_tag_t pdt; 423 1.1.2.2 nathanw { 424 1.1.2.2 nathanw bus_dma_tag_t dt; 425 1.1.2.2 nathanw 426 1.1.2.2 nathanw dt = (bus_dma_tag_t) 427 1.1.2.2 nathanw malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT); 428 1.1.2.2 nathanw if (dt == NULL) 429 1.1.2.3 nathanw panic("unable to allocate ebus dma tag"); 430 1.1.2.2 nathanw 431 1.1.2.2 nathanw memset(dt, 0, sizeof *dt); 432 1.1.2.2 nathanw dt->_cookie = sc; 433 1.1.2.2 nathanw #define PCOPY(x) dt->x = pdt->x 434 1.1.2.2 nathanw PCOPY(_dmamap_create); 435 1.1.2.2 nathanw PCOPY(_dmamap_destroy); 436 1.1.2.2 nathanw PCOPY(_dmamap_load); 437 1.1.2.2 nathanw PCOPY(_dmamap_load_mbuf); 438 1.1.2.2 nathanw PCOPY(_dmamap_load_uio); 439 1.1.2.2 nathanw PCOPY(_dmamap_load_raw); 440 1.1.2.2 nathanw PCOPY(_dmamap_unload); 441 1.1.2.2 nathanw PCOPY(_dmamap_sync); 442 1.1.2.2 nathanw PCOPY(_dmamem_alloc); 443 1.1.2.2 nathanw PCOPY(_dmamem_free); 444 1.1.2.2 nathanw PCOPY(_dmamem_map); 445 1.1.2.2 nathanw PCOPY(_dmamem_unmap); 446 1.1.2.2 nathanw PCOPY(_dmamem_mmap); 447 1.1.2.2 nathanw #undef PCOPY 448 1.1.2.2 nathanw return (dt); 449 1.1.2.2 nathanw } 450 1.1.2.2 nathanw 451 1.1.2.2 nathanw /* 452 1.1.2.2 nathanw * bus space support. <sparc64/dev/psychoreg.h> has a discussion 453 1.1.2.2 nathanw * about PCI physical addresses, which also applies to ebus. 454 1.1.2.2 nathanw */ 455 1.1.2.2 nathanw static int 456 1.1.2.2 nathanw _ebus_bus_map(t, btype, addr, size, flags, vaddr, hp) 457 1.1.2.2 nathanw bus_space_tag_t t; 458 1.1.2.2 nathanw bus_type_t btype; /* unused now that bus_addr_t is 64 bit */ 459 1.1.2.2 nathanw bus_addr_t addr; /* encodes bar/offset */ 460 1.1.2.2 nathanw bus_size_t size; 461 1.1.2.2 nathanw int flags; 462 1.1.2.2 nathanw vaddr_t vaddr; 463 1.1.2.2 nathanw bus_space_handle_t *hp; 464 1.1.2.2 nathanw { 465 1.1.2.2 nathanw struct ebus_softc *sc = t->cookie; 466 1.1.2.2 nathanw u_int bar; 467 1.1.2.2 nathanw paddr_t offset; 468 1.1.2.2 nathanw int i; 469 1.1.2.2 nathanw 470 1.1.2.2 nathanw bar = BUS_ADDR_IOSPACE(addr); 471 1.1.2.2 nathanw offset = BUS_ADDR_PADDR(addr); 472 1.1.2.2 nathanw 473 1.1.2.2 nathanw DPRINTF(EDB_BUSMAP, 474 1.1.2.2 nathanw ("\n_ebus_bus_map: bar %d offset %08x sz %x flags %x va %p\n", 475 1.1.2.2 nathanw (int)bar, (u_int32_t)offset, (u_int32_t)size, 476 1.1.2.2 nathanw flags, (void *)vaddr)); 477 1.1.2.2 nathanw 478 1.1.2.3 nathanw /* EBus has only two BARs */ 479 1.1.2.3 nathanw if (PCI_MAPREG_NUM(bar) > 1) { 480 1.1.2.2 nathanw DPRINTF(EDB_BUSMAP, 481 1.1.2.2 nathanw ("\n_ebus_bus_map: impossible bar\n")); 482 1.1.2.2 nathanw return (EINVAL); 483 1.1.2.2 nathanw } 484 1.1.2.2 nathanw 485 1.1.2.2 nathanw /* 486 1.1.2.2 nathanw * Almost all of the interesting ebus children are mapped by 487 1.1.2.2 nathanw * BAR1, the last entry in sc_reg[], so work our way backwards. 488 1.1.2.2 nathanw */ 489 1.1.2.2 nathanw for (i = sc->sc_nreg - 1; i >= 0; --i) { 490 1.1.2.2 nathanw bus_addr_t pciaddr; 491 1.1.2.2 nathanw u_int32_t ss; 492 1.1.2.2 nathanw 493 1.1.2.2 nathanw /* EBus only does MEM32 */ 494 1.1.2.2 nathanw ss = sc->sc_reg[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK; 495 1.1.2.2 nathanw if (ss != OFW_PCI_PHYS_HI_SPACE_MEM32) 496 1.1.2.2 nathanw continue; 497 1.1.2.2 nathanw 498 1.1.2.2 nathanw if (bar != (sc->sc_reg[i].phys_hi 499 1.1.2.2 nathanw & OFW_PCI_PHYS_HI_REGISTERMASK)) 500 1.1.2.2 nathanw continue; 501 1.1.2.2 nathanw 502 1.1.2.2 nathanw pciaddr = (bus_addr_t)sc->sc_reg[i].phys_lo + offset; 503 1.1.2.2 nathanw 504 1.1.2.2 nathanw if (pciaddr + size > sc->sc_reg[i].phys_lo 505 1.1.2.2 nathanw + sc->sc_reg[i].size_lo) 506 1.1.2.2 nathanw continue; 507 1.1.2.2 nathanw 508 1.1.2.2 nathanw DPRINTF(EDB_BUSMAP, 509 1.1.2.2 nathanw ("_ebus_bus_map: mapping to PCI addr %x\n", 510 1.1.2.2 nathanw (u_int32_t)pciaddr)); 511 1.1.2.2 nathanw 512 1.1.2.2 nathanw /* pass it onto the pci controller */ 513 1.1.2.2 nathanw return (bus_space_map2(sc->sc_bustag, 0, pciaddr, size, 514 1.1.2.2 nathanw flags, vaddr, hp)); 515 1.1.2.2 nathanw } 516 1.1.2.2 nathanw 517 1.1.2.2 nathanw DPRINTF(EDB_BUSMAP, (": FAILED\n")); 518 1.1.2.2 nathanw return (EINVAL); 519 1.1.2.2 nathanw } 520 1.1.2.2 nathanw 521 1.1.2.2 nathanw static paddr_t 522 1.1.2.2 nathanw ebus_bus_mmap(t, paddr, off, prot, flags) 523 1.1.2.2 nathanw bus_space_tag_t t; 524 1.1.2.2 nathanw bus_addr_t paddr; 525 1.1.2.2 nathanw off_t off; 526 1.1.2.2 nathanw int prot; 527 1.1.2.2 nathanw int flags; 528 1.1.2.2 nathanw { 529 1.1.2.2 nathanw 530 1.1.2.2 nathanw /* XXX: not implemetned yet */ 531 1.1.2.2 nathanw return (-1); 532 1.1.2.2 nathanw } 533 1.1.2.2 nathanw 534 1.1.2.2 nathanw /* 535 1.1.2.2 nathanw * Install an interrupt handler for a EBus device. 536 1.1.2.2 nathanw */ 537 1.1.2.2 nathanw void * 538 1.1.2.2 nathanw ebus_intr_establish(t, pri, level, flags, handler, arg) 539 1.1.2.2 nathanw bus_space_tag_t t; 540 1.1.2.2 nathanw int pri; 541 1.1.2.2 nathanw int level; 542 1.1.2.2 nathanw int flags; 543 1.1.2.2 nathanw int (*handler)(void *); 544 1.1.2.2 nathanw void *arg; 545 1.1.2.2 nathanw { 546 1.1.2.2 nathanw return (bus_intr_establish(t->parent, pri, level, flags, handler, arg)); 547 1.1.2.2 nathanw } 548
Indexes created Thu Oct 02 01:09:59 GMT 2025