ebus.c revision 1.14 1 /* $NetBSD: ebus.c,v 1.14 2003/07/15 00:04:54 lukem Exp $ */
2
3 /*
4 * Copyright (c) 1999, 2000 Matthew R. Green
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 /*
32 * EBus support for PCI based SPARC systems (ms-IIep, Ultra).
33 * EBus is documented in PCIO manual (Sun Part#: 802-7837-01).
34 */
35
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: ebus.c,v 1.14 2003/07/15 00:04:54 lukem Exp $");
38
39 #if defined(DEBUG) && !defined(EBUS_DEBUG)
40 #define EBUS_DEBUG
41 #endif
42
43 #ifdef EBUS_DEBUG
44 #define EDB_PROM 0x01
45 #define EDB_CHILD 0x02
46 #define EDB_INTRMAP 0x04
47 #define EDB_BUSMAP 0x08
48 #define EDB_BUSDMA 0x10
49 #define EDB_INTR 0x20
50 int ebus_debug = 0;
51 #define DPRINTF(l, s) do { if (ebus_debug & l) printf s; } while (0)
52 #else
53 #define DPRINTF(l, s)
54 #endif
55
56 #include <sys/param.h>
57 #include <sys/conf.h>
58 #include <sys/device.h>
59 #include <sys/errno.h>
60 #include <sys/extent.h>
61 #include <sys/malloc.h>
62 #include <sys/systm.h>
63 #include <sys/time.h>
64
65 #define _SPARC_BUS_DMA_PRIVATE
66 #include <machine/bus.h>
67 #include <machine/autoconf.h>
68
69 #include <dev/pci/pcivar.h>
70 #include <dev/pci/pcireg.h>
71 #include <dev/pci/pcidevs.h>
72
73 #include <dev/ofw/ofw_pci.h>
74
75 #include <dev/ebus/ebusreg.h>
76 #include <dev/ebus/ebusvar.h>
77
78
79 struct ebus_softc {
80 struct device sc_dev;
81 struct device *sc_parent; /* PCI bus */
82
83 int sc_node; /* PROM node */
84
85 bus_space_tag_t sc_bustag; /* mem tag from pci */
86 bus_dma_tag_t sc_dmatag; /* XXX */
87
88 bus_space_tag_t sc_childbustag; /* EBus tag */
89
90 /*
91 * "reg" contains exactly the info we'd get by processing
92 * "ranges", so don't bother with "ranges" and use "reg" directly.
93 */
94 struct ofw_pci_register *sc_reg;
95 int sc_nreg;
96 };
97
98 int ebus_match(struct device *, struct cfdata *, void *);
99 void ebus_attach(struct device *, struct device *, void *);
100
101 CFATTACH_DECL(ebus, sizeof(struct ebus_softc),
102 ebus_match, ebus_attach, NULL, NULL);
103
104 int ebus_setup_attach_args(struct ebus_softc *, int,
105 struct ebus_attach_args *);
106 void ebus_destroy_attach_args(struct ebus_attach_args *);
107 int ebus_print(void *, const char *);
108
109 /*
110 * here are our bus space and bus DMA routines.
111 */
112 static paddr_t ebus_bus_mmap(bus_space_tag_t, bus_addr_t, off_t, int, int);
113 static int _ebus_bus_map(bus_space_tag_t, bus_addr_t,
114 bus_size_t, int, vaddr_t, bus_space_handle_t *);
115 static void *ebus_intr_establish(bus_space_tag_t, int, int,
116 int (*)(void *), void *, void (*)(void));
117
118 static bus_space_tag_t ebus_alloc_bus_tag(struct ebus_softc *);
119 static bus_dma_tag_t ebus_alloc_dma_tag(struct ebus_softc *, bus_dma_tag_t);
120
121
122 /*
123 * Working around PROM bogosity.
124 *
125 * EBus doesn't have official OFW binding. sparc64 has a de-facto
126 * standard but patching it in in prompatch.c and then decoding it
127 * here would be an overkill for ms-IIep.
128 *
129 * So we assume that all ms-IIep based systems use PCIO chip only in
130 * "motherboard mode" with interrupt lines wired directly to ms-IIep
131 * interrupt inputs.
132 *
133 * Note that this is ineligible for prompatch.c, as we are not
134 * correcting PROM to conform to some established standard, this hack
135 * is tied to this version of ebus driver and as such it's better stay
136 * private to the driver.
137 */
138
139 struct msiiep_ebus_intr_wiring {
140 const char *name; /* PROM node */
141 int line; /* ms-IIep interrupt input */
142 };
143
144 static struct msiiep_ebus_intr_wiring krups_ebus_intr_wiring[] = {
145 { "su", 0 }, { "8042", 0 }, { "sound", 3 }
146 };
147
148
149 struct msiiep_known_ebus_wiring {
150 const char *model;
151 struct msiiep_ebus_intr_wiring *map;
152 int mapsize;
153 };
154
155 #define MSIIEP_MODEL_WIRING(name, map) \
156 { name, map, sizeof(map)/sizeof(map[0]) }
157
158 static struct msiiep_known_ebus_wiring known_models[] = {
159 MSIIEP_MODEL_WIRING("SUNW,501-4267", krups_ebus_intr_wiring),
160 { NULL, NULL, 0}
161 };
162
163
164 /*
165 * XXX: This assumes single EBus. However I don't think any ms-IIep
166 * system ever used more than one. In any case, without looking at a
167 * system with multiple PCIO chips I don't know how to correctly
168 * program the driver to handle PROM glitches in them, so for the time
169 * being just use globals.
170 */
171 static struct msiiep_ebus_intr_wiring *wiring_map;
172 static int wiring_map_size;
173
174 static int ebus_init_wiring_table(struct ebus_softc *);
175
176
177 int
178 ebus_match(parent, match, aux)
179 struct device *parent;
180 struct cfdata *match;
181 void *aux;
182 {
183 struct pci_attach_args *pa = aux;
184 char name[10];
185 int node;
186
187 /* Only attach if there's a PROM node. */
188 node = PCITAG_NODE(pa->pa_tag);
189 if (node == -1)
190 return (0);
191
192 PROM_getpropstringA(node, "name", name, sizeof name);
193 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE
194 && PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN
195 && PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS
196 && strcmp(name, "ebus") == 0)
197 return (1);
198
199 return (0);
200 }
201
202
203 static int
204 ebus_init_wiring_table(sc)
205 struct ebus_softc *sc;
206 {
207 struct msiiep_known_ebus_wiring *p;
208 char buf[32];
209 char *model;
210
211 if (wiring_map != NULL) {
212 printf("%s: global ebus wiring map already initalized\n",
213 sc->sc_dev.dv_xname);
214 return (0);
215 }
216
217 model = PROM_getpropstringA(prom_findroot(), "model",
218 buf, sizeof(buf));
219 if (model == NULL)
220 panic("ebus_init_wiring_table: no \"model\" property");
221
222 for (p = known_models; p->model != NULL; ++p)
223 if (strcmp(model, p->model) == 0) {
224 wiring_map = p->map;
225 wiring_map_size = p->mapsize;
226 return (1);
227 }
228
229 /* not found? we should have failed in pci_attach_hook then. */
230 panic("ebus_init_wiring_table: unknown model %s", model);
231 }
232
233
234 /*
235 * attach an ebus and all it's children. this code is modeled
236 * after the sbus code which does similar things.
237 */
238 void
239 ebus_attach(parent, self, aux)
240 struct device *parent, *self;
241 void *aux;
242 {
243 struct ebus_softc *sc = (struct ebus_softc *)self;
244 struct pci_attach_args *pa = aux;
245 struct ebus_attach_args ea;
246 int node, error;
247 char devinfo[256];
248
249 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
250 printf(": %s, revision 0x%02x\n",
251 devinfo, PCI_REVISION(pa->pa_class));
252
253 node = PCITAG_NODE(pa->pa_tag);
254 if (node == -1)
255 panic("%s: unable to find ebus node", self->dv_xname);
256
257 if (ebus_init_wiring_table(sc) == 0)
258 return;
259
260 sc->sc_node = node;
261 sc->sc_parent = parent; /* XXX: unused so far */
262 sc->sc_bustag = pa->pa_memt; /* EBus only does PCI MEM32 space */
263 sc->sc_childbustag = ebus_alloc_bus_tag(sc);
264 sc->sc_dmatag = ebus_alloc_dma_tag(sc, pa->pa_dmat);
265
266 /*
267 * Setup ranges. The interesting thing is that we use "reg"
268 * not "ranges", since "reg" on ebus has exactly the data we'd
269 * get by processing "ranges".
270 *
271 */
272 error = PROM_getprop(node, "reg", sizeof(struct ofw_pci_register),
273 &sc->sc_nreg, (void **)&sc->sc_reg);
274 if (error)
275 panic("%s: unable to read ebus registers (error %d)",
276 self->dv_xname, error);
277
278 /*
279 * now attach all our children
280 */
281 DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node));
282 for (node = firstchild(node); node; node = nextsibling(node)) {
283 char *name = PROM_getpropstring(node, "name");
284
285 if (ebus_setup_attach_args(sc, node, &ea) != 0) {
286 printf("ebus_attach: %s: incomplete\n", name);
287 continue;
288 }
289 DPRINTF(EDB_CHILD,
290 ("- found child `%s', attaching\n", ea.ea_name));
291 (void)config_found(self, &ea, ebus_print);
292 ebus_destroy_attach_args(&ea);
293 }
294 }
295
296 int
297 ebus_setup_attach_args(sc, node, ea)
298 struct ebus_softc *sc;
299 int node;
300 struct ebus_attach_args *ea;
301 {
302 int n, err;
303
304 memset(ea, 0, sizeof(struct ebus_attach_args));
305
306 err = PROM_getprop(node, "name", 1, &n, (void **)&ea->ea_name);
307 if (err != 0)
308 return (err);
309 ea->ea_name[n] = '\0';
310
311 ea->ea_node = node;
312 ea->ea_bustag = sc->sc_childbustag;
313 ea->ea_dmatag = sc->sc_dmatag;
314
315 err = PROM_getprop(node, "reg", sizeof(struct ebus_regs),
316 &ea->ea_nreg, (void **)&ea->ea_reg);
317 if (err != 0)
318 return (err);
319
320 /*
321 * On Ultra the bar is the _offset_ of the BAR in PCI config
322 * space but in (some?) ms-IIep systems (e.g. Krups) it's the
323 * _number_ of the BAR - e.g. BAR1 is represented by 1 in
324 * Krups PROM, while on Ultra it's 0x14. Fix it here.
325 */
326 for (n = 0; n < ea->ea_nreg; ++n)
327 if (ea->ea_reg[n].hi < PCI_MAPREG_START) {
328 ea->ea_reg[n].hi = PCI_MAPREG_START
329 + ea->ea_reg[n].hi * sizeof(pcireg_t);
330 }
331
332
333 err = PROM_getprop(node, "address", sizeof(u_int32_t),
334 &ea->ea_nvaddr, (void **)&ea->ea_vaddr);
335 if (err != ENOENT) {
336 if (err != 0)
337 return (err);
338
339 if (ea->ea_nreg != ea->ea_nvaddr)
340 printf("ebus loses: device %s: %d regs and %d addrs\n",
341 ea->ea_name, ea->ea_nreg, ea->ea_nvaddr);
342 } else
343 ea->ea_nvaddr = 0;
344
345 /* XXX: "interrupts" hack */
346 for (n = 0; n < wiring_map_size; ++n) {
347 struct msiiep_ebus_intr_wiring *w = &wiring_map[n];
348 if (strcmp(w->name, ea->ea_name) == 0) {
349 ea->ea_intr = malloc(sizeof(u_int32_t),
350 M_DEVBUF, M_NOWAIT);
351 ea->ea_intr[0] = w->line;
352 ea->ea_nintr = 1;
353 break;
354 }
355 }
356
357 return (0);
358 }
359
360 void
361 ebus_destroy_attach_args(ea)
362 struct ebus_attach_args *ea;
363 {
364
365 if (ea->ea_name)
366 free((void *)ea->ea_name, M_DEVBUF);
367 if (ea->ea_reg)
368 free((void *)ea->ea_reg, M_DEVBUF);
369 if (ea->ea_intr)
370 free((void *)ea->ea_intr, M_DEVBUF);
371 if (ea->ea_vaddr)
372 free((void *)ea->ea_vaddr, M_DEVBUF);
373 }
374
375 int
376 ebus_print(aux, p)
377 void *aux;
378 const char *p;
379 {
380 struct ebus_attach_args *ea = aux;
381 int i;
382
383 if (p)
384 aprint_normal("%s at %s", ea->ea_name, p);
385 for (i = 0; i < ea->ea_nreg; ++i)
386 aprint_normal("%s bar %x offset 0x%x", i == 0 ? "" : ",",
387 ea->ea_reg[i].hi, ea->ea_reg[i].lo);
388 for (i = 0; i < ea->ea_nintr; ++i)
389 aprint_normal(" line %d", ea->ea_intr[i]);
390 return (UNCONF);
391 }
392
393
394 /*
395 * bus space and bus DMA methods below here
396 */
397
398 bus_space_tag_t
399 ebus_alloc_bus_tag(sc)
400 struct ebus_softc *sc;
401 {
402 bus_space_tag_t bt;
403
404 bt = (bus_space_tag_t)
405 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT);
406 if (bt == NULL)
407 panic("unable to allocate ebus bus tag");
408
409 memset(bt, 0, sizeof *bt);
410 bt->cookie = sc;
411 bt->parent = sc->sc_bustag;
412 bt->sparc_bus_map = _ebus_bus_map;
413 bt->sparc_bus_mmap = ebus_bus_mmap;
414 bt->sparc_intr_establish = ebus_intr_establish;
415 return (bt);
416 }
417
418
419 bus_dma_tag_t
420 ebus_alloc_dma_tag(sc, pdt)
421 struct ebus_softc *sc;
422 bus_dma_tag_t pdt;
423 {
424 bus_dma_tag_t dt;
425
426 dt = (bus_dma_tag_t)
427 malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT);
428 if (dt == NULL)
429 panic("unable to allocate ebus DMA tag");
430
431 memset(dt, 0, sizeof *dt);
432 dt->_cookie = sc;
433 #define PCOPY(x) dt->x = pdt->x
434 PCOPY(_dmamap_create);
435 PCOPY(_dmamap_destroy);
436 PCOPY(_dmamap_load);
437 PCOPY(_dmamap_load_mbuf);
438 PCOPY(_dmamap_load_uio);
439 PCOPY(_dmamap_load_raw);
440 PCOPY(_dmamap_unload);
441 PCOPY(_dmamap_sync);
442 PCOPY(_dmamem_alloc);
443 PCOPY(_dmamem_free);
444 PCOPY(_dmamem_map);
445 PCOPY(_dmamem_unmap);
446 PCOPY(_dmamem_mmap);
447 #undef PCOPY
448 return (dt);
449 }
450
451 /*
452 * bus space support. <sparc64/dev/psychoreg.h> has a discussion
453 * about PCI physical addresses, which also applies to ebus.
454 */
455 static int
456 _ebus_bus_map(t, ba, size, flags, va, hp)
457 bus_space_tag_t t;
458 bus_addr_t ba; /* encodes bar/offset */
459 bus_size_t size;
460 int flags;
461 vaddr_t va;
462 bus_space_handle_t *hp;
463 {
464 struct ebus_softc *sc = t->cookie;
465 u_int bar;
466 paddr_t offset;
467 int i;
468
469 bar = BUS_ADDR_IOSPACE(ba);
470 offset = BUS_ADDR_PADDR(ba);
471
472 DPRINTF(EDB_BUSMAP,
473 ("\n_ebus_bus_map: bar %d offset %08x sz %x flags %x va %p\n",
474 (int)bar, (u_int32_t)offset, (u_int32_t)size,
475 flags, (void *)va));
476
477 /* EBus has only two BARs */
478 if (PCI_MAPREG_NUM(bar) > 1) {
479 DPRINTF(EDB_BUSMAP,
480 ("\n_ebus_bus_map: impossible bar\n"));
481 return (EINVAL);
482 }
483
484 /*
485 * Almost all of the interesting ebus children are mapped by
486 * BAR1, the last entry in sc_reg[], so work our way backwards.
487 */
488 for (i = sc->sc_nreg - 1; i >= 0; --i) {
489 bus_addr_t pciaddr;
490 u_int32_t ss;
491
492 /* EBus only does MEM32 */
493 ss = sc->sc_reg[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK;
494 if (ss != OFW_PCI_PHYS_HI_SPACE_MEM32)
495 continue;
496
497 if (bar != (sc->sc_reg[i].phys_hi
498 & OFW_PCI_PHYS_HI_REGISTERMASK))
499 continue;
500
501 pciaddr = (bus_addr_t)sc->sc_reg[i].phys_lo + offset;
502
503 if (pciaddr + size > sc->sc_reg[i].phys_lo
504 + sc->sc_reg[i].size_lo)
505 continue;
506
507 DPRINTF(EDB_BUSMAP,
508 ("_ebus_bus_map: mapping to PCI addr %x\n",
509 (u_int32_t)pciaddr));
510
511 /* pass it onto the pci controller */
512 return (bus_space_map2(sc->sc_bustag, pciaddr, size,
513 flags, va, hp));
514 }
515
516 DPRINTF(EDB_BUSMAP, (": FAILED\n"));
517 return (EINVAL);
518 }
519
520 static paddr_t
521 ebus_bus_mmap(t, ba, off, prot, flags)
522 bus_space_tag_t t;
523 bus_addr_t ba;
524 off_t off;
525 int prot;
526 int flags;
527 {
528
529 /* XXX: not implemetned yet */
530 return (-1);
531 }
532
533 /*
534 * Install an interrupt handler for a EBus device.
535 */
536 void *
537 ebus_intr_establish(t, pri, level, handler, arg, fastvec)
538 bus_space_tag_t t;
539 int pri;
540 int level;
541 int (*handler)(void *);
542 void *arg;
543 void (*fastvec)(void); /* ignored */
544 {
545 return (bus_intr_establish(t->parent, pri, level, handler, arg));
546 }
547