esp_obio.c revision 1.16
1 /* $NetBSD: esp_obio.c,v 1.16 2003/07/15 00:04:54 lukem Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum; Jason R. Thorpe of the Numerical Aerospace 9 * Simulation Facility, NASA Ames Research Center; Paul Kranenburg. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: esp_obio.c,v 1.16 2003/07/15 00:04:54 lukem Exp $"); 42 43 #include <sys/types.h> 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/errno.h> 48 #include <sys/device.h> 49 #include <sys/buf.h> 50 51 #include <dev/scsipi/scsi_all.h> 52 #include <dev/scsipi/scsipi_all.h> 53 #include <dev/scsipi/scsiconf.h> 54 #include <dev/scsipi/scsi_message.h> 55 56 #include <machine/bus.h> 57 #include <machine/autoconf.h> 58 #include <machine/intr.h> 59 60 #include <dev/ic/lsi64854reg.h> 61 #include <dev/ic/lsi64854var.h> 62 63 #include <dev/ic/ncr53c9xreg.h> 64 #include <dev/ic/ncr53c9xvar.h> 65 66 #include <dev/sbus/sbusvar.h> 67 68 struct esp_softc { 69 struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */ 70 bus_space_tag_t sc_bustag; 71 bus_dma_tag_t sc_dmatag; 72 bus_space_handle_t sc_reg; /* the registers */ 73 struct lsi64854_softc *sc_dma; /* pointer to my dma */ 74 }; 75 76 77 void espattach_obio __P((struct device *, struct device *, void *)); 78 int espmatch_obio __P((struct device *, struct cfdata *, void *)); 79 80 /* Linkup to the rest of the kernel */ 81 CFATTACH_DECL(esp_obio, sizeof(struct esp_softc), 82 espmatch_obio, espattach_obio, NULL, NULL); 83 84 /* 85 * Functions and the switch for the MI code. 86 */ 87 static u_char esp_read_reg __P((struct ncr53c9x_softc *, int)); 88 static void esp_write_reg __P((struct ncr53c9x_softc *, int, u_char)); 89 static int esp_dma_isintr __P((struct ncr53c9x_softc *)); 90 static void esp_dma_reset __P((struct ncr53c9x_softc *)); 91 static int esp_dma_intr __P((struct ncr53c9x_softc *)); 92 static int esp_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, 93 size_t *, int, size_t *)); 94 static void esp_dma_go __P((struct ncr53c9x_softc *)); 95 static void esp_dma_stop __P((struct ncr53c9x_softc *)); 96 static int esp_dma_isactive __P((struct ncr53c9x_softc *)); 97 98 static struct ncr53c9x_glue esp_obio_glue = { 99 esp_read_reg, 100 esp_write_reg, 101 esp_dma_isintr, 102 esp_dma_reset, 103 esp_dma_intr, 104 esp_dma_setup, 105 esp_dma_go, 106 esp_dma_stop, 107 esp_dma_isactive, 108 NULL, /* gl_clear_latched_intr */ 109 }; 110 111 int 112 espmatch_obio(parent, cf, aux) 113 struct device *parent; 114 struct cfdata *cf; 115 void *aux; 116 { 117 union obio_attach_args *uoba = aux; 118 struct obio4_attach_args *oba; 119 120 if (uoba->uoba_isobio4 == 0) 121 return (0); 122 123 oba = &uoba->uoba_oba4; 124 return (bus_space_probe(oba->oba_bustag, oba->oba_paddr, 125 1, /* probe size */ 126 0, /* offset */ 127 0, /* flags */ 128 NULL, NULL)); 129 } 130 131 void 132 espattach_obio(parent, self, aux) 133 struct device *parent, *self; 134 void *aux; 135 { 136 union obio_attach_args *uoba = aux; 137 struct obio4_attach_args *oba = &uoba->uoba_oba4; 138 struct esp_softc *esc = (void *)self; 139 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 140 141 esc->sc_bustag = oba->oba_bustag; 142 esc->sc_dmatag = oba->oba_dmatag; 143 144 sc->sc_id = 7; 145 sc->sc_freq = 24000000; 146 147 /* 148 * Find the DMA by poking around the dma device structures 149 */ 150 esc->sc_dma = (struct lsi64854_softc *) 151 getdevunit("dma", sc->sc_dev.dv_unit); 152 153 /* 154 * and a back pointer to us, for DMA 155 */ 156 if (esc->sc_dma) 157 esc->sc_dma->sc_client = sc; 158 else { 159 printf("\n"); 160 panic("espattach: no dma found"); 161 } 162 163 if (bus_space_map(oba->oba_bustag, oba->oba_paddr, 164 16, /* size (of ncr53c9xreg) */ 165 BUS_SPACE_MAP_LINEAR, 166 &esc->sc_reg) != 0) { 167 printf("%s @ obio: cannot map registers\n", self->dv_xname); 168 return; 169 } 170 171 /* 172 * Set up glue for MI code early; we use some of it here. 173 */ 174 sc->sc_glue = &esp_obio_glue; 175 176 /* gimme Mhz */ 177 sc->sc_freq /= 1000000; 178 179 /* 180 * XXX More of this should be in ncr53c9x_attach(), but 181 * XXX should we really poke around the chip that much in 182 * XXX the MI code? Think about this more... 183 */ 184 185 /* 186 * It is necessary to try to load the 2nd config register here, 187 * to find out what rev the esp chip is, else the ncr53c9x_reset 188 * will not set up the defaults correctly. 189 */ 190 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; 191 sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_RPE; 192 sc->sc_cfg3 = NCRCFG3_CDB; 193 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 194 195 if ((NCR_READ_REG(sc, NCR_CFG2) & ~NCRCFG2_RSVD) != 196 (NCRCFG2_SCSI2 | NCRCFG2_RPE)) { 197 sc->sc_rev = NCR_VARIANT_ESP100; 198 } else { 199 sc->sc_cfg2 = NCRCFG2_SCSI2; 200 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 201 sc->sc_cfg3 = 0; 202 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 203 sc->sc_cfg3 = (NCRCFG3_CDB | NCRCFG3_FCLK); 204 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 205 if (NCR_READ_REG(sc, NCR_CFG3) != 206 (NCRCFG3_CDB | NCRCFG3_FCLK)) { 207 sc->sc_rev = NCR_VARIANT_ESP100A; 208 } else { 209 /* NCRCFG2_FE enables > 64K transfers */ 210 sc->sc_cfg2 |= NCRCFG2_FE; 211 sc->sc_cfg3 = 0; 212 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 213 sc->sc_rev = NCR_VARIANT_ESP200; 214 } 215 } 216 217 /* 218 * XXX minsync and maxxfer _should_ be set up in MI code, 219 * XXX but it appears to have some dependency on what sort 220 * XXX of DMA we're hooked up to, etc. 221 */ 222 223 /* 224 * This is the value used to start sync negotiations 225 * Note that the NCR register "SYNCTP" is programmed 226 * in "clocks per byte", and has a minimum value of 4. 227 * The SCSI period used in negotiation is one-fourth 228 * of the time (in nanoseconds) needed to transfer one byte. 229 * Since the chip's clock is given in MHz, we have the following 230 * formula: 4 * period = (1000 / freq) * 4 231 */ 232 sc->sc_minsync = 1000 / sc->sc_freq; 233 234 /* 235 * Alas, we must now modify the value a bit, because it's 236 * only valid when can switch on FASTCLK and FASTSCSI bits 237 * in config register 3... 238 */ 239 switch (sc->sc_rev) { 240 case NCR_VARIANT_ESP100: 241 sc->sc_maxxfer = 64 * 1024; 242 sc->sc_minsync = 0; /* No synch on old chip? */ 243 break; 244 245 case NCR_VARIANT_ESP100A: 246 sc->sc_maxxfer = 64 * 1024; 247 /* Min clocks/byte is 5 */ 248 sc->sc_minsync = ncr53c9x_cpb2stp(sc, 5); 249 break; 250 251 case NCR_VARIANT_ESP200: 252 sc->sc_maxxfer = 16 * 1024 * 1024; 253 /* XXX - do actually set FAST* bits */ 254 break; 255 } 256 257 /* Establish interrupt channel */ 258 bus_intr_establish(esc->sc_bustag, oba->oba_pri, IPL_BIO, 259 ncr53c9x_intr, sc); 260 261 /* register interrupt stats */ 262 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL, 263 sc->sc_dev.dv_xname, "intr"); 264 265 /* Do the common parts of attachment. */ 266 sc->sc_adapter.adapt_minphys = minphys; 267 sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request; 268 ncr53c9x_attach(sc); 269 sc->sc_features |= NCR_F_DMASELECT; 270 } 271 272 /* 273 * Glue functions. 274 */ 275 276 u_char 277 esp_read_reg(sc, reg) 278 struct ncr53c9x_softc *sc; 279 int reg; 280 { 281 struct esp_softc *esc = (struct esp_softc *)sc; 282 283 return (bus_space_read_1(esc->sc_bustag, esc->sc_reg, reg * 4)); 284 } 285 286 void 287 esp_write_reg(sc, reg, v) 288 struct ncr53c9x_softc *sc; 289 int reg; 290 u_char v; 291 { 292 struct esp_softc *esc = (struct esp_softc *)sc; 293 294 bus_space_write_1(esc->sc_bustag, esc->sc_reg, reg * 4, v); 295 } 296 297 int 298 esp_dma_isintr(sc) 299 struct ncr53c9x_softc *sc; 300 { 301 struct esp_softc *esc = (struct esp_softc *)sc; 302 303 return (DMA_ISINTR(esc->sc_dma)); 304 } 305 306 void 307 esp_dma_reset(sc) 308 struct ncr53c9x_softc *sc; 309 { 310 struct esp_softc *esc = (struct esp_softc *)sc; 311 312 DMA_RESET(esc->sc_dma); 313 } 314 315 int 316 esp_dma_intr(sc) 317 struct ncr53c9x_softc *sc; 318 { 319 struct esp_softc *esc = (struct esp_softc *)sc; 320 321 return (DMA_INTR(esc->sc_dma)); 322 } 323 324 int 325 esp_dma_setup(sc, addr, len, datain, dmasize) 326 struct ncr53c9x_softc *sc; 327 caddr_t *addr; 328 size_t *len; 329 int datain; 330 size_t *dmasize; 331 { 332 struct esp_softc *esc = (struct esp_softc *)sc; 333 334 return (DMA_SETUP(esc->sc_dma, addr, len, datain, dmasize)); 335 } 336 337 void 338 esp_dma_go(sc) 339 struct ncr53c9x_softc *sc; 340 { 341 struct esp_softc *esc = (struct esp_softc *)sc; 342 343 DMA_GO(esc->sc_dma); 344 } 345 346 void 347 esp_dma_stop(sc) 348 struct ncr53c9x_softc *sc; 349 { 350 struct esp_softc *esc = (struct esp_softc *)sc; 351 u_int32_t csr; 352 353 csr = L64854_GCSR(esc->sc_dma); 354 csr &= ~D_EN_DMA; 355 L64854_SCSR(esc->sc_dma, csr); 356 } 357 358 int 359 esp_dma_isactive(sc) 360 struct ncr53c9x_softc *sc; 361 { 362 struct esp_softc *esc = (struct esp_softc *)sc; 363 364 return (DMA_ISACTIVE(esc->sc_dma)); 365 } 366
Indexes created Mon Sep 29 21:09:56 GMT 2025