esp_obio.c revision 1.17
1 /* $NetBSD: esp_obio.c,v 1.17 2005/11/16 00:49:03 uwe Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum; Jason R. Thorpe of the Numerical Aerospace 9 * Simulation Facility, NASA Ames Research Center; Paul Kranenburg. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: esp_obio.c,v 1.17 2005/11/16 00:49:03 uwe Exp $"); 42 43 #include <sys/types.h> 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/errno.h> 48 #include <sys/device.h> 49 #include <sys/buf.h> 50 51 #include <dev/scsipi/scsi_all.h> 52 #include <dev/scsipi/scsipi_all.h> 53 #include <dev/scsipi/scsiconf.h> 54 #include <dev/scsipi/scsi_message.h> 55 56 #include <machine/bus.h> 57 #include <machine/autoconf.h> 58 #include <machine/intr.h> 59 60 #include <dev/ic/lsi64854reg.h> 61 #include <dev/ic/lsi64854var.h> 62 63 #include <dev/ic/ncr53c9xreg.h> 64 #include <dev/ic/ncr53c9xvar.h> 65 66 #include <dev/sbus/sbusvar.h> 67 68 struct esp_softc { 69 struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */ 70 bus_space_tag_t sc_bustag; 71 bus_dma_tag_t sc_dmatag; 72 bus_space_handle_t sc_reg; /* the registers */ 73 struct lsi64854_softc *sc_dma; /* pointer to my dma */ 74 }; 75 76 77 int espmatch_obio(struct device *, struct cfdata *, void *); 78 void espattach_obio(struct device *, struct device *, void *); 79 80 /* Linkup to the rest of the kernel */ 81 CFATTACH_DECL(esp_obio, sizeof(struct esp_softc), 82 espmatch_obio, espattach_obio, NULL, NULL); 83 84 /* 85 * Functions and the switch for the MI code. 86 */ 87 static u_char esp_read_reg(struct ncr53c9x_softc *, int); 88 static void esp_write_reg(struct ncr53c9x_softc *, int, u_char); 89 static int esp_dma_isintr(struct ncr53c9x_softc *); 90 static void esp_dma_reset(struct ncr53c9x_softc *); 91 static int esp_dma_intr(struct ncr53c9x_softc *); 92 static int esp_dma_setup(struct ncr53c9x_softc *, caddr_t *, 93 size_t *, int, size_t *); 94 static void esp_dma_go(struct ncr53c9x_softc *); 95 static void esp_dma_stop(struct ncr53c9x_softc *); 96 static int esp_dma_isactive(struct ncr53c9x_softc *); 97 98 static struct ncr53c9x_glue esp_obio_glue = { 99 esp_read_reg, 100 esp_write_reg, 101 esp_dma_isintr, 102 esp_dma_reset, 103 esp_dma_intr, 104 esp_dma_setup, 105 esp_dma_go, 106 esp_dma_stop, 107 esp_dma_isactive, 108 NULL, /* gl_clear_latched_intr */ 109 }; 110 111 int 112 espmatch_obio(struct device *parent, struct cfdata *cf, void *aux) 113 { 114 union obio_attach_args *uoba = aux; 115 struct obio4_attach_args *oba; 116 117 if (uoba->uoba_isobio4 == 0) 118 return (0); 119 120 oba = &uoba->uoba_oba4; 121 return (bus_space_probe(oba->oba_bustag, oba->oba_paddr, 122 1, /* probe size */ 123 0, /* offset */ 124 0, /* flags */ 125 NULL, NULL)); 126 } 127 128 void 129 espattach_obio(struct device *parent, struct device *self, void *aux) 130 { 131 union obio_attach_args *uoba = aux; 132 struct obio4_attach_args *oba = &uoba->uoba_oba4; 133 struct esp_softc *esc = (void *)self; 134 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 135 136 esc->sc_bustag = oba->oba_bustag; 137 esc->sc_dmatag = oba->oba_dmatag; 138 139 sc->sc_id = 7; 140 sc->sc_freq = 24000000; 141 142 /* 143 * Find the DMA by poking around the dma device structures 144 */ 145 esc->sc_dma = (struct lsi64854_softc *) 146 getdevunit("dma", sc->sc_dev.dv_unit); 147 148 /* 149 * and a back pointer to us, for DMA 150 */ 151 if (esc->sc_dma) 152 esc->sc_dma->sc_client = sc; 153 else { 154 printf("\n"); 155 panic("espattach: no dma found"); 156 } 157 158 if (bus_space_map(oba->oba_bustag, oba->oba_paddr, 159 16, /* size (of ncr53c9xreg) */ 160 BUS_SPACE_MAP_LINEAR, 161 &esc->sc_reg) != 0) { 162 printf("%s @ obio: cannot map registers\n", self->dv_xname); 163 return; 164 } 165 166 /* 167 * Set up glue for MI code early; we use some of it here. 168 */ 169 sc->sc_glue = &esp_obio_glue; 170 171 /* gimme Mhz */ 172 sc->sc_freq /= 1000000; 173 174 /* 175 * XXX More of this should be in ncr53c9x_attach(), but 176 * XXX should we really poke around the chip that much in 177 * XXX the MI code? Think about this more... 178 */ 179 180 /* 181 * It is necessary to try to load the 2nd config register here, 182 * to find out what rev the esp chip is, else the ncr53c9x_reset 183 * will not set up the defaults correctly. 184 */ 185 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; 186 sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_RPE; 187 sc->sc_cfg3 = NCRCFG3_CDB; 188 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 189 190 if ((NCR_READ_REG(sc, NCR_CFG2) & ~NCRCFG2_RSVD) != 191 (NCRCFG2_SCSI2 | NCRCFG2_RPE)) { 192 sc->sc_rev = NCR_VARIANT_ESP100; 193 } else { 194 sc->sc_cfg2 = NCRCFG2_SCSI2; 195 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 196 sc->sc_cfg3 = 0; 197 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 198 sc->sc_cfg3 = (NCRCFG3_CDB | NCRCFG3_FCLK); 199 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 200 if (NCR_READ_REG(sc, NCR_CFG3) != 201 (NCRCFG3_CDB | NCRCFG3_FCLK)) { 202 sc->sc_rev = NCR_VARIANT_ESP100A; 203 } else { 204 /* NCRCFG2_FE enables > 64K transfers */ 205 sc->sc_cfg2 |= NCRCFG2_FE; 206 sc->sc_cfg3 = 0; 207 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 208 sc->sc_rev = NCR_VARIANT_ESP200; 209 } 210 } 211 212 /* 213 * XXX minsync and maxxfer _should_ be set up in MI code, 214 * XXX but it appears to have some dependency on what sort 215 * XXX of DMA we're hooked up to, etc. 216 */ 217 218 /* 219 * This is the value used to start sync negotiations 220 * Note that the NCR register "SYNCTP" is programmed 221 * in "clocks per byte", and has a minimum value of 4. 222 * The SCSI period used in negotiation is one-fourth 223 * of the time (in nanoseconds) needed to transfer one byte. 224 * Since the chip's clock is given in MHz, we have the following 225 * formula: 4 * period = (1000 / freq) * 4 226 */ 227 sc->sc_minsync = 1000 / sc->sc_freq; 228 229 /* 230 * Alas, we must now modify the value a bit, because it's 231 * only valid when can switch on FASTCLK and FASTSCSI bits 232 * in config register 3... 233 */ 234 switch (sc->sc_rev) { 235 case NCR_VARIANT_ESP100: 236 sc->sc_maxxfer = 64 * 1024; 237 sc->sc_minsync = 0; /* No synch on old chip? */ 238 break; 239 240 case NCR_VARIANT_ESP100A: 241 sc->sc_maxxfer = 64 * 1024; 242 /* Min clocks/byte is 5 */ 243 sc->sc_minsync = ncr53c9x_cpb2stp(sc, 5); 244 break; 245 246 case NCR_VARIANT_ESP200: 247 sc->sc_maxxfer = 16 * 1024 * 1024; 248 /* XXX - do actually set FAST* bits */ 249 break; 250 } 251 252 /* Establish interrupt channel */ 253 bus_intr_establish(esc->sc_bustag, oba->oba_pri, IPL_BIO, 254 ncr53c9x_intr, sc); 255 256 /* register interrupt stats */ 257 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL, 258 sc->sc_dev.dv_xname, "intr"); 259 260 /* Do the common parts of attachment. */ 261 sc->sc_adapter.adapt_minphys = minphys; 262 sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request; 263 ncr53c9x_attach(sc); 264 sc->sc_features |= NCR_F_DMASELECT; 265 } 266 267 /* 268 * Glue functions. 269 */ 270 271 static u_char 272 esp_read_reg(struct ncr53c9x_softc *sc, int reg) 273 { 274 struct esp_softc *esc = (struct esp_softc *)sc; 275 276 return (bus_space_read_1(esc->sc_bustag, esc->sc_reg, reg * 4)); 277 } 278 279 static void 280 esp_write_reg(struct ncr53c9x_softc *sc, int reg, u_char v) 281 { 282 struct esp_softc *esc = (struct esp_softc *)sc; 283 284 bus_space_write_1(esc->sc_bustag, esc->sc_reg, reg * 4, v); 285 } 286 287 static int 288 esp_dma_isintr(struct ncr53c9x_softc *sc) 289 { 290 struct esp_softc *esc = (struct esp_softc *)sc; 291 292 return (DMA_ISINTR(esc->sc_dma)); 293 } 294 295 static void 296 esp_dma_reset(struct ncr53c9x_softc *sc) 297 { 298 struct esp_softc *esc = (struct esp_softc *)sc; 299 300 DMA_RESET(esc->sc_dma); 301 } 302 303 static int 304 esp_dma_intr(struct ncr53c9x_softc *sc) 305 { 306 struct esp_softc *esc = (struct esp_softc *)sc; 307 308 return (DMA_INTR(esc->sc_dma)); 309 } 310 311 static int 312 esp_dma_setup(struct ncr53c9x_softc *sc, caddr_t *addr, size_t *len, 313 int datain, size_t *dmasize) 314 { 315 struct esp_softc *esc = (struct esp_softc *)sc; 316 317 return (DMA_SETUP(esc->sc_dma, addr, len, datain, dmasize)); 318 } 319 320 static void 321 esp_dma_go(struct ncr53c9x_softc *sc) 322 { 323 struct esp_softc *esc = (struct esp_softc *)sc; 324 325 DMA_GO(esc->sc_dma); 326 } 327 328 static void 329 esp_dma_stop(struct ncr53c9x_softc *sc) 330 { 331 struct esp_softc *esc = (struct esp_softc *)sc; 332 uint32_t csr; 333 334 csr = L64854_GCSR(esc->sc_dma); 335 csr &= ~D_EN_DMA; 336 L64854_SCSR(esc->sc_dma, csr); 337 } 338 339 static int 340 esp_dma_isactive(struct ncr53c9x_softc *sc) 341 { 342 struct esp_softc *esc = (struct esp_softc *)sc; 343 344 return (DMA_ISACTIVE(esc->sc_dma)); 345 } 346
Indexes created Mon Sep 29 21:09:56 GMT 2025