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fd.c revision 1.88.4.2
      1  1.88.4.2  nathanw /*	$NetBSD: fd.c,v 1.88.4.2 2002/04/01 07:42:41 nathanw Exp $	*/
      2  1.88.4.2  nathanw 
      3  1.88.4.2  nathanw /*-
      4  1.88.4.2  nathanw  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5  1.88.4.2  nathanw  * All rights reserved.
      6  1.88.4.2  nathanw  *
      7  1.88.4.2  nathanw  * This code is derived from software contributed to The NetBSD Foundation
      8  1.88.4.2  nathanw  * by Paul Kranenburg.
      9  1.88.4.2  nathanw  *
     10  1.88.4.2  nathanw  * Redistribution and use in source and binary forms, with or without
     11  1.88.4.2  nathanw  * modification, are permitted provided that the following conditions
     12  1.88.4.2  nathanw  * are met:
     13  1.88.4.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     14  1.88.4.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     15  1.88.4.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.88.4.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     17  1.88.4.2  nathanw  *    documentation and/or other materials provided with the distribution.
     18  1.88.4.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     19  1.88.4.2  nathanw  *    must display the following acknowledgement:
     20  1.88.4.2  nathanw  *        This product includes software developed by the NetBSD
     21  1.88.4.2  nathanw  *        Foundation, Inc. and its contributors.
     22  1.88.4.2  nathanw  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.88.4.2  nathanw  *    contributors may be used to endorse or promote products derived
     24  1.88.4.2  nathanw  *    from this software without specific prior written permission.
     25  1.88.4.2  nathanw  *
     26  1.88.4.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.88.4.2  nathanw  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.88.4.2  nathanw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.88.4.2  nathanw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.88.4.2  nathanw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.88.4.2  nathanw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.88.4.2  nathanw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.88.4.2  nathanw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.88.4.2  nathanw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.88.4.2  nathanw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.88.4.2  nathanw  * POSSIBILITY OF SUCH DAMAGE.
     37  1.88.4.2  nathanw  */
     38  1.88.4.2  nathanw 
     39  1.88.4.2  nathanw /*-
     40  1.88.4.2  nathanw  * Copyright (c) 1993, 1994, 1995 Charles M. Hannum.
     41  1.88.4.2  nathanw  * Copyright (c) 1995 Paul Kranenburg.
     42  1.88.4.2  nathanw  * Copyright (c) 1990 The Regents of the University of California.
     43  1.88.4.2  nathanw  * All rights reserved.
     44  1.88.4.2  nathanw  *
     45  1.88.4.2  nathanw  * This code is derived from software contributed to Berkeley by
     46  1.88.4.2  nathanw  * Don Ahn.
     47  1.88.4.2  nathanw  *
     48  1.88.4.2  nathanw  * Redistribution and use in source and binary forms, with or without
     49  1.88.4.2  nathanw  * modification, are permitted provided that the following conditions
     50  1.88.4.2  nathanw  * are met:
     51  1.88.4.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     52  1.88.4.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     53  1.88.4.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     54  1.88.4.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     55  1.88.4.2  nathanw  *    documentation and/or other materials provided with the distribution.
     56  1.88.4.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     57  1.88.4.2  nathanw  *    must display the following acknowledgement:
     58  1.88.4.2  nathanw  *	This product includes software developed by the University of
     59  1.88.4.2  nathanw  *	California, Berkeley and its contributors.
     60  1.88.4.2  nathanw  * 4. Neither the name of the University nor the names of its contributors
     61  1.88.4.2  nathanw  *    may be used to endorse or promote products derived from this software
     62  1.88.4.2  nathanw  *    without specific prior written permission.
     63  1.88.4.2  nathanw  *
     64  1.88.4.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     65  1.88.4.2  nathanw  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     66  1.88.4.2  nathanw  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     67  1.88.4.2  nathanw  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     68  1.88.4.2  nathanw  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     69  1.88.4.2  nathanw  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     70  1.88.4.2  nathanw  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     71  1.88.4.2  nathanw  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     72  1.88.4.2  nathanw  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     73  1.88.4.2  nathanw  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     74  1.88.4.2  nathanw  * SUCH DAMAGE.
     75  1.88.4.2  nathanw  *
     76  1.88.4.2  nathanw  *	@(#)fd.c	7.4 (Berkeley) 5/25/91
     77  1.88.4.2  nathanw  */
     78  1.88.4.2  nathanw 
     79  1.88.4.2  nathanw #include "opt_ddb.h"
     80  1.88.4.2  nathanw #include "opt_md.h"
     81  1.88.4.2  nathanw 
     82  1.88.4.2  nathanw #include <sys/param.h>
     83  1.88.4.2  nathanw #include <sys/systm.h>
     84  1.88.4.2  nathanw #include <sys/callout.h>
     85  1.88.4.2  nathanw #include <sys/kernel.h>
     86  1.88.4.2  nathanw #include <sys/file.h>
     87  1.88.4.2  nathanw #include <sys/ioctl.h>
     88  1.88.4.2  nathanw #include <sys/device.h>
     89  1.88.4.2  nathanw #include <sys/disklabel.h>
     90  1.88.4.2  nathanw #include <sys/dkstat.h>
     91  1.88.4.2  nathanw #include <sys/disk.h>
     92  1.88.4.2  nathanw #include <sys/fdio.h>
     93  1.88.4.2  nathanw #include <sys/buf.h>
     94  1.88.4.2  nathanw #include <sys/malloc.h>
     95  1.88.4.2  nathanw #include <sys/proc.h>
     96  1.88.4.2  nathanw #include <sys/uio.h>
     97  1.88.4.2  nathanw #include <sys/stat.h>
     98  1.88.4.2  nathanw #include <sys/syslog.h>
     99  1.88.4.2  nathanw #include <sys/queue.h>
    100  1.88.4.2  nathanw #include <sys/conf.h>
    101  1.88.4.2  nathanw 
    102  1.88.4.2  nathanw #include <dev/cons.h>
    103  1.88.4.2  nathanw 
    104  1.88.4.2  nathanw #include <uvm/uvm_extern.h>
    105  1.88.4.2  nathanw 
    106  1.88.4.2  nathanw #include <machine/autoconf.h>
    107  1.88.4.2  nathanw #include <machine/intr.h>
    108  1.88.4.2  nathanw #include <machine/conf.h>
    109  1.88.4.2  nathanw 
    110  1.88.4.2  nathanw #include <sparc/sparc/auxreg.h>
    111  1.88.4.2  nathanw #include <sparc/dev/fdreg.h>
    112  1.88.4.2  nathanw #include <sparc/dev/fdvar.h>
    113  1.88.4.2  nathanw 
    114  1.88.4.2  nathanw #define FDUNIT(dev)	(minor(dev) / 8)
    115  1.88.4.2  nathanw #define FDTYPE(dev)	(minor(dev) % 8)
    116  1.88.4.2  nathanw 
    117  1.88.4.2  nathanw /* XXX misuse a flag to identify format operation */
    118  1.88.4.2  nathanw #define B_FORMAT B_XXX
    119  1.88.4.2  nathanw 
    120  1.88.4.2  nathanw #define FD_DEBUG
    121  1.88.4.2  nathanw #ifdef FD_DEBUG
    122  1.88.4.2  nathanw int	fdc_debug = 0;
    123  1.88.4.2  nathanw #endif
    124  1.88.4.2  nathanw 
    125  1.88.4.2  nathanw enum fdc_state {
    126  1.88.4.2  nathanw 	DEVIDLE = 0,
    127  1.88.4.2  nathanw 	MOTORWAIT,	/*  1 */
    128  1.88.4.2  nathanw 	DOSEEK,		/*  2 */
    129  1.88.4.2  nathanw 	SEEKWAIT,	/*  3 */
    130  1.88.4.2  nathanw 	SEEKTIMEDOUT,	/*  4 */
    131  1.88.4.2  nathanw 	SEEKCOMPLETE,	/*  5 */
    132  1.88.4.2  nathanw 	DOIO,		/*  6 */
    133  1.88.4.2  nathanw 	IOCOMPLETE,	/*  7 */
    134  1.88.4.2  nathanw 	IOTIMEDOUT,	/*  8 */
    135  1.88.4.2  nathanw 	IOCLEANUPWAIT,	/*  9 */
    136  1.88.4.2  nathanw 	IOCLEANUPTIMEDOUT,/*10 */
    137  1.88.4.2  nathanw 	DORESET,	/* 11 */
    138  1.88.4.2  nathanw 	RESETCOMPLETE,	/* 12 */
    139  1.88.4.2  nathanw 	RESETTIMEDOUT,	/* 13 */
    140  1.88.4.2  nathanw 	DORECAL,	/* 14 */
    141  1.88.4.2  nathanw 	RECALWAIT,	/* 15 */
    142  1.88.4.2  nathanw 	RECALTIMEDOUT,	/* 16 */
    143  1.88.4.2  nathanw 	RECALCOMPLETE,	/* 17 */
    144  1.88.4.2  nathanw };
    145  1.88.4.2  nathanw 
    146  1.88.4.2  nathanw /* software state, per controller */
    147  1.88.4.2  nathanw struct fdc_softc {
    148  1.88.4.2  nathanw 	struct device	sc_dev;		/* boilerplate */
    149  1.88.4.2  nathanw 	bus_space_tag_t	sc_bustag;
    150  1.88.4.2  nathanw 
    151  1.88.4.2  nathanw 	struct callout sc_timo_ch;	/* timeout callout */
    152  1.88.4.2  nathanw 	struct callout sc_intr_ch;	/* pseudo-intr callout */
    153  1.88.4.2  nathanw 
    154  1.88.4.2  nathanw 	struct fd_softc *sc_fd[4];	/* pointers to children */
    155  1.88.4.2  nathanw 	TAILQ_HEAD(drivehead, fd_softc) sc_drives;
    156  1.88.4.2  nathanw 	enum fdc_state	sc_state;
    157  1.88.4.2  nathanw 	int		sc_flags;
    158  1.88.4.2  nathanw #define FDC_82077		0x01
    159  1.88.4.2  nathanw #define FDC_NEEDHEADSETTLE	0x02
    160  1.88.4.2  nathanw #define FDC_EIS			0x04
    161  1.88.4.2  nathanw #define FDC_NEEDMOTORWAIT	0x08
    162  1.88.4.2  nathanw 	int		sc_errors;		/* number of retries so far */
    163  1.88.4.2  nathanw 	int		sc_overruns;		/* number of DMA overruns */
    164  1.88.4.2  nathanw 	int		sc_cfg;			/* current configuration */
    165  1.88.4.2  nathanw 	struct fdcio	sc_io;
    166  1.88.4.2  nathanw #define sc_handle	sc_io.fdcio_handle
    167  1.88.4.2  nathanw #define sc_reg_msr	sc_io.fdcio_reg_msr
    168  1.88.4.2  nathanw #define sc_reg_fifo	sc_io.fdcio_reg_fifo
    169  1.88.4.2  nathanw #define sc_reg_dor	sc_io.fdcio_reg_dor
    170  1.88.4.2  nathanw #define sc_reg_drs	sc_io.fdcio_reg_msr
    171  1.88.4.2  nathanw #define sc_itask	sc_io.fdcio_itask
    172  1.88.4.2  nathanw #define sc_istatus	sc_io.fdcio_istatus
    173  1.88.4.2  nathanw #define sc_data		sc_io.fdcio_data
    174  1.88.4.2  nathanw #define sc_tc		sc_io.fdcio_tc
    175  1.88.4.2  nathanw #define sc_nstat	sc_io.fdcio_nstat
    176  1.88.4.2  nathanw #define sc_status	sc_io.fdcio_status
    177  1.88.4.2  nathanw #define sc_intrcnt	sc_io.fdcio_intrcnt
    178  1.88.4.2  nathanw };
    179  1.88.4.2  nathanw 
    180  1.88.4.2  nathanw extern	struct fdcio	*fdciop;	/* I/O descriptor used in fdintr.s */
    181  1.88.4.2  nathanw 
    182  1.88.4.2  nathanw /* controller driver configuration */
    183  1.88.4.2  nathanw int	fdcmatch_mainbus __P((struct device *, struct cfdata *, void *));
    184  1.88.4.2  nathanw int	fdcmatch_obio __P((struct device *, struct cfdata *, void *));
    185  1.88.4.2  nathanw void	fdcattach_mainbus __P((struct device *, struct device *, void *));
    186  1.88.4.2  nathanw void	fdcattach_obio __P((struct device *, struct device *, void *));
    187  1.88.4.2  nathanw 
    188  1.88.4.2  nathanw int	fdcattach __P((struct fdc_softc *, int));
    189  1.88.4.2  nathanw 
    190  1.88.4.2  nathanw struct cfattach fdc_mainbus_ca = {
    191  1.88.4.2  nathanw 	sizeof(struct fdc_softc), fdcmatch_mainbus, fdcattach_mainbus
    192  1.88.4.2  nathanw };
    193  1.88.4.2  nathanw struct cfattach fdc_obio_ca = {
    194  1.88.4.2  nathanw 	sizeof(struct fdc_softc), fdcmatch_obio, fdcattach_obio
    195  1.88.4.2  nathanw };
    196  1.88.4.2  nathanw 
    197  1.88.4.2  nathanw __inline struct fd_type *fd_dev_to_type __P((struct fd_softc *, dev_t));
    198  1.88.4.2  nathanw 
    199  1.88.4.2  nathanw /*
    200  1.88.4.2  nathanw  * Floppies come in various flavors, e.g., 1.2MB vs 1.44MB; here is how
    201  1.88.4.2  nathanw  * we tell them apart.
    202  1.88.4.2  nathanw  */
    203  1.88.4.2  nathanw struct fd_type {
    204  1.88.4.2  nathanw 	int	sectrac;	/* sectors per track */
    205  1.88.4.2  nathanw 	int	heads;		/* number of heads */
    206  1.88.4.2  nathanw 	int	seccyl;		/* sectors per cylinder */
    207  1.88.4.2  nathanw 	int	secsize;	/* size code for sectors */
    208  1.88.4.2  nathanw 	int	datalen;	/* data len when secsize = 0 */
    209  1.88.4.2  nathanw 	int	steprate;	/* step rate and head unload time */
    210  1.88.4.2  nathanw 	int	gap1;		/* gap len between sectors */
    211  1.88.4.2  nathanw 	int	gap2;		/* formatting gap */
    212  1.88.4.2  nathanw 	int	cylinders;	/* total num of cylinders */
    213  1.88.4.2  nathanw 	int	size;		/* size of disk in sectors */
    214  1.88.4.2  nathanw 	int	step;		/* steps per cylinder */
    215  1.88.4.2  nathanw 	int	rate;		/* transfer speed code */
    216  1.88.4.2  nathanw 	int	fillbyte;	/* format fill byte */
    217  1.88.4.2  nathanw 	int	interleave;	/* interleave factor (formatting) */
    218  1.88.4.2  nathanw 	char	*name;
    219  1.88.4.2  nathanw };
    220  1.88.4.2  nathanw 
    221  1.88.4.2  nathanw /* The order of entries in the following table is important -- BEWARE! */
    222  1.88.4.2  nathanw struct fd_type fd_types[] = {
    223  1.88.4.2  nathanw 	{ 18,2,36,2,0xff,0xcf,0x1b,0x54,80,2880,1,FDC_500KBPS,0xf6,1, "1.44MB"    }, /* 1.44MB diskette */
    224  1.88.4.2  nathanw 	{  9,2,18,2,0xff,0xdf,0x2a,0x50,80,1440,1,FDC_250KBPS,0xf6,1, "720KB"    }, /* 3.5" 720kB diskette */
    225  1.88.4.2  nathanw 	{  9,2,18,2,0xff,0xdf,0x2a,0x50,40, 720,2,FDC_250KBPS,0xf6,1, "360KB/x"  }, /* 360kB in 720kB drive */
    226  1.88.4.2  nathanw 	{  8,2,16,3,0xff,0xdf,0x35,0x74,77,1232,1,FDC_500KBPS,0xf6,1, "1.2MB/NEC" } /* 1.2 MB japanese format */
    227  1.88.4.2  nathanw };
    228  1.88.4.2  nathanw 
    229  1.88.4.2  nathanw /* software state, per disk (with up to 4 disks per ctlr) */
    230  1.88.4.2  nathanw struct fd_softc {
    231  1.88.4.2  nathanw 	struct device	sc_dv;		/* generic device info */
    232  1.88.4.2  nathanw 	struct disk	sc_dk;		/* generic disk info */
    233  1.88.4.2  nathanw 
    234  1.88.4.2  nathanw 	struct fd_type *sc_deftype;	/* default type descriptor */
    235  1.88.4.2  nathanw 	struct fd_type *sc_type;	/* current type descriptor */
    236  1.88.4.2  nathanw 
    237  1.88.4.2  nathanw 	struct callout sc_motoron_ch;
    238  1.88.4.2  nathanw 	struct callout sc_motoroff_ch;
    239  1.88.4.2  nathanw 
    240  1.88.4.2  nathanw 	daddr_t	sc_blkno;	/* starting block number */
    241  1.88.4.2  nathanw 	int sc_bcount;		/* byte count left */
    242  1.88.4.2  nathanw 	int sc_skip;		/* bytes already transferred */
    243  1.88.4.2  nathanw 	int sc_nblks;		/* number of blocks currently transferring */
    244  1.88.4.2  nathanw 	int sc_nbytes;		/* number of bytes currently transferring */
    245  1.88.4.2  nathanw 
    246  1.88.4.2  nathanw 	int sc_drive;		/* physical unit number */
    247  1.88.4.2  nathanw 	int sc_flags;
    248  1.88.4.2  nathanw #define	FD_OPEN		0x01		/* it's open */
    249  1.88.4.2  nathanw #define	FD_MOTOR	0x02		/* motor should be on */
    250  1.88.4.2  nathanw #define	FD_MOTOR_WAIT	0x04		/* motor coming up */
    251  1.88.4.2  nathanw 	int sc_cylin;		/* where we think the head is */
    252  1.88.4.2  nathanw 	int sc_opts;		/* user-set options */
    253  1.88.4.2  nathanw 
    254  1.88.4.2  nathanw 	void	*sc_sdhook;	/* shutdownhook cookie */
    255  1.88.4.2  nathanw 
    256  1.88.4.2  nathanw 	TAILQ_ENTRY(fd_softc) sc_drivechain;
    257  1.88.4.2  nathanw 	int sc_ops;		/* I/O ops since last switch */
    258  1.88.4.2  nathanw 	struct buf_queue sc_q;	/* pending I/O requests */
    259  1.88.4.2  nathanw 	int sc_active;		/* number of active I/O requests */
    260  1.88.4.2  nathanw };
    261  1.88.4.2  nathanw 
    262  1.88.4.2  nathanw /* floppy driver configuration */
    263  1.88.4.2  nathanw int	fdmatch __P((struct device *, struct cfdata *, void *));
    264  1.88.4.2  nathanw void	fdattach __P((struct device *, struct device *, void *));
    265  1.88.4.2  nathanw 
    266  1.88.4.2  nathanw struct cfattach fd_ca = {
    267  1.88.4.2  nathanw 	sizeof(struct fd_softc), fdmatch, fdattach
    268  1.88.4.2  nathanw };
    269  1.88.4.2  nathanw 
    270  1.88.4.2  nathanw extern struct cfdriver fd_cd;
    271  1.88.4.2  nathanw 
    272  1.88.4.2  nathanw void fdgetdisklabel __P((dev_t));
    273  1.88.4.2  nathanw int fd_get_parms __P((struct fd_softc *));
    274  1.88.4.2  nathanw void fdstrategy __P((struct buf *));
    275  1.88.4.2  nathanw void fdstart __P((struct fd_softc *));
    276  1.88.4.2  nathanw int fdprint __P((void *, const char *));
    277  1.88.4.2  nathanw 
    278  1.88.4.2  nathanw struct dkdriver fddkdriver = { fdstrategy };
    279  1.88.4.2  nathanw 
    280  1.88.4.2  nathanw struct	fd_type *fd_nvtotype __P((char *, int, int));
    281  1.88.4.2  nathanw void	fd_set_motor __P((struct fdc_softc *fdc));
    282  1.88.4.2  nathanw void	fd_motor_off __P((void *arg));
    283  1.88.4.2  nathanw void	fd_motor_on __P((void *arg));
    284  1.88.4.2  nathanw int	fdcresult __P((struct fdc_softc *fdc));
    285  1.88.4.2  nathanw int	fdc_wrfifo __P((struct fdc_softc *fdc, u_char x));
    286  1.88.4.2  nathanw void	fdcstart __P((struct fdc_softc *fdc));
    287  1.88.4.2  nathanw void	fdcstatus __P((struct fdc_softc *fdc, char *s));
    288  1.88.4.2  nathanw void	fdc_reset __P((struct fdc_softc *fdc));
    289  1.88.4.2  nathanw void	fdctimeout __P((void *arg));
    290  1.88.4.2  nathanw void	fdcpseudointr __P((void *arg));
    291  1.88.4.2  nathanw int	fdc_c_hwintr __P((void *));
    292  1.88.4.2  nathanw void	fdchwintr __P((void));
    293  1.88.4.2  nathanw int	fdcswintr __P((void *));
    294  1.88.4.2  nathanw int	fdcstate __P((struct fdc_softc *));
    295  1.88.4.2  nathanw void	fdcretry __P((struct fdc_softc *fdc));
    296  1.88.4.2  nathanw void	fdfinish __P((struct fd_softc *fd, struct buf *bp));
    297  1.88.4.2  nathanw int	fdformat __P((dev_t, struct ne7_fd_formb *, struct proc *));
    298  1.88.4.2  nathanw void	fd_do_eject __P((struct fd_softc *));
    299  1.88.4.2  nathanw void	fd_mountroot_hook __P((struct device *));
    300  1.88.4.2  nathanw static int fdconf __P((struct fdc_softc *));
    301  1.88.4.2  nathanw static void establish_chip_type __P((
    302  1.88.4.2  nathanw 		struct fdc_softc *,
    303  1.88.4.2  nathanw 		bus_space_tag_t,
    304  1.88.4.2  nathanw 		bus_addr_t,
    305  1.88.4.2  nathanw 		bus_size_t,
    306  1.88.4.2  nathanw 		bus_space_handle_t));
    307  1.88.4.2  nathanw 
    308  1.88.4.2  nathanw 
    309  1.88.4.2  nathanw #if PIL_FDSOFT == 4
    310  1.88.4.2  nathanw #define IE_FDSOFT	IE_L4
    311  1.88.4.2  nathanw #else
    312  1.88.4.2  nathanw #error 4
    313  1.88.4.2  nathanw #endif
    314  1.88.4.2  nathanw 
    315  1.88.4.2  nathanw #if defined(SUN4M)
    316  1.88.4.2  nathanw #define FD_SET_SWINTR do {		\
    317  1.88.4.2  nathanw 	if (CPU_ISSUN4M)		\
    318  1.88.4.2  nathanw 		raise(0, PIL_FDSOFT);	\
    319  1.88.4.2  nathanw 	else				\
    320  1.88.4.2  nathanw 		ienab_bis(IE_L4);	\
    321  1.88.4.2  nathanw } while(0)
    322  1.88.4.2  nathanw #else
    323  1.88.4.2  nathanw #define FD_SET_SWINTR ienab_bis(IE_FDSOFT)
    324  1.88.4.2  nathanw #endif /* defined(SUN4M) */
    325  1.88.4.2  nathanw 
    326  1.88.4.2  nathanw #define OBP_FDNAME	(CPU_ISSUN4M ? "SUNW,fdtwo" : "fd")
    327  1.88.4.2  nathanw 
    328  1.88.4.2  nathanw int
    329  1.88.4.2  nathanw fdcmatch_mainbus(parent, match, aux)
    330  1.88.4.2  nathanw 	struct device *parent;
    331  1.88.4.2  nathanw 	struct cfdata *match;
    332  1.88.4.2  nathanw 	void *aux;
    333  1.88.4.2  nathanw {
    334  1.88.4.2  nathanw 	struct mainbus_attach_args *ma = aux;
    335  1.88.4.2  nathanw 
    336  1.88.4.2  nathanw 	/*
    337  1.88.4.2  nathanw 	 * Floppy controller is on mainbus on sun4c.
    338  1.88.4.2  nathanw 	 */
    339  1.88.4.2  nathanw 	if (!CPU_ISSUN4C)
    340  1.88.4.2  nathanw 		return (0);
    341  1.88.4.2  nathanw 
    342  1.88.4.2  nathanw 	/* sun4c PROMs call the controller "fd" */
    343  1.88.4.2  nathanw 	if (strcmp("fd", ma->ma_name) != 0)
    344  1.88.4.2  nathanw 		return (0);
    345  1.88.4.2  nathanw 
    346  1.88.4.2  nathanw 	return (bus_space_probe(ma->ma_bustag,
    347  1.88.4.2  nathanw 				ma->ma_paddr,
    348  1.88.4.2  nathanw 				1,	/* probe size */
    349  1.88.4.2  nathanw 				0,	/* offset */
    350  1.88.4.2  nathanw 				0,	/* flags */
    351  1.88.4.2  nathanw 				NULL, NULL));
    352  1.88.4.2  nathanw }
    353  1.88.4.2  nathanw 
    354  1.88.4.2  nathanw int
    355  1.88.4.2  nathanw fdcmatch_obio(parent, match, aux)
    356  1.88.4.2  nathanw 	struct device *parent;
    357  1.88.4.2  nathanw 	struct cfdata *match;
    358  1.88.4.2  nathanw 	void *aux;
    359  1.88.4.2  nathanw {
    360  1.88.4.2  nathanw 	union obio_attach_args *uoba = aux;
    361  1.88.4.2  nathanw 	struct sbus_attach_args *sa;
    362  1.88.4.2  nathanw 
    363  1.88.4.2  nathanw 	/*
    364  1.88.4.2  nathanw 	 * Floppy controller is on obio on sun4m.
    365  1.88.4.2  nathanw 	 */
    366  1.88.4.2  nathanw 	if (uoba->uoba_isobio4 != 0)
    367  1.88.4.2  nathanw 		return (0);
    368  1.88.4.2  nathanw 
    369  1.88.4.2  nathanw 	sa = &uoba->uoba_sbus;
    370  1.88.4.2  nathanw 
    371  1.88.4.2  nathanw 	/* sun4m PROMs call the controller "SUNW,fdtwo" */
    372  1.88.4.2  nathanw 	if (strcmp("SUNW,fdtwo", sa->sa_name) != 0)
    373  1.88.4.2  nathanw 		return (0);
    374  1.88.4.2  nathanw 
    375  1.88.4.2  nathanw 	return (bus_space_probe(sa->sa_bustag,
    376  1.88.4.2  nathanw 			sbus_bus_addr(sa->sa_bustag,
    377  1.88.4.2  nathanw 					sa->sa_slot, sa->sa_offset),
    378  1.88.4.2  nathanw 			1,	/* probe size */
    379  1.88.4.2  nathanw 			0,	/* offset */
    380  1.88.4.2  nathanw 			0,	/* flags */
    381  1.88.4.2  nathanw 			NULL, NULL));
    382  1.88.4.2  nathanw }
    383  1.88.4.2  nathanw 
    384  1.88.4.2  nathanw static void
    385  1.88.4.2  nathanw establish_chip_type(fdc, tag, addr, size, handle)
    386  1.88.4.2  nathanw 	struct fdc_softc	*fdc;
    387  1.88.4.2  nathanw 	bus_space_tag_t		tag;
    388  1.88.4.2  nathanw 	bus_addr_t		addr;
    389  1.88.4.2  nathanw 	bus_size_t		size;
    390  1.88.4.2  nathanw 	bus_space_handle_t	handle;
    391  1.88.4.2  nathanw {
    392  1.88.4.2  nathanw 	u_int8_t v;
    393  1.88.4.2  nathanw 
    394  1.88.4.2  nathanw 	/*
    395  1.88.4.2  nathanw 	 * This hack from Chris Torek: apparently DOR really
    396  1.88.4.2  nathanw 	 * addresses MSR/DRS on a 82072.
    397  1.88.4.2  nathanw 	 * We used to rely on the VERSION command to tell the
    398  1.88.4.2  nathanw 	 * difference (which did not work).
    399  1.88.4.2  nathanw 	 */
    400  1.88.4.2  nathanw 
    401  1.88.4.2  nathanw 	/* First, check the size of the register bank */
    402  1.88.4.2  nathanw 	if (size < 8)
    403  1.88.4.2  nathanw 		/* It isn't a 82077 */
    404  1.88.4.2  nathanw 		return;
    405  1.88.4.2  nathanw 
    406  1.88.4.2  nathanw 	/* Then probe the DOR register offset */
    407  1.88.4.2  nathanw 	if (bus_space_probe(tag, addr,
    408  1.88.4.2  nathanw 			    1,			/* probe size */
    409  1.88.4.2  nathanw 			    FDREG77_DOR,	/* offset */
    410  1.88.4.2  nathanw 			    0,			/* flags */
    411  1.88.4.2  nathanw 			    NULL, NULL) == 0) {
    412  1.88.4.2  nathanw 
    413  1.88.4.2  nathanw 		/* It isn't a 82077 */
    414  1.88.4.2  nathanw 		return;
    415  1.88.4.2  nathanw 	}
    416  1.88.4.2  nathanw 
    417  1.88.4.2  nathanw 	v = bus_space_read_1(tag, handle, FDREG77_DOR);
    418  1.88.4.2  nathanw 	if (v == NE7_RQM) {
    419  1.88.4.2  nathanw 		/*
    420  1.88.4.2  nathanw 		 * Value in DOR looks like it's really MSR
    421  1.88.4.2  nathanw 		 */
    422  1.88.4.2  nathanw 		bus_space_write_1(tag, handle, FDREG77_DOR, FDC_250KBPS);
    423  1.88.4.2  nathanw 		v = bus_space_read_1(tag, handle, FDREG77_DOR);
    424  1.88.4.2  nathanw 		if (v == NE7_RQM) {
    425  1.88.4.2  nathanw 			/*
    426  1.88.4.2  nathanw 			 * The value in the DOR didn't stick;
    427  1.88.4.2  nathanw 			 * it isn't a 82077
    428  1.88.4.2  nathanw 			 */
    429  1.88.4.2  nathanw 			return;
    430  1.88.4.2  nathanw 		}
    431  1.88.4.2  nathanw 	}
    432  1.88.4.2  nathanw 
    433  1.88.4.2  nathanw 	fdc->sc_flags |= FDC_82077;
    434  1.88.4.2  nathanw }
    435  1.88.4.2  nathanw 
    436  1.88.4.2  nathanw /*
    437  1.88.4.2  nathanw  * Arguments passed between fdcattach and fdprobe.
    438  1.88.4.2  nathanw  */
    439  1.88.4.2  nathanw struct fdc_attach_args {
    440  1.88.4.2  nathanw 	int fa_drive;
    441  1.88.4.2  nathanw 	struct fd_type *fa_deftype;
    442  1.88.4.2  nathanw };
    443  1.88.4.2  nathanw 
    444  1.88.4.2  nathanw /*
    445  1.88.4.2  nathanw  * Print the location of a disk drive (called just before attaching the
    446  1.88.4.2  nathanw  * the drive).  If `fdc' is not NULL, the drive was found but was not
    447  1.88.4.2  nathanw  * in the system config file; print the drive name as well.
    448  1.88.4.2  nathanw  * Return QUIET (config_find ignores this if the device was configured) to
    449  1.88.4.2  nathanw  * avoid printing `fdN not configured' messages.
    450  1.88.4.2  nathanw  */
    451  1.88.4.2  nathanw int
    452  1.88.4.2  nathanw fdprint(aux, fdc)
    453  1.88.4.2  nathanw 	void *aux;
    454  1.88.4.2  nathanw 	const char *fdc;
    455  1.88.4.2  nathanw {
    456  1.88.4.2  nathanw 	register struct fdc_attach_args *fa = aux;
    457  1.88.4.2  nathanw 
    458  1.88.4.2  nathanw 	if (!fdc)
    459  1.88.4.2  nathanw 		printf(" drive %d", fa->fa_drive);
    460  1.88.4.2  nathanw 	return (QUIET);
    461  1.88.4.2  nathanw }
    462  1.88.4.2  nathanw 
    463  1.88.4.2  nathanw /*
    464  1.88.4.2  nathanw  * Configure several parameters and features on the FDC.
    465  1.88.4.2  nathanw  * Return 0 on success.
    466  1.88.4.2  nathanw  */
    467  1.88.4.2  nathanw static int
    468  1.88.4.2  nathanw fdconf(fdc)
    469  1.88.4.2  nathanw 	struct fdc_softc *fdc;
    470  1.88.4.2  nathanw {
    471  1.88.4.2  nathanw 	int	vroom;
    472  1.88.4.2  nathanw 
    473  1.88.4.2  nathanw 	if (fdc_wrfifo(fdc, NE7CMD_DUMPREG) || fdcresult(fdc) != 10)
    474  1.88.4.2  nathanw 		return (-1);
    475  1.88.4.2  nathanw 
    476  1.88.4.2  nathanw 	/*
    477  1.88.4.2  nathanw 	 * dumpreg[7] seems to be a motor-off timeout; set it to whatever
    478  1.88.4.2  nathanw 	 * the PROM thinks is appropriate.
    479  1.88.4.2  nathanw 	 */
    480  1.88.4.2  nathanw 	if ((vroom = fdc->sc_status[7]) == 0)
    481  1.88.4.2  nathanw 		vroom = 0x64;
    482  1.88.4.2  nathanw 
    483  1.88.4.2  nathanw 	/* Configure controller to use FIFO and Implied Seek */
    484  1.88.4.2  nathanw 	if (fdc_wrfifo(fdc, NE7CMD_CFG) != 0)
    485  1.88.4.2  nathanw 		return (-1);
    486  1.88.4.2  nathanw 	if (fdc_wrfifo(fdc, vroom) != 0)
    487  1.88.4.2  nathanw 		return (-1);
    488  1.88.4.2  nathanw 	if (fdc_wrfifo(fdc, fdc->sc_cfg) != 0)
    489  1.88.4.2  nathanw 		return (-1);
    490  1.88.4.2  nathanw 	if (fdc_wrfifo(fdc, 0) != 0)	/* PRETRK */
    491  1.88.4.2  nathanw 		return (-1);
    492  1.88.4.2  nathanw 	/* No result phase for the NE7CMD_CFG command */
    493  1.88.4.2  nathanw 
    494  1.88.4.2  nathanw 	if ((fdc->sc_flags & FDC_82077) != 0) {
    495  1.88.4.2  nathanw 		/* Lock configuration across soft resets. */
    496  1.88.4.2  nathanw 		if (fdc_wrfifo(fdc, NE7CMD_LOCK | CFG_LOCK) != 0 ||
    497  1.88.4.2  nathanw 		    fdcresult(fdc) != 1) {
    498  1.88.4.2  nathanw #ifdef DEBUG
    499  1.88.4.2  nathanw 			printf("fdconf: CFGLOCK failed");
    500  1.88.4.2  nathanw #endif
    501  1.88.4.2  nathanw 			return (-1);
    502  1.88.4.2  nathanw 		}
    503  1.88.4.2  nathanw 	}
    504  1.88.4.2  nathanw 
    505  1.88.4.2  nathanw 	return (0);
    506  1.88.4.2  nathanw #if 0
    507  1.88.4.2  nathanw 	if (fdc_wrfifo(fdc, NE7CMD_VERSION) == 0 &&
    508  1.88.4.2  nathanw 	    fdcresult(fdc) == 1 && fdc->sc_status[0] == 0x90) {
    509  1.88.4.2  nathanw 		if (fdc_debug)
    510  1.88.4.2  nathanw 			printf("[version cmd]");
    511  1.88.4.2  nathanw 	}
    512  1.88.4.2  nathanw #endif
    513  1.88.4.2  nathanw }
    514  1.88.4.2  nathanw 
    515  1.88.4.2  nathanw void
    516  1.88.4.2  nathanw fdcattach_mainbus(parent, self, aux)
    517  1.88.4.2  nathanw 	struct device *parent, *self;
    518  1.88.4.2  nathanw 	void *aux;
    519  1.88.4.2  nathanw {
    520  1.88.4.2  nathanw 	struct fdc_softc *fdc = (void *)self;
    521  1.88.4.2  nathanw 	struct mainbus_attach_args *ma = aux;
    522  1.88.4.2  nathanw 
    523  1.88.4.2  nathanw 	fdc->sc_bustag = ma->ma_bustag;
    524  1.88.4.2  nathanw 
    525  1.88.4.2  nathanw 	if (bus_space_map(
    526  1.88.4.2  nathanw 			ma->ma_bustag,
    527  1.88.4.2  nathanw 			ma->ma_paddr,
    528  1.88.4.2  nathanw 			ma->ma_size,
    529  1.88.4.2  nathanw 			BUS_SPACE_MAP_LINEAR,
    530  1.88.4.2  nathanw 			&fdc->sc_handle) != 0) {
    531  1.88.4.2  nathanw 		printf("%s: cannot map registers\n", self->dv_xname);
    532  1.88.4.2  nathanw 		return;
    533  1.88.4.2  nathanw 	}
    534  1.88.4.2  nathanw 
    535  1.88.4.2  nathanw 	establish_chip_type(fdc,
    536  1.88.4.2  nathanw 			    ma->ma_bustag,
    537  1.88.4.2  nathanw 			    ma->ma_paddr,
    538  1.88.4.2  nathanw 			    ma->ma_size,
    539  1.88.4.2  nathanw 			    fdc->sc_handle);
    540  1.88.4.2  nathanw 
    541  1.88.4.2  nathanw 	if (fdcattach(fdc, ma->ma_pri) != 0)
    542  1.88.4.2  nathanw 		bus_space_unmap(ma->ma_bustag, fdc->sc_handle, ma->ma_size);
    543  1.88.4.2  nathanw }
    544  1.88.4.2  nathanw 
    545  1.88.4.2  nathanw void
    546  1.88.4.2  nathanw fdcattach_obio(parent, self, aux)
    547  1.88.4.2  nathanw 	struct device *parent, *self;
    548  1.88.4.2  nathanw 	void *aux;
    549  1.88.4.2  nathanw {
    550  1.88.4.2  nathanw 	struct fdc_softc *fdc = (void *)self;
    551  1.88.4.2  nathanw 	union obio_attach_args *uoba = aux;
    552  1.88.4.2  nathanw 	struct sbus_attach_args *sa = &uoba->uoba_sbus;
    553  1.88.4.2  nathanw 
    554  1.88.4.2  nathanw 	if (sa->sa_nintr == 0) {
    555  1.88.4.2  nathanw 		printf(": no interrupt line configured\n");
    556  1.88.4.2  nathanw 		return;
    557  1.88.4.2  nathanw 	}
    558  1.88.4.2  nathanw 
    559  1.88.4.2  nathanw 	fdc->sc_bustag = sa->sa_bustag;
    560  1.88.4.2  nathanw 
    561  1.88.4.2  nathanw 	if (sbus_bus_map(sa->sa_bustag,
    562  1.88.4.2  nathanw 			 sa->sa_slot, sa->sa_offset, sa->sa_size,
    563  1.88.4.2  nathanw 			 BUS_SPACE_MAP_LINEAR, &fdc->sc_handle) != 0) {
    564  1.88.4.2  nathanw 		printf("%s: cannot map control registers\n",
    565  1.88.4.2  nathanw 			self->dv_xname);
    566  1.88.4.2  nathanw 		return;
    567  1.88.4.2  nathanw 	}
    568  1.88.4.2  nathanw 
    569  1.88.4.2  nathanw 	establish_chip_type(fdc,
    570  1.88.4.2  nathanw 		sa->sa_bustag,
    571  1.88.4.2  nathanw 		sbus_bus_addr(sa->sa_bustag, sa->sa_slot, sa->sa_offset),
    572  1.88.4.2  nathanw 		sa->sa_size,
    573  1.88.4.2  nathanw 		fdc->sc_handle);
    574  1.88.4.2  nathanw 
    575  1.88.4.2  nathanw 	if (strcmp(PROM_getpropstring(sa->sa_node, "status"), "disabled") == 0) {
    576  1.88.4.2  nathanw 		printf(": no drives attached\n");
    577  1.88.4.2  nathanw 		return;
    578  1.88.4.2  nathanw 	}
    579  1.88.4.2  nathanw 
    580  1.88.4.2  nathanw 	if (fdcattach(fdc, sa->sa_pri) != 0)
    581  1.88.4.2  nathanw 		bus_space_unmap(sa->sa_bustag, fdc->sc_handle, sa->sa_size);
    582  1.88.4.2  nathanw }
    583  1.88.4.2  nathanw 
    584  1.88.4.2  nathanw int
    585  1.88.4.2  nathanw fdcattach(fdc, pri)
    586  1.88.4.2  nathanw 	struct fdc_softc *fdc;
    587  1.88.4.2  nathanw 	int pri;
    588  1.88.4.2  nathanw {
    589  1.88.4.2  nathanw 	struct fdc_attach_args fa;
    590  1.88.4.2  nathanw 	int drive_attached;
    591  1.88.4.2  nathanw 	char code;
    592  1.88.4.2  nathanw 
    593  1.88.4.2  nathanw 	callout_init(&fdc->sc_timo_ch);
    594  1.88.4.2  nathanw 	callout_init(&fdc->sc_intr_ch);
    595  1.88.4.2  nathanw 
    596  1.88.4.2  nathanw 	fdc->sc_state = DEVIDLE;
    597  1.88.4.2  nathanw 	fdc->sc_itask = FDC_ITASK_NONE;
    598  1.88.4.2  nathanw 	fdc->sc_istatus = FDC_ISTATUS_NONE;
    599  1.88.4.2  nathanw 	fdc->sc_flags |= FDC_EIS;
    600  1.88.4.2  nathanw 	TAILQ_INIT(&fdc->sc_drives);
    601  1.88.4.2  nathanw 
    602  1.88.4.2  nathanw 	if ((fdc->sc_flags & FDC_82077) != 0) {
    603  1.88.4.2  nathanw 		fdc->sc_reg_msr = FDREG77_MSR;
    604  1.88.4.2  nathanw 		fdc->sc_reg_fifo = FDREG77_FIFO;
    605  1.88.4.2  nathanw 		fdc->sc_reg_dor = FDREG77_DOR;
    606  1.88.4.2  nathanw 		code = '7';
    607  1.88.4.2  nathanw 		fdc->sc_flags |= FDC_NEEDMOTORWAIT;
    608  1.88.4.2  nathanw 	} else {
    609  1.88.4.2  nathanw 		fdc->sc_reg_msr = FDREG72_MSR;
    610  1.88.4.2  nathanw 		fdc->sc_reg_fifo = FDREG72_FIFO;
    611  1.88.4.2  nathanw 		fdc->sc_reg_dor = 0;
    612  1.88.4.2  nathanw 		code = '2';
    613  1.88.4.2  nathanw 	}
    614  1.88.4.2  nathanw 
    615  1.88.4.2  nathanw 	printf(" softpri %d: chip 8207%c\n", PIL_FDSOFT, code);
    616  1.88.4.2  nathanw 
    617  1.88.4.2  nathanw 	/*
    618  1.88.4.2  nathanw 	 * Configure controller; enable FIFO, Implied seek, no POLL mode?.
    619  1.88.4.2  nathanw 	 * Note: CFG_EFIFO is active-low, initial threshold value: 8
    620  1.88.4.2  nathanw 	 */
    621  1.88.4.2  nathanw 	fdc->sc_cfg = CFG_EIS|/*CFG_EFIFO|*/CFG_POLL|(8 & CFG_THRHLD_MASK);
    622  1.88.4.2  nathanw 	if (fdconf(fdc) != 0) {
    623  1.88.4.2  nathanw 		printf("%s: no drives attached\n", fdc->sc_dev.dv_xname);
    624  1.88.4.2  nathanw 		return (-1);
    625  1.88.4.2  nathanw 	}
    626  1.88.4.2  nathanw 
    627  1.88.4.2  nathanw 	fdciop = &fdc->sc_io;
    628  1.88.4.2  nathanw 	if (bus_intr_establish(fdc->sc_bustag, pri, IPL_BIO,
    629  1.88.4.2  nathanw 			 BUS_INTR_ESTABLISH_FASTTRAP,
    630  1.88.4.2  nathanw 			 (int (*) __P((void *)))fdchwintr, NULL) == NULL) {
    631  1.88.4.2  nathanw 
    632  1.88.4.2  nathanw 		printf("%s: notice: no fast trap handler slot available\n",
    633  1.88.4.2  nathanw 			fdc->sc_dev.dv_xname);
    634  1.88.4.2  nathanw 		if (bus_intr_establish(fdc->sc_bustag, pri, IPL_BIO, 0,
    635  1.88.4.2  nathanw 				 fdc_c_hwintr, fdc) == NULL) {
    636  1.88.4.2  nathanw 			printf("%s: cannot register interrupt handler\n",
    637  1.88.4.2  nathanw 				fdc->sc_dev.dv_xname);
    638  1.88.4.2  nathanw 			return (-1);
    639  1.88.4.2  nathanw 		}
    640  1.88.4.2  nathanw 	}
    641  1.88.4.2  nathanw 
    642  1.88.4.2  nathanw 	if (bus_intr_establish(fdc->sc_bustag, PIL_FDSOFT, IPL_BIO,
    643  1.88.4.2  nathanw 			 BUS_INTR_ESTABLISH_SOFTINTR,
    644  1.88.4.2  nathanw 			 fdcswintr, fdc) == NULL) {
    645  1.88.4.2  nathanw 		printf("%s: cannot register interrupt handler\n",
    646  1.88.4.2  nathanw 			fdc->sc_dev.dv_xname);
    647  1.88.4.2  nathanw 		return (-1);
    648  1.88.4.2  nathanw 	}
    649  1.88.4.2  nathanw 
    650  1.88.4.2  nathanw 	evcnt_attach_dynamic(&fdc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
    651  1.88.4.2  nathanw 	    fdc->sc_dev.dv_xname, "intr");
    652  1.88.4.2  nathanw 
    653  1.88.4.2  nathanw 	/* physical limit: four drives per controller. */
    654  1.88.4.2  nathanw 	drive_attached = 0;
    655  1.88.4.2  nathanw 	for (fa.fa_drive = 0; fa.fa_drive < 4; fa.fa_drive++) {
    656  1.88.4.2  nathanw 		fa.fa_deftype = NULL;		/* unknown */
    657  1.88.4.2  nathanw 	fa.fa_deftype = &fd_types[0];		/* XXX */
    658  1.88.4.2  nathanw 		if (config_found(&fdc->sc_dev, (void *)&fa, fdprint) != NULL)
    659  1.88.4.2  nathanw 			drive_attached = 1;
    660  1.88.4.2  nathanw 	}
    661  1.88.4.2  nathanw 
    662  1.88.4.2  nathanw 	if (drive_attached == 0) {
    663  1.88.4.2  nathanw 		/* XXX - dis-establish interrupts here */
    664  1.88.4.2  nathanw 		/* return (-1); */
    665  1.88.4.2  nathanw 	}
    666  1.88.4.2  nathanw 
    667  1.88.4.2  nathanw 	return (0);
    668  1.88.4.2  nathanw }
    669  1.88.4.2  nathanw 
    670  1.88.4.2  nathanw int
    671  1.88.4.2  nathanw fdmatch(parent, match, aux)
    672  1.88.4.2  nathanw 	struct device *parent;
    673  1.88.4.2  nathanw 	struct cfdata *match;
    674  1.88.4.2  nathanw 	void *aux;
    675  1.88.4.2  nathanw {
    676  1.88.4.2  nathanw 	struct fdc_softc *fdc = (void *)parent;
    677  1.88.4.2  nathanw 	bus_space_tag_t t = fdc->sc_bustag;
    678  1.88.4.2  nathanw 	bus_space_handle_t h = fdc->sc_handle;
    679  1.88.4.2  nathanw 	struct fdc_attach_args *fa = aux;
    680  1.88.4.2  nathanw 	int drive = fa->fa_drive;
    681  1.88.4.2  nathanw 	int n, ok;
    682  1.88.4.2  nathanw 
    683  1.88.4.2  nathanw 	if (drive > 0)
    684  1.88.4.2  nathanw 		/* XXX - for now, punt on more than one drive */
    685  1.88.4.2  nathanw 		return (0);
    686  1.88.4.2  nathanw 
    687  1.88.4.2  nathanw 	if ((fdc->sc_flags & FDC_82077) != 0) {
    688  1.88.4.2  nathanw 		/* select drive and turn on motor */
    689  1.88.4.2  nathanw 		bus_space_write_1(t, h, fdc->sc_reg_dor,
    690  1.88.4.2  nathanw 				  drive | FDO_FRST | FDO_MOEN(drive));
    691  1.88.4.2  nathanw 		/* wait for motor to spin up */
    692  1.88.4.2  nathanw 		delay(250000);
    693  1.88.4.2  nathanw 	} else {
    694  1.88.4.2  nathanw 		auxregbisc(AUXIO4C_FDS, 0);
    695  1.88.4.2  nathanw 	}
    696  1.88.4.2  nathanw 	fdc->sc_nstat = 0;
    697  1.88.4.2  nathanw 	fdc_wrfifo(fdc, NE7CMD_RECAL);
    698  1.88.4.2  nathanw 	fdc_wrfifo(fdc, drive);
    699  1.88.4.2  nathanw 
    700  1.88.4.2  nathanw 	/* Wait for recalibration to complete */
    701  1.88.4.2  nathanw 	for (n = 0; n < 10000; n++) {
    702  1.88.4.2  nathanw 		u_int8_t v;
    703  1.88.4.2  nathanw 
    704  1.88.4.2  nathanw 		delay(1000);
    705  1.88.4.2  nathanw 		v = bus_space_read_1(t, h, fdc->sc_reg_msr);
    706  1.88.4.2  nathanw 		if ((v & (NE7_RQM|NE7_DIO|NE7_CB)) == NE7_RQM) {
    707  1.88.4.2  nathanw 			/* wait a bit longer till device *really* is ready */
    708  1.88.4.2  nathanw 			delay(100000);
    709  1.88.4.2  nathanw 			if (fdc_wrfifo(fdc, NE7CMD_SENSEI))
    710  1.88.4.2  nathanw 				break;
    711  1.88.4.2  nathanw 			if (fdcresult(fdc) == 1 && fdc->sc_status[0] == 0x80)
    712  1.88.4.2  nathanw 				/*
    713  1.88.4.2  nathanw 				 * Got `invalid command'; we interpret it
    714  1.88.4.2  nathanw 				 * to mean that the re-calibrate hasn't in
    715  1.88.4.2  nathanw 				 * fact finished yet
    716  1.88.4.2  nathanw 				 */
    717  1.88.4.2  nathanw 				continue;
    718  1.88.4.2  nathanw 			break;
    719  1.88.4.2  nathanw 		}
    720  1.88.4.2  nathanw 	}
    721  1.88.4.2  nathanw 	n = fdc->sc_nstat;
    722  1.88.4.2  nathanw #ifdef FD_DEBUG
    723  1.88.4.2  nathanw 	if (fdc_debug) {
    724  1.88.4.2  nathanw 		int i;
    725  1.88.4.2  nathanw 		printf("fdprobe: %d stati:", n);
    726  1.88.4.2  nathanw 		for (i = 0; i < n; i++)
    727  1.88.4.2  nathanw 			printf(" 0x%x", fdc->sc_status[i]);
    728  1.88.4.2  nathanw 		printf("\n");
    729  1.88.4.2  nathanw 	}
    730  1.88.4.2  nathanw #endif
    731  1.88.4.2  nathanw 	ok = (n == 2 && (fdc->sc_status[0] & 0xf8) == 0x20) ? 1 : 0;
    732  1.88.4.2  nathanw 
    733  1.88.4.2  nathanw 	/* turn off motor */
    734  1.88.4.2  nathanw 	if ((fdc->sc_flags & FDC_82077) != 0) {
    735  1.88.4.2  nathanw 		/* deselect drive and turn motor off */
    736  1.88.4.2  nathanw 		bus_space_write_1(t, h, fdc->sc_reg_dor, FDO_FRST | FDO_DS);
    737  1.88.4.2  nathanw 	} else {
    738  1.88.4.2  nathanw 		auxregbisc(0, AUXIO4C_FDS);
    739  1.88.4.2  nathanw 	}
    740  1.88.4.2  nathanw 
    741  1.88.4.2  nathanw 	return (ok);
    742  1.88.4.2  nathanw }
    743  1.88.4.2  nathanw 
    744  1.88.4.2  nathanw /*
    745  1.88.4.2  nathanw  * Controller is working, and drive responded.  Attach it.
    746  1.88.4.2  nathanw  */
    747  1.88.4.2  nathanw void
    748  1.88.4.2  nathanw fdattach(parent, self, aux)
    749  1.88.4.2  nathanw 	struct device *parent, *self;
    750  1.88.4.2  nathanw 	void *aux;
    751  1.88.4.2  nathanw {
    752  1.88.4.2  nathanw 	struct fdc_softc *fdc = (void *)parent;
    753  1.88.4.2  nathanw 	struct fd_softc *fd = (void *)self;
    754  1.88.4.2  nathanw 	struct fdc_attach_args *fa = aux;
    755  1.88.4.2  nathanw 	struct fd_type *type = fa->fa_deftype;
    756  1.88.4.2  nathanw 	int drive = fa->fa_drive;
    757  1.88.4.2  nathanw 
    758  1.88.4.2  nathanw 	callout_init(&fd->sc_motoron_ch);
    759  1.88.4.2  nathanw 	callout_init(&fd->sc_motoroff_ch);
    760  1.88.4.2  nathanw 
    761  1.88.4.2  nathanw 	/* XXX Allow `flags' to override device type? */
    762  1.88.4.2  nathanw 
    763  1.88.4.2  nathanw 	if (type)
    764  1.88.4.2  nathanw 		printf(": %s %d cyl, %d head, %d sec\n", type->name,
    765  1.88.4.2  nathanw 		    type->cylinders, type->heads, type->sectrac);
    766  1.88.4.2  nathanw 	else
    767  1.88.4.2  nathanw 		printf(": density unknown\n");
    768  1.88.4.2  nathanw 
    769  1.88.4.2  nathanw 	BUFQ_INIT(&fd->sc_q);
    770  1.88.4.2  nathanw 	fd->sc_cylin = -1;
    771  1.88.4.2  nathanw 	fd->sc_drive = drive;
    772  1.88.4.2  nathanw 	fd->sc_deftype = type;
    773  1.88.4.2  nathanw 	fdc->sc_fd[drive] = fd;
    774  1.88.4.2  nathanw 
    775  1.88.4.2  nathanw 	fdc_wrfifo(fdc, NE7CMD_SPECIFY);
    776  1.88.4.2  nathanw 	fdc_wrfifo(fdc, type->steprate);
    777  1.88.4.2  nathanw 	/* XXX head load time == 6ms */
    778  1.88.4.2  nathanw 	fdc_wrfifo(fdc, 6 | NE7_SPECIFY_NODMA);
    779  1.88.4.2  nathanw 
    780  1.88.4.2  nathanw 	/*
    781  1.88.4.2  nathanw 	 * Initialize and attach the disk structure.
    782  1.88.4.2  nathanw 	 */
    783  1.88.4.2  nathanw 	fd->sc_dk.dk_name = fd->sc_dv.dv_xname;
    784  1.88.4.2  nathanw 	fd->sc_dk.dk_driver = &fddkdriver;
    785  1.88.4.2  nathanw 	disk_attach(&fd->sc_dk);
    786  1.88.4.2  nathanw 
    787  1.88.4.2  nathanw 	/*
    788  1.88.4.2  nathanw 	 * Establish a mountroot_hook anyway in case we booted
    789  1.88.4.2  nathanw 	 * with RB_ASKNAME and get selected as the boot device.
    790  1.88.4.2  nathanw 	 */
    791  1.88.4.2  nathanw 	mountroothook_establish(fd_mountroot_hook, &fd->sc_dv);
    792  1.88.4.2  nathanw 
    793  1.88.4.2  nathanw 	/* Make sure the drive motor gets turned off at shutdown time. */
    794  1.88.4.2  nathanw 	fd->sc_sdhook = shutdownhook_establish(fd_motor_off, fd);
    795  1.88.4.2  nathanw }
    796  1.88.4.2  nathanw 
    797  1.88.4.2  nathanw __inline struct fd_type *
    798  1.88.4.2  nathanw fd_dev_to_type(fd, dev)
    799  1.88.4.2  nathanw 	struct fd_softc *fd;
    800  1.88.4.2  nathanw 	dev_t dev;
    801  1.88.4.2  nathanw {
    802  1.88.4.2  nathanw 	int type = FDTYPE(dev);
    803  1.88.4.2  nathanw 
    804  1.88.4.2  nathanw 	if (type > (sizeof(fd_types) / sizeof(fd_types[0])))
    805  1.88.4.2  nathanw 		return (NULL);
    806  1.88.4.2  nathanw 	return (type ? &fd_types[type - 1] : fd->sc_deftype);
    807  1.88.4.2  nathanw }
    808  1.88.4.2  nathanw 
    809  1.88.4.2  nathanw void
    810  1.88.4.2  nathanw fdstrategy(bp)
    811  1.88.4.2  nathanw 	register struct buf *bp;	/* IO operation to perform */
    812  1.88.4.2  nathanw {
    813  1.88.4.2  nathanw 	struct fd_softc *fd;
    814  1.88.4.2  nathanw 	int unit = FDUNIT(bp->b_dev);
    815  1.88.4.2  nathanw 	int sz;
    816  1.88.4.2  nathanw  	int s;
    817  1.88.4.2  nathanw 
    818  1.88.4.2  nathanw 	/* Valid unit, controller, and request? */
    819  1.88.4.2  nathanw 	if (unit >= fd_cd.cd_ndevs ||
    820  1.88.4.2  nathanw 	    (fd = fd_cd.cd_devs[unit]) == 0 ||
    821  1.88.4.2  nathanw 	    bp->b_blkno < 0 ||
    822  1.88.4.2  nathanw 	    (((bp->b_bcount % FD_BSIZE(fd)) != 0 ||
    823  1.88.4.2  nathanw 	      (bp->b_blkno * DEV_BSIZE) % FD_BSIZE(fd) != 0) &&
    824  1.88.4.2  nathanw 	     (bp->b_flags & B_FORMAT) == 0)) {
    825  1.88.4.2  nathanw 		bp->b_error = EINVAL;
    826  1.88.4.2  nathanw 		goto bad;
    827  1.88.4.2  nathanw 	}
    828  1.88.4.2  nathanw 
    829  1.88.4.2  nathanw 	/* If it's a null transfer, return immediately. */
    830  1.88.4.2  nathanw 	if (bp->b_bcount == 0)
    831  1.88.4.2  nathanw 		goto done;
    832  1.88.4.2  nathanw 
    833  1.88.4.2  nathanw 	sz = howmany(bp->b_bcount, DEV_BSIZE);
    834  1.88.4.2  nathanw 
    835  1.88.4.2  nathanw 	if (bp->b_blkno + sz > (fd->sc_type->size * DEV_BSIZE) / FD_BSIZE(fd)) {
    836  1.88.4.2  nathanw 		sz = (fd->sc_type->size * DEV_BSIZE) / FD_BSIZE(fd)
    837  1.88.4.2  nathanw 		     - bp->b_blkno;
    838  1.88.4.2  nathanw 		if (sz == 0) {
    839  1.88.4.2  nathanw 			/* If exactly at end of disk, return EOF. */
    840  1.88.4.2  nathanw 			bp->b_resid = bp->b_bcount;
    841  1.88.4.2  nathanw 			goto done;
    842  1.88.4.2  nathanw 		}
    843  1.88.4.2  nathanw 		if (sz < 0) {
    844  1.88.4.2  nathanw 			/* If past end of disk, return EINVAL. */
    845  1.88.4.2  nathanw 			bp->b_error = EINVAL;
    846  1.88.4.2  nathanw 			goto bad;
    847  1.88.4.2  nathanw 		}
    848  1.88.4.2  nathanw 		/* Otherwise, truncate request. */
    849  1.88.4.2  nathanw 		bp->b_bcount = sz << DEV_BSHIFT;
    850  1.88.4.2  nathanw 	}
    851  1.88.4.2  nathanw 
    852  1.88.4.2  nathanw 	bp->b_rawblkno = bp->b_blkno;
    853  1.88.4.2  nathanw  	bp->b_cylinder = (bp->b_blkno * DEV_BSIZE) /
    854  1.88.4.2  nathanw 		      (FD_BSIZE(fd) * fd->sc_type->seccyl);
    855  1.88.4.2  nathanw 
    856  1.88.4.2  nathanw #ifdef FD_DEBUG
    857  1.88.4.2  nathanw 	if (fdc_debug > 1)
    858  1.88.4.2  nathanw 	    printf("fdstrategy: b_blkno %d b_bcount %ld blkno %d cylin %ld\n",
    859  1.88.4.2  nathanw 		    bp->b_blkno, bp->b_bcount, fd->sc_blkno, bp->b_cylinder);
    860  1.88.4.2  nathanw #endif
    861  1.88.4.2  nathanw 
    862  1.88.4.2  nathanw 	/* Queue transfer on drive, activate drive and controller if idle. */
    863  1.88.4.2  nathanw 	s = splbio();
    864  1.88.4.2  nathanw 	disksort_cylinder(&fd->sc_q, bp);
    865  1.88.4.2  nathanw 	callout_stop(&fd->sc_motoroff_ch);		/* a good idea */
    866  1.88.4.2  nathanw 	if (fd->sc_active == 0)
    867  1.88.4.2  nathanw 		fdstart(fd);
    868  1.88.4.2  nathanw #ifdef DIAGNOSTIC
    869  1.88.4.2  nathanw 	else {
    870  1.88.4.2  nathanw 		struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
    871  1.88.4.2  nathanw 		if (fdc->sc_state == DEVIDLE) {
    872  1.88.4.2  nathanw 			printf("fdstrategy: controller inactive\n");
    873  1.88.4.2  nathanw 			fdcstart(fdc);
    874  1.88.4.2  nathanw 		}
    875  1.88.4.2  nathanw 	}
    876  1.88.4.2  nathanw #endif
    877  1.88.4.2  nathanw 	splx(s);
    878  1.88.4.2  nathanw 	return;
    879  1.88.4.2  nathanw 
    880  1.88.4.2  nathanw bad:
    881  1.88.4.2  nathanw 	bp->b_flags |= B_ERROR;
    882  1.88.4.2  nathanw done:
    883  1.88.4.2  nathanw 	/* Toss transfer; we're done early. */
    884  1.88.4.2  nathanw 	biodone(bp);
    885  1.88.4.2  nathanw }
    886  1.88.4.2  nathanw 
    887  1.88.4.2  nathanw void
    888  1.88.4.2  nathanw fdstart(fd)
    889  1.88.4.2  nathanw 	struct fd_softc *fd;
    890  1.88.4.2  nathanw {
    891  1.88.4.2  nathanw 	struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
    892  1.88.4.2  nathanw 	int active = fdc->sc_drives.tqh_first != 0;
    893  1.88.4.2  nathanw 
    894  1.88.4.2  nathanw 	/* Link into controller queue. */
    895  1.88.4.2  nathanw 	fd->sc_active = 1;
    896  1.88.4.2  nathanw 	TAILQ_INSERT_TAIL(&fdc->sc_drives, fd, sc_drivechain);
    897  1.88.4.2  nathanw 
    898  1.88.4.2  nathanw 	/* If controller not already active, start it. */
    899  1.88.4.2  nathanw 	if (!active)
    900  1.88.4.2  nathanw 		fdcstart(fdc);
    901  1.88.4.2  nathanw }
    902  1.88.4.2  nathanw 
    903  1.88.4.2  nathanw void
    904  1.88.4.2  nathanw fdfinish(fd, bp)
    905  1.88.4.2  nathanw 	struct fd_softc *fd;
    906  1.88.4.2  nathanw 	struct buf *bp;
    907  1.88.4.2  nathanw {
    908  1.88.4.2  nathanw 	struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
    909  1.88.4.2  nathanw 
    910  1.88.4.2  nathanw 	/*
    911  1.88.4.2  nathanw 	 * Move this drive to the end of the queue to give others a `fair'
    912  1.88.4.2  nathanw 	 * chance.  We only force a switch if N operations are completed while
    913  1.88.4.2  nathanw 	 * another drive is waiting to be serviced, since there is a long motor
    914  1.88.4.2  nathanw 	 * startup delay whenever we switch.
    915  1.88.4.2  nathanw 	 */
    916  1.88.4.2  nathanw 	if (fd->sc_drivechain.tqe_next && ++fd->sc_ops >= 8) {
    917  1.88.4.2  nathanw 		fd->sc_ops = 0;
    918  1.88.4.2  nathanw 		TAILQ_REMOVE(&fdc->sc_drives, fd, sc_drivechain);
    919  1.88.4.2  nathanw 		if (BUFQ_NEXT(bp) != NULL) {
    920  1.88.4.2  nathanw 			TAILQ_INSERT_TAIL(&fdc->sc_drives, fd, sc_drivechain);
    921  1.88.4.2  nathanw 		} else
    922  1.88.4.2  nathanw 			fd->sc_active = 0;
    923  1.88.4.2  nathanw 	}
    924  1.88.4.2  nathanw 	bp->b_resid = fd->sc_bcount;
    925  1.88.4.2  nathanw 	fd->sc_skip = 0;
    926  1.88.4.2  nathanw 	BUFQ_REMOVE(&fd->sc_q, bp);
    927  1.88.4.2  nathanw 
    928  1.88.4.2  nathanw 	biodone(bp);
    929  1.88.4.2  nathanw 	/* turn off motor 5s from now */
    930  1.88.4.2  nathanw 	callout_reset(&fd->sc_motoroff_ch, 5 * hz, fd_motor_off, fd);
    931  1.88.4.2  nathanw 	fdc->sc_state = DEVIDLE;
    932  1.88.4.2  nathanw }
    933  1.88.4.2  nathanw 
    934  1.88.4.2  nathanw void
    935  1.88.4.2  nathanw fdc_reset(fdc)
    936  1.88.4.2  nathanw 	struct fdc_softc *fdc;
    937  1.88.4.2  nathanw {
    938  1.88.4.2  nathanw 	bus_space_tag_t t = fdc->sc_bustag;
    939  1.88.4.2  nathanw 	bus_space_handle_t h = fdc->sc_handle;
    940  1.88.4.2  nathanw 
    941  1.88.4.2  nathanw 	if ((fdc->sc_flags & FDC_82077) != 0) {
    942  1.88.4.2  nathanw 		bus_space_write_1(t, h, fdc->sc_reg_dor,
    943  1.88.4.2  nathanw 				  FDO_FDMAEN | FDO_MOEN(0));
    944  1.88.4.2  nathanw 	}
    945  1.88.4.2  nathanw 
    946  1.88.4.2  nathanw 	bus_space_write_1(t, h, fdc->sc_reg_drs, DRS_RESET);
    947  1.88.4.2  nathanw 	delay(10);
    948  1.88.4.2  nathanw 	bus_space_write_1(t, h, fdc->sc_reg_drs, 0);
    949  1.88.4.2  nathanw 
    950  1.88.4.2  nathanw 	if ((fdc->sc_flags & FDC_82077) != 0) {
    951  1.88.4.2  nathanw 		bus_space_write_1(t, h, fdc->sc_reg_dor,
    952  1.88.4.2  nathanw 				  FDO_FRST | FDO_FDMAEN | FDO_DS);
    953  1.88.4.2  nathanw 	}
    954  1.88.4.2  nathanw #ifdef FD_DEBUG
    955  1.88.4.2  nathanw 	if (fdc_debug)
    956  1.88.4.2  nathanw 		printf("fdc reset\n");
    957  1.88.4.2  nathanw #endif
    958  1.88.4.2  nathanw }
    959  1.88.4.2  nathanw 
    960  1.88.4.2  nathanw void
    961  1.88.4.2  nathanw fd_set_motor(fdc)
    962  1.88.4.2  nathanw 	struct fdc_softc *fdc;
    963  1.88.4.2  nathanw {
    964  1.88.4.2  nathanw 	struct fd_softc *fd;
    965  1.88.4.2  nathanw 	u_char status;
    966  1.88.4.2  nathanw 	int n;
    967  1.88.4.2  nathanw 
    968  1.88.4.2  nathanw 	if ((fdc->sc_flags & FDC_82077) != 0) {
    969  1.88.4.2  nathanw 		status = FDO_FRST | FDO_FDMAEN;
    970  1.88.4.2  nathanw 		if ((fd = fdc->sc_drives.tqh_first) != NULL)
    971  1.88.4.2  nathanw 			status |= fd->sc_drive;
    972  1.88.4.2  nathanw 
    973  1.88.4.2  nathanw 		for (n = 0; n < 4; n++)
    974  1.88.4.2  nathanw 			if ((fd = fdc->sc_fd[n]) && (fd->sc_flags & FD_MOTOR))
    975  1.88.4.2  nathanw 				status |= FDO_MOEN(n);
    976  1.88.4.2  nathanw 		bus_space_write_1(fdc->sc_bustag, fdc->sc_handle,
    977  1.88.4.2  nathanw 				  fdc->sc_reg_dor, status);
    978  1.88.4.2  nathanw 	} else {
    979  1.88.4.2  nathanw 
    980  1.88.4.2  nathanw 		for (n = 0; n < 4; n++) {
    981  1.88.4.2  nathanw 			if ((fd = fdc->sc_fd[n]) != NULL  &&
    982  1.88.4.2  nathanw 			    (fd->sc_flags & FD_MOTOR) != 0) {
    983  1.88.4.2  nathanw 				auxregbisc(AUXIO4C_FDS, 0);
    984  1.88.4.2  nathanw 				return;
    985  1.88.4.2  nathanw 			}
    986  1.88.4.2  nathanw 		}
    987  1.88.4.2  nathanw 		auxregbisc(0, AUXIO4C_FDS);
    988  1.88.4.2  nathanw 	}
    989  1.88.4.2  nathanw }
    990  1.88.4.2  nathanw 
    991  1.88.4.2  nathanw void
    992  1.88.4.2  nathanw fd_motor_off(arg)
    993  1.88.4.2  nathanw 	void *arg;
    994  1.88.4.2  nathanw {
    995  1.88.4.2  nathanw 	struct fd_softc *fd = arg;
    996  1.88.4.2  nathanw 	int s;
    997  1.88.4.2  nathanw 
    998  1.88.4.2  nathanw 	s = splbio();
    999  1.88.4.2  nathanw 	fd->sc_flags &= ~(FD_MOTOR | FD_MOTOR_WAIT);
   1000  1.88.4.2  nathanw 	fd_set_motor((struct fdc_softc *)fd->sc_dv.dv_parent);
   1001  1.88.4.2  nathanw 	splx(s);
   1002  1.88.4.2  nathanw }
   1003  1.88.4.2  nathanw 
   1004  1.88.4.2  nathanw void
   1005  1.88.4.2  nathanw fd_motor_on(arg)
   1006  1.88.4.2  nathanw 	void *arg;
   1007  1.88.4.2  nathanw {
   1008  1.88.4.2  nathanw 	struct fd_softc *fd = arg;
   1009  1.88.4.2  nathanw 	struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
   1010  1.88.4.2  nathanw 	int s;
   1011  1.88.4.2  nathanw 
   1012  1.88.4.2  nathanw 	s = splbio();
   1013  1.88.4.2  nathanw 	fd->sc_flags &= ~FD_MOTOR_WAIT;
   1014  1.88.4.2  nathanw 	if ((fdc->sc_drives.tqh_first == fd) && (fdc->sc_state == MOTORWAIT))
   1015  1.88.4.2  nathanw 		(void) fdcstate(fdc);
   1016  1.88.4.2  nathanw 	splx(s);
   1017  1.88.4.2  nathanw }
   1018  1.88.4.2  nathanw 
   1019  1.88.4.2  nathanw /*
   1020  1.88.4.2  nathanw  * Get status bytes off the FDC after a command has finished
   1021  1.88.4.2  nathanw  * Returns the number of status bytes read; -1 on error.
   1022  1.88.4.2  nathanw  * The return value is also stored in `sc_nstat'.
   1023  1.88.4.2  nathanw  */
   1024  1.88.4.2  nathanw int
   1025  1.88.4.2  nathanw fdcresult(fdc)
   1026  1.88.4.2  nathanw 	struct fdc_softc *fdc;
   1027  1.88.4.2  nathanw {
   1028  1.88.4.2  nathanw 	bus_space_tag_t t = fdc->sc_bustag;
   1029  1.88.4.2  nathanw 	bus_space_handle_t h = fdc->sc_handle;
   1030  1.88.4.2  nathanw 	int j, n = 0;
   1031  1.88.4.2  nathanw 
   1032  1.88.4.2  nathanw 	for (j = 10000; j; j--) {
   1033  1.88.4.2  nathanw 		u_int8_t v = bus_space_read_1(t, h, fdc->sc_reg_msr);
   1034  1.88.4.2  nathanw 		v &= (NE7_DIO | NE7_RQM | NE7_CB);
   1035  1.88.4.2  nathanw 		if (v == NE7_RQM)
   1036  1.88.4.2  nathanw 			return (fdc->sc_nstat = n);
   1037  1.88.4.2  nathanw 		if (v == (NE7_DIO | NE7_RQM | NE7_CB)) {
   1038  1.88.4.2  nathanw 			if (n >= sizeof(fdc->sc_status)) {
   1039  1.88.4.2  nathanw 				log(LOG_ERR, "fdcresult: overrun\n");
   1040  1.88.4.2  nathanw 				return (-1);
   1041  1.88.4.2  nathanw 			}
   1042  1.88.4.2  nathanw 			fdc->sc_status[n++] =
   1043  1.88.4.2  nathanw 				bus_space_read_1(t, h, fdc->sc_reg_fifo);
   1044  1.88.4.2  nathanw 		} else
   1045  1.88.4.2  nathanw 			delay(1);
   1046  1.88.4.2  nathanw 	}
   1047  1.88.4.2  nathanw 
   1048  1.88.4.2  nathanw 	log(LOG_ERR, "fdcresult: timeout\n");
   1049  1.88.4.2  nathanw 	return (fdc->sc_nstat = -1);
   1050  1.88.4.2  nathanw }
   1051  1.88.4.2  nathanw 
   1052  1.88.4.2  nathanw /*
   1053  1.88.4.2  nathanw  * Write a command byte to the FDC.
   1054  1.88.4.2  nathanw  * Returns 0 on success; -1 on failure (i.e. timeout)
   1055  1.88.4.2  nathanw  */
   1056  1.88.4.2  nathanw int
   1057  1.88.4.2  nathanw fdc_wrfifo(fdc, x)
   1058  1.88.4.2  nathanw 	struct fdc_softc *fdc;
   1059  1.88.4.2  nathanw 	u_int8_t x;
   1060  1.88.4.2  nathanw {
   1061  1.88.4.2  nathanw 	bus_space_tag_t t = fdc->sc_bustag;
   1062  1.88.4.2  nathanw 	bus_space_handle_t h = fdc->sc_handle;
   1063  1.88.4.2  nathanw 	int i;
   1064  1.88.4.2  nathanw 
   1065  1.88.4.2  nathanw 	for (i = 100000; i-- > 0;) {
   1066  1.88.4.2  nathanw 		u_int8_t v = bus_space_read_1(t, h, fdc->sc_reg_msr);
   1067  1.88.4.2  nathanw 		if ((v & (NE7_DIO|NE7_RQM)) == NE7_RQM) {
   1068  1.88.4.2  nathanw 			/* The chip is ready */
   1069  1.88.4.2  nathanw 			bus_space_write_1(t, h, fdc->sc_reg_fifo, x);
   1070  1.88.4.2  nathanw 			return (0);
   1071  1.88.4.2  nathanw 		}
   1072  1.88.4.2  nathanw 		delay(1);
   1073  1.88.4.2  nathanw 	}
   1074  1.88.4.2  nathanw 	return (-1);
   1075  1.88.4.2  nathanw }
   1076  1.88.4.2  nathanw 
   1077  1.88.4.2  nathanw int
   1078  1.88.4.2  nathanw fdopen(dev, flags, fmt, p)
   1079  1.88.4.2  nathanw 	dev_t dev;
   1080  1.88.4.2  nathanw 	int flags, fmt;
   1081  1.88.4.2  nathanw 	struct proc *p;
   1082  1.88.4.2  nathanw {
   1083  1.88.4.2  nathanw  	int unit, pmask;
   1084  1.88.4.2  nathanw 	struct fd_softc *fd;
   1085  1.88.4.2  nathanw 	struct fd_type *type;
   1086  1.88.4.2  nathanw 
   1087  1.88.4.2  nathanw 	unit = FDUNIT(dev);
   1088  1.88.4.2  nathanw 	if (unit >= fd_cd.cd_ndevs)
   1089  1.88.4.2  nathanw 		return (ENXIO);
   1090  1.88.4.2  nathanw 	fd = fd_cd.cd_devs[unit];
   1091  1.88.4.2  nathanw 	if (fd == NULL)
   1092  1.88.4.2  nathanw 		return (ENXIO);
   1093  1.88.4.2  nathanw 	type = fd_dev_to_type(fd, dev);
   1094  1.88.4.2  nathanw 	if (type == NULL)
   1095  1.88.4.2  nathanw 		return (ENXIO);
   1096  1.88.4.2  nathanw 
   1097  1.88.4.2  nathanw 	if ((fd->sc_flags & FD_OPEN) != 0 &&
   1098  1.88.4.2  nathanw 	    fd->sc_type != type)
   1099  1.88.4.2  nathanw 		return (EBUSY);
   1100  1.88.4.2  nathanw 
   1101  1.88.4.2  nathanw 	fd->sc_type = type;
   1102  1.88.4.2  nathanw 	fd->sc_cylin = -1;
   1103  1.88.4.2  nathanw 	fd->sc_flags |= FD_OPEN;
   1104  1.88.4.2  nathanw 
   1105  1.88.4.2  nathanw 	/*
   1106  1.88.4.2  nathanw 	 * Only update the disklabel if we're not open anywhere else.
   1107  1.88.4.2  nathanw 	 */
   1108  1.88.4.2  nathanw 	if (fd->sc_dk.dk_openmask == 0)
   1109  1.88.4.2  nathanw 		fdgetdisklabel(dev);
   1110  1.88.4.2  nathanw 
   1111  1.88.4.2  nathanw 	pmask = (1 << DISKPART(dev));
   1112  1.88.4.2  nathanw 
   1113  1.88.4.2  nathanw 	switch (fmt) {
   1114  1.88.4.2  nathanw 	case S_IFCHR:
   1115  1.88.4.2  nathanw 		fd->sc_dk.dk_copenmask |= pmask;
   1116  1.88.4.2  nathanw 		break;
   1117  1.88.4.2  nathanw 
   1118  1.88.4.2  nathanw 	case S_IFBLK:
   1119  1.88.4.2  nathanw 		fd->sc_dk.dk_bopenmask |= pmask;
   1120  1.88.4.2  nathanw 		break;
   1121  1.88.4.2  nathanw 	}
   1122  1.88.4.2  nathanw 	fd->sc_dk.dk_openmask =
   1123  1.88.4.2  nathanw 	    fd->sc_dk.dk_copenmask | fd->sc_dk.dk_bopenmask;
   1124  1.88.4.2  nathanw 
   1125  1.88.4.2  nathanw 	return (0);
   1126  1.88.4.2  nathanw }
   1127  1.88.4.2  nathanw 
   1128  1.88.4.2  nathanw int
   1129  1.88.4.2  nathanw fdclose(dev, flags, fmt, p)
   1130  1.88.4.2  nathanw 	dev_t dev;
   1131  1.88.4.2  nathanw 	int flags, fmt;
   1132  1.88.4.2  nathanw 	struct proc *p;
   1133  1.88.4.2  nathanw {
   1134  1.88.4.2  nathanw 	struct fd_softc *fd = fd_cd.cd_devs[FDUNIT(dev)];
   1135  1.88.4.2  nathanw 	int pmask = (1 << DISKPART(dev));
   1136  1.88.4.2  nathanw 
   1137  1.88.4.2  nathanw 	fd->sc_flags &= ~FD_OPEN;
   1138  1.88.4.2  nathanw 	fd->sc_opts &= ~(FDOPT_NORETRY|FDOPT_SILENT);
   1139  1.88.4.2  nathanw 
   1140  1.88.4.2  nathanw 	switch (fmt) {
   1141  1.88.4.2  nathanw 	case S_IFCHR:
   1142  1.88.4.2  nathanw 		fd->sc_dk.dk_copenmask &= ~pmask;
   1143  1.88.4.2  nathanw 		break;
   1144  1.88.4.2  nathanw 
   1145  1.88.4.2  nathanw 	case S_IFBLK:
   1146  1.88.4.2  nathanw 		fd->sc_dk.dk_bopenmask &= ~pmask;
   1147  1.88.4.2  nathanw 		break;
   1148  1.88.4.2  nathanw 	}
   1149  1.88.4.2  nathanw 	fd->sc_dk.dk_openmask =
   1150  1.88.4.2  nathanw 	    fd->sc_dk.dk_copenmask | fd->sc_dk.dk_bopenmask;
   1151  1.88.4.2  nathanw 
   1152  1.88.4.2  nathanw 	return (0);
   1153  1.88.4.2  nathanw }
   1154  1.88.4.2  nathanw 
   1155  1.88.4.2  nathanw int
   1156  1.88.4.2  nathanw fdread(dev, uio, flag)
   1157  1.88.4.2  nathanw         dev_t dev;
   1158  1.88.4.2  nathanw         struct uio *uio;
   1159  1.88.4.2  nathanw 	int flag;
   1160  1.88.4.2  nathanw {
   1161  1.88.4.2  nathanw 
   1162  1.88.4.2  nathanw         return (physio(fdstrategy, NULL, dev, B_READ, minphys, uio));
   1163  1.88.4.2  nathanw }
   1164  1.88.4.2  nathanw 
   1165  1.88.4.2  nathanw int
   1166  1.88.4.2  nathanw fdwrite(dev, uio, flag)
   1167  1.88.4.2  nathanw         dev_t dev;
   1168  1.88.4.2  nathanw         struct uio *uio;
   1169  1.88.4.2  nathanw 	int flag;
   1170  1.88.4.2  nathanw {
   1171  1.88.4.2  nathanw 
   1172  1.88.4.2  nathanw         return (physio(fdstrategy, NULL, dev, B_WRITE, minphys, uio));
   1173  1.88.4.2  nathanw }
   1174  1.88.4.2  nathanw 
   1175  1.88.4.2  nathanw void
   1176  1.88.4.2  nathanw fdcstart(fdc)
   1177  1.88.4.2  nathanw 	struct fdc_softc *fdc;
   1178  1.88.4.2  nathanw {
   1179  1.88.4.2  nathanw 
   1180  1.88.4.2  nathanw #ifdef DIAGNOSTIC
   1181  1.88.4.2  nathanw 	/* only got here if controller's drive queue was inactive; should
   1182  1.88.4.2  nathanw 	   be in idle state */
   1183  1.88.4.2  nathanw 	if (fdc->sc_state != DEVIDLE) {
   1184  1.88.4.2  nathanw 		printf("fdcstart: not idle\n");
   1185  1.88.4.2  nathanw 		return;
   1186  1.88.4.2  nathanw 	}
   1187  1.88.4.2  nathanw #endif
   1188  1.88.4.2  nathanw 	(void) fdcstate(fdc);
   1189  1.88.4.2  nathanw }
   1190  1.88.4.2  nathanw 
   1191  1.88.4.2  nathanw void
   1192  1.88.4.2  nathanw fdcstatus(fdc, s)
   1193  1.88.4.2  nathanw 	struct fdc_softc *fdc;
   1194  1.88.4.2  nathanw 	char *s;
   1195  1.88.4.2  nathanw {
   1196  1.88.4.2  nathanw 	struct fd_softc *fd = fdc->sc_drives.tqh_first;
   1197  1.88.4.2  nathanw 	int n;
   1198  1.88.4.2  nathanw 	char bits[64];
   1199  1.88.4.2  nathanw 
   1200  1.88.4.2  nathanw 	/* Just print last status */
   1201  1.88.4.2  nathanw 	n = fdc->sc_nstat;
   1202  1.88.4.2  nathanw 
   1203  1.88.4.2  nathanw #if 0
   1204  1.88.4.2  nathanw 	/*
   1205  1.88.4.2  nathanw 	 * A 82072 seems to return <invalid command> on
   1206  1.88.4.2  nathanw 	 * gratuitous Sense Interrupt commands.
   1207  1.88.4.2  nathanw 	 */
   1208  1.88.4.2  nathanw 	if (n == 0 && (fdc->sc_flags & FDC_82077) != 0) {
   1209  1.88.4.2  nathanw 		fdc_wrfifo(fdc, NE7CMD_SENSEI);
   1210  1.88.4.2  nathanw 		(void) fdcresult(fdc);
   1211  1.88.4.2  nathanw 		n = 2;
   1212  1.88.4.2  nathanw 	}
   1213  1.88.4.2  nathanw #endif
   1214  1.88.4.2  nathanw 
   1215  1.88.4.2  nathanw 	printf("%s: %s: state %d",
   1216  1.88.4.2  nathanw 		fd ? fd->sc_dv.dv_xname : "fdc", s, fdc->sc_state);
   1217  1.88.4.2  nathanw 
   1218  1.88.4.2  nathanw 	switch (n) {
   1219  1.88.4.2  nathanw 	case 0:
   1220  1.88.4.2  nathanw 		printf("\n");
   1221  1.88.4.2  nathanw 		break;
   1222  1.88.4.2  nathanw 	case 2:
   1223  1.88.4.2  nathanw 		printf(" (st0 %s cyl %d)\n",
   1224  1.88.4.2  nathanw 		    bitmask_snprintf(fdc->sc_status[0], NE7_ST0BITS,
   1225  1.88.4.2  nathanw 		    bits, sizeof(bits)), fdc->sc_status[1]);
   1226  1.88.4.2  nathanw 		break;
   1227  1.88.4.2  nathanw 	case 7:
   1228  1.88.4.2  nathanw 		printf(" (st0 %s", bitmask_snprintf(fdc->sc_status[0],
   1229  1.88.4.2  nathanw 		    NE7_ST0BITS, bits, sizeof(bits)));
   1230  1.88.4.2  nathanw 		printf(" st1 %s", bitmask_snprintf(fdc->sc_status[1],
   1231  1.88.4.2  nathanw 		    NE7_ST1BITS, bits, sizeof(bits)));
   1232  1.88.4.2  nathanw 		printf(" st2 %s", bitmask_snprintf(fdc->sc_status[2],
   1233  1.88.4.2  nathanw 		    NE7_ST2BITS, bits, sizeof(bits)));
   1234  1.88.4.2  nathanw 		printf(" cyl %d head %d sec %d)\n",
   1235  1.88.4.2  nathanw 		    fdc->sc_status[3], fdc->sc_status[4], fdc->sc_status[5]);
   1236  1.88.4.2  nathanw 		break;
   1237  1.88.4.2  nathanw #ifdef DIAGNOSTIC
   1238  1.88.4.2  nathanw 	default:
   1239  1.88.4.2  nathanw 		printf(" fdcstatus: weird size: %d\n", n);
   1240  1.88.4.2  nathanw 		break;
   1241  1.88.4.2  nathanw #endif
   1242  1.88.4.2  nathanw 	}
   1243  1.88.4.2  nathanw }
   1244  1.88.4.2  nathanw 
   1245  1.88.4.2  nathanw void
   1246  1.88.4.2  nathanw fdctimeout(arg)
   1247  1.88.4.2  nathanw 	void *arg;
   1248  1.88.4.2  nathanw {
   1249  1.88.4.2  nathanw 	struct fdc_softc *fdc = arg;
   1250  1.88.4.2  nathanw 	struct fd_softc *fd;
   1251  1.88.4.2  nathanw 	int s;
   1252  1.88.4.2  nathanw 
   1253  1.88.4.2  nathanw 	s = splbio();
   1254  1.88.4.2  nathanw 	fd = fdc->sc_drives.tqh_first;
   1255  1.88.4.2  nathanw 	if (fd == NULL) {
   1256  1.88.4.2  nathanw 		printf("%s: timeout but no I/O pending: state %d, istatus=%d\n",
   1257  1.88.4.2  nathanw 			fdc->sc_dev.dv_xname,
   1258  1.88.4.2  nathanw 			fdc->sc_state, fdc->sc_istatus);
   1259  1.88.4.2  nathanw 		fdc->sc_state = DEVIDLE;
   1260  1.88.4.2  nathanw 		goto out;
   1261  1.88.4.2  nathanw 	}
   1262  1.88.4.2  nathanw 
   1263  1.88.4.2  nathanw 	if (BUFQ_FIRST(&fd->sc_q) != NULL)
   1264  1.88.4.2  nathanw 		fdc->sc_state++;
   1265  1.88.4.2  nathanw 	else
   1266  1.88.4.2  nathanw 		fdc->sc_state = DEVIDLE;
   1267  1.88.4.2  nathanw 
   1268  1.88.4.2  nathanw 	(void) fdcstate(fdc);
   1269  1.88.4.2  nathanw out:
   1270  1.88.4.2  nathanw 	splx(s);
   1271  1.88.4.2  nathanw 
   1272  1.88.4.2  nathanw }
   1273  1.88.4.2  nathanw 
   1274  1.88.4.2  nathanw void
   1275  1.88.4.2  nathanw fdcpseudointr(arg)
   1276  1.88.4.2  nathanw 	void *arg;
   1277  1.88.4.2  nathanw {
   1278  1.88.4.2  nathanw 	struct fdc_softc *fdc = arg;
   1279  1.88.4.2  nathanw 	int s;
   1280  1.88.4.2  nathanw 
   1281  1.88.4.2  nathanw 	/* Just ensure it has the right spl. */
   1282  1.88.4.2  nathanw 	s = splbio();
   1283  1.88.4.2  nathanw 	(void) fdcstate(fdc);
   1284  1.88.4.2  nathanw 	splx(s);
   1285  1.88.4.2  nathanw }
   1286  1.88.4.2  nathanw 
   1287  1.88.4.2  nathanw 
   1288  1.88.4.2  nathanw /*
   1289  1.88.4.2  nathanw  * hardware interrupt entry point: used only if no `fast trap' * (in-window)
   1290  1.88.4.2  nathanw  * handler is available. Unfortunately, we have no reliable way to
   1291  1.88.4.2  nathanw  * determine that the interrupt really came from the floppy controller;
   1292  1.88.4.2  nathanw  * just hope that the other devices that share this interrupt level
   1293  1.88.4.2  nathanw  * can do better..
   1294  1.88.4.2  nathanw  */
   1295  1.88.4.2  nathanw int
   1296  1.88.4.2  nathanw fdc_c_hwintr(arg)
   1297  1.88.4.2  nathanw 	void *arg;
   1298  1.88.4.2  nathanw {
   1299  1.88.4.2  nathanw 	struct fdc_softc *fdc = arg;
   1300  1.88.4.2  nathanw 	bus_space_tag_t t = fdc->sc_bustag;
   1301  1.88.4.2  nathanw 	bus_space_handle_t h = fdc->sc_handle;
   1302  1.88.4.2  nathanw 
   1303  1.88.4.2  nathanw 	switch (fdc->sc_itask) {
   1304  1.88.4.2  nathanw 	case FDC_ITASK_NONE:
   1305  1.88.4.2  nathanw 		return (0);
   1306  1.88.4.2  nathanw 	case FDC_ITASK_SENSEI:
   1307  1.88.4.2  nathanw 		if (fdc_wrfifo(fdc, NE7CMD_SENSEI) != 0 || fdcresult(fdc) == -1)
   1308  1.88.4.2  nathanw 			fdc->sc_istatus = FDC_ISTATUS_ERROR;
   1309  1.88.4.2  nathanw 		else
   1310  1.88.4.2  nathanw 			fdc->sc_istatus = FDC_ISTATUS_DONE;
   1311  1.88.4.2  nathanw 		FD_SET_SWINTR;
   1312  1.88.4.2  nathanw 		return (1);
   1313  1.88.4.2  nathanw 	case FDC_ITASK_DMA:
   1314  1.88.4.2  nathanw 		/* Proceed with pseudo-dma below */
   1315  1.88.4.2  nathanw 		break;
   1316  1.88.4.2  nathanw 	default:
   1317  1.88.4.2  nathanw 		printf("fdc: stray hard interrupt: itask=%d\n", fdc->sc_itask);
   1318  1.88.4.2  nathanw 		fdc->sc_istatus = FDC_ISTATUS_SPURIOUS;
   1319  1.88.4.2  nathanw 		FD_SET_SWINTR;
   1320  1.88.4.2  nathanw 		return (1);
   1321  1.88.4.2  nathanw 	}
   1322  1.88.4.2  nathanw 
   1323  1.88.4.2  nathanw 	/*
   1324  1.88.4.2  nathanw 	 * Pseudo DMA in progress
   1325  1.88.4.2  nathanw 	 */
   1326  1.88.4.2  nathanw 	for (;;) {
   1327  1.88.4.2  nathanw 		u_int8_t msr;
   1328  1.88.4.2  nathanw 
   1329  1.88.4.2  nathanw 		msr = bus_space_read_1(t, h, fdc->sc_reg_msr);
   1330  1.88.4.2  nathanw 
   1331  1.88.4.2  nathanw 		if ((msr & NE7_RQM) == 0)
   1332  1.88.4.2  nathanw 			/* That's all this round */
   1333  1.88.4.2  nathanw 			break;
   1334  1.88.4.2  nathanw 
   1335  1.88.4.2  nathanw 		if ((msr & NE7_NDM) == 0) {
   1336  1.88.4.2  nathanw 			fdcresult(fdc);
   1337  1.88.4.2  nathanw 			fdc->sc_istatus = FDC_ISTATUS_DONE;
   1338  1.88.4.2  nathanw 			FD_SET_SWINTR;
   1339  1.88.4.2  nathanw #ifdef FD_DEBUG
   1340  1.88.4.2  nathanw 			if (fdc_debug > 1)
   1341  1.88.4.2  nathanw 				printf("fdc: overrun: tc = %d\n", fdc->sc_tc);
   1342  1.88.4.2  nathanw #endif
   1343  1.88.4.2  nathanw 			break;
   1344  1.88.4.2  nathanw 		}
   1345  1.88.4.2  nathanw 
   1346  1.88.4.2  nathanw 		/* Another byte can be transferred */
   1347  1.88.4.2  nathanw 		if ((msr & NE7_DIO) != 0)
   1348  1.88.4.2  nathanw 			*fdc->sc_data =
   1349  1.88.4.2  nathanw 				bus_space_read_1(t, h, fdc->sc_reg_fifo);
   1350  1.88.4.2  nathanw 		else
   1351  1.88.4.2  nathanw 			bus_space_write_1(t, h, fdc->sc_reg_fifo,
   1352  1.88.4.2  nathanw 					  *fdc->sc_data);
   1353  1.88.4.2  nathanw 
   1354  1.88.4.2  nathanw 		fdc->sc_data++;
   1355  1.88.4.2  nathanw 		if (--fdc->sc_tc == 0) {
   1356  1.88.4.2  nathanw 			fdc->sc_istatus = FDC_ISTATUS_DONE;
   1357  1.88.4.2  nathanw 			FTC_FLIP;
   1358  1.88.4.2  nathanw 			fdcresult(fdc);
   1359  1.88.4.2  nathanw 			FD_SET_SWINTR;
   1360  1.88.4.2  nathanw 			break;
   1361  1.88.4.2  nathanw 		}
   1362  1.88.4.2  nathanw 	}
   1363  1.88.4.2  nathanw 	return (1);
   1364  1.88.4.2  nathanw }
   1365  1.88.4.2  nathanw 
   1366  1.88.4.2  nathanw int
   1367  1.88.4.2  nathanw fdcswintr(arg)
   1368  1.88.4.2  nathanw 	void *arg;
   1369  1.88.4.2  nathanw {
   1370  1.88.4.2  nathanw 	struct fdc_softc *fdc = arg;
   1371  1.88.4.2  nathanw 	int s;
   1372  1.88.4.2  nathanw 
   1373  1.88.4.2  nathanw 	if (fdc->sc_istatus == FDC_ISTATUS_NONE)
   1374  1.88.4.2  nathanw 		/* This (software) interrupt is not for us */
   1375  1.88.4.2  nathanw 		return (0);
   1376  1.88.4.2  nathanw 
   1377  1.88.4.2  nathanw 	switch (fdc->sc_istatus) {
   1378  1.88.4.2  nathanw 	case FDC_ISTATUS_ERROR:
   1379  1.88.4.2  nathanw 		printf("fdc: ierror status: state %d\n", fdc->sc_state);
   1380  1.88.4.2  nathanw 		break;
   1381  1.88.4.2  nathanw 	case FDC_ISTATUS_SPURIOUS:
   1382  1.88.4.2  nathanw 		printf("fdc: spurious interrupt: state %d\n", fdc->sc_state);
   1383  1.88.4.2  nathanw 		break;
   1384  1.88.4.2  nathanw 	}
   1385  1.88.4.2  nathanw 
   1386  1.88.4.2  nathanw 	s = splbio();
   1387  1.88.4.2  nathanw 	fdcstate(fdc);
   1388  1.88.4.2  nathanw 	splx(s);
   1389  1.88.4.2  nathanw 	return (1);
   1390  1.88.4.2  nathanw }
   1391  1.88.4.2  nathanw 
   1392  1.88.4.2  nathanw int
   1393  1.88.4.2  nathanw fdcstate(fdc)
   1394  1.88.4.2  nathanw 	struct fdc_softc *fdc;
   1395  1.88.4.2  nathanw {
   1396  1.88.4.2  nathanw #define	st0	fdc->sc_status[0]
   1397  1.88.4.2  nathanw #define	st1	fdc->sc_status[1]
   1398  1.88.4.2  nathanw #define	cyl	fdc->sc_status[1]
   1399  1.88.4.2  nathanw #define FDC_WRFIFO(fdc, c) do {			\
   1400  1.88.4.2  nathanw 	if (fdc_wrfifo(fdc, (c))) {		\
   1401  1.88.4.2  nathanw 		goto xxx;			\
   1402  1.88.4.2  nathanw 	}					\
   1403  1.88.4.2  nathanw } while(0)
   1404  1.88.4.2  nathanw 
   1405  1.88.4.2  nathanw 	struct fd_softc *fd;
   1406  1.88.4.2  nathanw 	struct buf *bp;
   1407  1.88.4.2  nathanw 	int read, head, sec, nblks;
   1408  1.88.4.2  nathanw 	struct fd_type *type;
   1409  1.88.4.2  nathanw 	struct ne7_fd_formb *finfo = NULL;
   1410  1.88.4.2  nathanw 
   1411  1.88.4.2  nathanw 	if (fdc->sc_istatus == FDC_ISTATUS_ERROR) {
   1412  1.88.4.2  nathanw 		/* Prevent loop if the reset sequence produces errors */
   1413  1.88.4.2  nathanw 		if (fdc->sc_state != RESETCOMPLETE &&
   1414  1.88.4.2  nathanw 		    fdc->sc_state != RECALWAIT &&
   1415  1.88.4.2  nathanw 		    fdc->sc_state != RECALCOMPLETE)
   1416  1.88.4.2  nathanw 			fdc->sc_state = DORESET;
   1417  1.88.4.2  nathanw 	}
   1418  1.88.4.2  nathanw 
   1419  1.88.4.2  nathanw 	/* Clear I task/status field */
   1420  1.88.4.2  nathanw 	fdc->sc_istatus = FDC_ISTATUS_NONE;
   1421  1.88.4.2  nathanw 	fdc->sc_itask = FDC_ITASK_NONE;
   1422  1.88.4.2  nathanw 
   1423  1.88.4.2  nathanw loop:
   1424  1.88.4.2  nathanw 	/* Is there a drive for the controller to do a transfer with? */
   1425  1.88.4.2  nathanw 	fd = fdc->sc_drives.tqh_first;
   1426  1.88.4.2  nathanw 	if (fd == NULL) {
   1427  1.88.4.2  nathanw 		fdc->sc_state = DEVIDLE;
   1428  1.88.4.2  nathanw  		return (0);
   1429  1.88.4.2  nathanw 	}
   1430  1.88.4.2  nathanw 
   1431  1.88.4.2  nathanw 	/* Is there a transfer to this drive?  If not, deactivate drive. */
   1432  1.88.4.2  nathanw 	bp = BUFQ_FIRST(&fd->sc_q);
   1433  1.88.4.2  nathanw 	if (bp == NULL) {
   1434  1.88.4.2  nathanw 		fd->sc_ops = 0;
   1435  1.88.4.2  nathanw 		TAILQ_REMOVE(&fdc->sc_drives, fd, sc_drivechain);
   1436  1.88.4.2  nathanw 		fd->sc_active = 0;
   1437  1.88.4.2  nathanw 		goto loop;
   1438  1.88.4.2  nathanw 	}
   1439  1.88.4.2  nathanw 
   1440  1.88.4.2  nathanw 	if (bp->b_flags & B_FORMAT)
   1441  1.88.4.2  nathanw 		finfo = (struct ne7_fd_formb *)bp->b_data;
   1442  1.88.4.2  nathanw 
   1443  1.88.4.2  nathanw 	switch (fdc->sc_state) {
   1444  1.88.4.2  nathanw 	case DEVIDLE:
   1445  1.88.4.2  nathanw 		fdc->sc_errors = 0;
   1446  1.88.4.2  nathanw 		fd->sc_skip = 0;
   1447  1.88.4.2  nathanw 		fd->sc_bcount = bp->b_bcount;
   1448  1.88.4.2  nathanw 		fd->sc_blkno = (bp->b_blkno * DEV_BSIZE) / FD_BSIZE(fd);
   1449  1.88.4.2  nathanw 		callout_stop(&fd->sc_motoroff_ch);
   1450  1.88.4.2  nathanw 		if ((fd->sc_flags & FD_MOTOR_WAIT) != 0) {
   1451  1.88.4.2  nathanw 			fdc->sc_state = MOTORWAIT;
   1452  1.88.4.2  nathanw 			return (1);
   1453  1.88.4.2  nathanw 		}
   1454  1.88.4.2  nathanw 		if ((fd->sc_flags & FD_MOTOR) == 0) {
   1455  1.88.4.2  nathanw 			/* Turn on the motor, being careful about pairing. */
   1456  1.88.4.2  nathanw 			struct fd_softc *ofd = fdc->sc_fd[fd->sc_drive ^ 1];
   1457  1.88.4.2  nathanw 			if (ofd && ofd->sc_flags & FD_MOTOR) {
   1458  1.88.4.2  nathanw 				callout_stop(&ofd->sc_motoroff_ch);
   1459  1.88.4.2  nathanw 				ofd->sc_flags &= ~(FD_MOTOR | FD_MOTOR_WAIT);
   1460  1.88.4.2  nathanw 			}
   1461  1.88.4.2  nathanw 			fd->sc_flags |= FD_MOTOR | FD_MOTOR_WAIT;
   1462  1.88.4.2  nathanw 			fd_set_motor(fdc);
   1463  1.88.4.2  nathanw 			fdc->sc_state = MOTORWAIT;
   1464  1.88.4.2  nathanw 			if ((fdc->sc_flags & FDC_NEEDMOTORWAIT) != 0) { /*XXX*/
   1465  1.88.4.2  nathanw 				/* Allow .25s for motor to stabilize. */
   1466  1.88.4.2  nathanw 				callout_reset(&fd->sc_motoron_ch, hz / 4,
   1467  1.88.4.2  nathanw 				    fd_motor_on, fd);
   1468  1.88.4.2  nathanw 			} else {
   1469  1.88.4.2  nathanw 				fd->sc_flags &= ~FD_MOTOR_WAIT;
   1470  1.88.4.2  nathanw 				goto loop;
   1471  1.88.4.2  nathanw 			}
   1472  1.88.4.2  nathanw 			return (1);
   1473  1.88.4.2  nathanw 		}
   1474  1.88.4.2  nathanw 		/* Make sure the right drive is selected. */
   1475  1.88.4.2  nathanw 		fd_set_motor(fdc);
   1476  1.88.4.2  nathanw 
   1477  1.88.4.2  nathanw 		/*FALLTHROUGH*/
   1478  1.88.4.2  nathanw 	case DOSEEK:
   1479  1.88.4.2  nathanw 	doseek:
   1480  1.88.4.2  nathanw 		if ((fdc->sc_flags & FDC_EIS) &&
   1481  1.88.4.2  nathanw 		    (bp->b_flags & B_FORMAT) == 0) {
   1482  1.88.4.2  nathanw 			fd->sc_cylin = bp->b_cylinder;
   1483  1.88.4.2  nathanw 			/* We use implied seek */
   1484  1.88.4.2  nathanw 			goto doio;
   1485  1.88.4.2  nathanw 		}
   1486  1.88.4.2  nathanw 
   1487  1.88.4.2  nathanw 		if (fd->sc_cylin == bp->b_cylinder)
   1488  1.88.4.2  nathanw 			goto doio;
   1489  1.88.4.2  nathanw 
   1490  1.88.4.2  nathanw 		fd->sc_cylin = -1;
   1491  1.88.4.2  nathanw 		fdc->sc_state = SEEKWAIT;
   1492  1.88.4.2  nathanw 		fdc->sc_nstat = 0;
   1493  1.88.4.2  nathanw 
   1494  1.88.4.2  nathanw 		fd->sc_dk.dk_seek++;
   1495  1.88.4.2  nathanw 
   1496  1.88.4.2  nathanw 		disk_busy(&fd->sc_dk);
   1497  1.88.4.2  nathanw 		callout_reset(&fdc->sc_timo_ch, 4 * hz, fdctimeout, fdc);
   1498  1.88.4.2  nathanw 
   1499  1.88.4.2  nathanw 		/* specify command */
   1500  1.88.4.2  nathanw 		FDC_WRFIFO(fdc, NE7CMD_SPECIFY);
   1501  1.88.4.2  nathanw 		FDC_WRFIFO(fdc, fd->sc_type->steprate);
   1502  1.88.4.2  nathanw 		/* XXX head load time == 6ms */
   1503  1.88.4.2  nathanw 		FDC_WRFIFO(fdc, 6 | NE7_SPECIFY_NODMA);
   1504  1.88.4.2  nathanw 
   1505  1.88.4.2  nathanw 		fdc->sc_itask = FDC_ITASK_SENSEI;
   1506  1.88.4.2  nathanw 		/* seek function */
   1507  1.88.4.2  nathanw 		FDC_WRFIFO(fdc, NE7CMD_SEEK);
   1508  1.88.4.2  nathanw 		FDC_WRFIFO(fdc, fd->sc_drive); /* drive number */
   1509  1.88.4.2  nathanw 		FDC_WRFIFO(fdc, bp->b_cylinder * fd->sc_type->step);
   1510  1.88.4.2  nathanw 		return (1);
   1511  1.88.4.2  nathanw 
   1512  1.88.4.2  nathanw 	case DOIO:
   1513  1.88.4.2  nathanw 	doio:
   1514  1.88.4.2  nathanw 		if (finfo != NULL)
   1515  1.88.4.2  nathanw 			fd->sc_skip = (char *)&(finfo->fd_formb_cylno(0)) -
   1516  1.88.4.2  nathanw 				      (char *)finfo;
   1517  1.88.4.2  nathanw 		type = fd->sc_type;
   1518  1.88.4.2  nathanw 		sec = fd->sc_blkno % type->seccyl;
   1519  1.88.4.2  nathanw 		nblks = type->seccyl - sec;
   1520  1.88.4.2  nathanw 		nblks = min(nblks, fd->sc_bcount / FD_BSIZE(fd));
   1521  1.88.4.2  nathanw 		nblks = min(nblks, FDC_MAXIOSIZE / FD_BSIZE(fd));
   1522  1.88.4.2  nathanw 		fd->sc_nblks = nblks;
   1523  1.88.4.2  nathanw 		fd->sc_nbytes = finfo ? bp->b_bcount : nblks * FD_BSIZE(fd);
   1524  1.88.4.2  nathanw 		head = sec / type->sectrac;
   1525  1.88.4.2  nathanw 		sec -= head * type->sectrac;
   1526  1.88.4.2  nathanw #ifdef DIAGNOSTIC
   1527  1.88.4.2  nathanw 		{int block;
   1528  1.88.4.2  nathanw 		 block = (fd->sc_cylin * type->heads + head) * type->sectrac + sec;
   1529  1.88.4.2  nathanw 		 if (block != fd->sc_blkno) {
   1530  1.88.4.2  nathanw 			 printf("fdcintr: block %d != blkno %d\n", block, fd->sc_blkno);
   1531  1.88.4.2  nathanw #ifdef DDB
   1532  1.88.4.2  nathanw 			 Debugger();
   1533  1.88.4.2  nathanw #endif
   1534  1.88.4.2  nathanw 		 }}
   1535  1.88.4.2  nathanw #endif
   1536  1.88.4.2  nathanw 		read = bp->b_flags & B_READ;
   1537  1.88.4.2  nathanw 
   1538  1.88.4.2  nathanw 		/* Setup for pseudo DMA */
   1539  1.88.4.2  nathanw 		fdc->sc_data = bp->b_data + fd->sc_skip;
   1540  1.88.4.2  nathanw 		fdc->sc_tc = fd->sc_nbytes;
   1541  1.88.4.2  nathanw 
   1542  1.88.4.2  nathanw 		bus_space_write_1(fdc->sc_bustag, fdc->sc_handle,
   1543  1.88.4.2  nathanw 				  fdc->sc_reg_drs, type->rate);
   1544  1.88.4.2  nathanw #ifdef FD_DEBUG
   1545  1.88.4.2  nathanw 		if (fdc_debug > 1)
   1546  1.88.4.2  nathanw 			printf("fdcstate: doio: %s drive %d "
   1547  1.88.4.2  nathanw 				"track %d head %d sec %d nblks %d\n",
   1548  1.88.4.2  nathanw 				finfo ? "format" :
   1549  1.88.4.2  nathanw 					(read ? "read" : "write"),
   1550  1.88.4.2  nathanw 				fd->sc_drive, fd->sc_cylin, head, sec, nblks);
   1551  1.88.4.2  nathanw #endif
   1552  1.88.4.2  nathanw 		fdc->sc_state = IOCOMPLETE;
   1553  1.88.4.2  nathanw 		fdc->sc_itask = FDC_ITASK_DMA;
   1554  1.88.4.2  nathanw 		fdc->sc_nstat = 0;
   1555  1.88.4.2  nathanw 
   1556  1.88.4.2  nathanw 		disk_busy(&fd->sc_dk);
   1557  1.88.4.2  nathanw 
   1558  1.88.4.2  nathanw 		/* allow 3 seconds for operation */
   1559  1.88.4.2  nathanw 		callout_reset(&fdc->sc_timo_ch, 3 * hz, fdctimeout, fdc);
   1560  1.88.4.2  nathanw 
   1561  1.88.4.2  nathanw 		if (finfo != NULL) {
   1562  1.88.4.2  nathanw 			/* formatting */
   1563  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, NE7CMD_FORMAT);
   1564  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, (head << 2) | fd->sc_drive);
   1565  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, finfo->fd_formb_secshift);
   1566  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, finfo->fd_formb_nsecs);
   1567  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, finfo->fd_formb_gaplen);
   1568  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, finfo->fd_formb_fillbyte);
   1569  1.88.4.2  nathanw 		} else {
   1570  1.88.4.2  nathanw 			if (read)
   1571  1.88.4.2  nathanw 				FDC_WRFIFO(fdc, NE7CMD_READ);
   1572  1.88.4.2  nathanw 			else
   1573  1.88.4.2  nathanw 				FDC_WRFIFO(fdc, NE7CMD_WRITE);
   1574  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, (head << 2) | fd->sc_drive);
   1575  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, fd->sc_cylin);	/*track*/
   1576  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, head);
   1577  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, sec + 1);	/*sector+1*/
   1578  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, type->secsize);/*sector size*/
   1579  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, type->sectrac);/*secs/track*/
   1580  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, type->gap1);	/*gap1 size*/
   1581  1.88.4.2  nathanw 			FDC_WRFIFO(fdc, type->datalen);/*data length*/
   1582  1.88.4.2  nathanw 		}
   1583  1.88.4.2  nathanw 
   1584  1.88.4.2  nathanw 		return (1);				/* will return later */
   1585  1.88.4.2  nathanw 
   1586  1.88.4.2  nathanw 	case SEEKWAIT:
   1587  1.88.4.2  nathanw 		callout_stop(&fdc->sc_timo_ch);
   1588  1.88.4.2  nathanw 		fdc->sc_state = SEEKCOMPLETE;
   1589  1.88.4.2  nathanw 		if (fdc->sc_flags & FDC_NEEDHEADSETTLE) {
   1590  1.88.4.2  nathanw 			/* allow 1/50 second for heads to settle */
   1591  1.88.4.2  nathanw 			callout_reset(&fdc->sc_intr_ch, hz / 50,
   1592  1.88.4.2  nathanw 			    fdcpseudointr, fdc);
   1593  1.88.4.2  nathanw 			return (1);		/* will return later */
   1594  1.88.4.2  nathanw 		}
   1595  1.88.4.2  nathanw 		/*FALLTHROUGH*/
   1596  1.88.4.2  nathanw 	case SEEKCOMPLETE:
   1597  1.88.4.2  nathanw 		disk_unbusy(&fd->sc_dk, 0);	/* no data on seek */
   1598  1.88.4.2  nathanw 
   1599  1.88.4.2  nathanw 		/* Make sure seek really happened. */
   1600  1.88.4.2  nathanw 		if (fdc->sc_nstat != 2 || (st0 & 0xf8) != 0x20 ||
   1601  1.88.4.2  nathanw 		    cyl != bp->b_cylinder * fd->sc_type->step) {
   1602  1.88.4.2  nathanw #ifdef FD_DEBUG
   1603  1.88.4.2  nathanw 			if (fdc_debug)
   1604  1.88.4.2  nathanw 				fdcstatus(fdc, "seek failed");
   1605  1.88.4.2  nathanw #endif
   1606  1.88.4.2  nathanw 			fdcretry(fdc);
   1607  1.88.4.2  nathanw 			goto loop;
   1608  1.88.4.2  nathanw 		}
   1609  1.88.4.2  nathanw 		fd->sc_cylin = bp->b_cylinder;
   1610  1.88.4.2  nathanw 		goto doio;
   1611  1.88.4.2  nathanw 
   1612  1.88.4.2  nathanw 	case IOTIMEDOUT:
   1613  1.88.4.2  nathanw 		/*
   1614  1.88.4.2  nathanw 		 * Try to abort the I/O operation without resetting
   1615  1.88.4.2  nathanw 		 * the chip first.  Poke TC and arrange to pick up
   1616  1.88.4.2  nathanw 		 * the timed out I/O command's status.
   1617  1.88.4.2  nathanw 		 */
   1618  1.88.4.2  nathanw 		fdc->sc_itask = FDC_ITASK_RESULT;
   1619  1.88.4.2  nathanw 		fdc->sc_state = IOCLEANUPWAIT;
   1620  1.88.4.2  nathanw 		fdc->sc_nstat = 0;
   1621  1.88.4.2  nathanw 		/* 1/10 second should be enough */
   1622  1.88.4.2  nathanw 		callout_reset(&fdc->sc_timo_ch, hz / 10, fdctimeout, fdc);
   1623  1.88.4.2  nathanw 		FTC_FLIP;
   1624  1.88.4.2  nathanw 		return (1);
   1625  1.88.4.2  nathanw 
   1626  1.88.4.2  nathanw 	case IOCLEANUPTIMEDOUT:
   1627  1.88.4.2  nathanw 	case SEEKTIMEDOUT:
   1628  1.88.4.2  nathanw 	case RECALTIMEDOUT:
   1629  1.88.4.2  nathanw 	case RESETTIMEDOUT:
   1630  1.88.4.2  nathanw 		fdcstatus(fdc, "timeout");
   1631  1.88.4.2  nathanw 
   1632  1.88.4.2  nathanw 		/* All other timeouts always roll through to a chip reset */
   1633  1.88.4.2  nathanw 		fdcretry(fdc);
   1634  1.88.4.2  nathanw 
   1635  1.88.4.2  nathanw 		/* Force reset, no matter what fdcretry() says */
   1636  1.88.4.2  nathanw 		fdc->sc_state = DORESET;
   1637  1.88.4.2  nathanw 		goto loop;
   1638  1.88.4.2  nathanw 
   1639  1.88.4.2  nathanw 	case IOCLEANUPWAIT: /* IO FAILED, cleanup succeeded */
   1640  1.88.4.2  nathanw 		callout_stop(&fdc->sc_timo_ch);
   1641  1.88.4.2  nathanw 		disk_unbusy(&fd->sc_dk, (bp->b_bcount - bp->b_resid));
   1642  1.88.4.2  nathanw 		fdcretry(fdc);
   1643  1.88.4.2  nathanw 		goto loop;
   1644  1.88.4.2  nathanw 
   1645  1.88.4.2  nathanw 	case IOCOMPLETE: /* IO DONE, post-analyze */
   1646  1.88.4.2  nathanw 		callout_stop(&fdc->sc_timo_ch);
   1647  1.88.4.2  nathanw 
   1648  1.88.4.2  nathanw 		disk_unbusy(&fd->sc_dk, (bp->b_bcount - bp->b_resid));
   1649  1.88.4.2  nathanw 
   1650  1.88.4.2  nathanw 		if (fdc->sc_nstat != 7 || st1 != 0 ||
   1651  1.88.4.2  nathanw 		    ((st0 & 0xf8) != 0 &&
   1652  1.88.4.2  nathanw 		     ((st0 & 0xf8) != 0x20 || (fdc->sc_cfg & CFG_EIS) == 0))) {
   1653  1.88.4.2  nathanw #ifdef FD_DEBUG
   1654  1.88.4.2  nathanw 			if (fdc_debug) {
   1655  1.88.4.2  nathanw 				fdcstatus(fdc,
   1656  1.88.4.2  nathanw 					bp->b_flags & B_READ
   1657  1.88.4.2  nathanw 					? "read failed" : "write failed");
   1658  1.88.4.2  nathanw 				printf("blkno %d nblks %d nstat %d tc %d\n",
   1659  1.88.4.2  nathanw 				       fd->sc_blkno, fd->sc_nblks,
   1660  1.88.4.2  nathanw 				       fdc->sc_nstat, fdc->sc_tc);
   1661  1.88.4.2  nathanw 			}
   1662  1.88.4.2  nathanw #endif
   1663  1.88.4.2  nathanw 			if (fdc->sc_nstat == 7 &&
   1664  1.88.4.2  nathanw 			    (st1 & ST1_OVERRUN) == ST1_OVERRUN) {
   1665  1.88.4.2  nathanw 
   1666  1.88.4.2  nathanw 				/*
   1667  1.88.4.2  nathanw 				 * Silently retry overruns if no other
   1668  1.88.4.2  nathanw 				 * error bit is set. Adjust threshold.
   1669  1.88.4.2  nathanw 				 */
   1670  1.88.4.2  nathanw 				int thr = fdc->sc_cfg & CFG_THRHLD_MASK;
   1671  1.88.4.2  nathanw 				if (thr < 15) {
   1672  1.88.4.2  nathanw 					thr++;
   1673  1.88.4.2  nathanw 					fdc->sc_cfg &= ~CFG_THRHLD_MASK;
   1674  1.88.4.2  nathanw 					fdc->sc_cfg |= (thr & CFG_THRHLD_MASK);
   1675  1.88.4.2  nathanw #ifdef FD_DEBUG
   1676  1.88.4.2  nathanw 					if (fdc_debug)
   1677  1.88.4.2  nathanw 						printf("fdc: %d -> threshold\n", thr);
   1678  1.88.4.2  nathanw #endif
   1679  1.88.4.2  nathanw 					fdconf(fdc);
   1680  1.88.4.2  nathanw 					fdc->sc_overruns = 0;
   1681  1.88.4.2  nathanw 				}
   1682  1.88.4.2  nathanw 				if (++fdc->sc_overruns < 3) {
   1683  1.88.4.2  nathanw 					fdc->sc_state = DOIO;
   1684  1.88.4.2  nathanw 					goto loop;
   1685  1.88.4.2  nathanw 				}
   1686  1.88.4.2  nathanw 			}
   1687  1.88.4.2  nathanw 			fdcretry(fdc);
   1688  1.88.4.2  nathanw 			goto loop;
   1689  1.88.4.2  nathanw 		}
   1690  1.88.4.2  nathanw 		if (fdc->sc_errors) {
   1691  1.88.4.2  nathanw 			diskerr(bp, "fd", "soft error", LOG_PRINTF,
   1692  1.88.4.2  nathanw 			    fd->sc_skip / FD_BSIZE(fd),
   1693  1.88.4.2  nathanw 			    (struct disklabel *)NULL);
   1694  1.88.4.2  nathanw 			printf("\n");
   1695  1.88.4.2  nathanw 			fdc->sc_errors = 0;
   1696  1.88.4.2  nathanw 		} else {
   1697  1.88.4.2  nathanw 			if (--fdc->sc_overruns < -20) {
   1698  1.88.4.2  nathanw 				int thr = fdc->sc_cfg & CFG_THRHLD_MASK;
   1699  1.88.4.2  nathanw 				if (thr > 0) {
   1700  1.88.4.2  nathanw 					thr--;
   1701  1.88.4.2  nathanw 					fdc->sc_cfg &= ~CFG_THRHLD_MASK;
   1702  1.88.4.2  nathanw 					fdc->sc_cfg |= (thr & CFG_THRHLD_MASK);
   1703  1.88.4.2  nathanw #ifdef FD_DEBUG
   1704  1.88.4.2  nathanw 					if (fdc_debug)
   1705  1.88.4.2  nathanw 						printf("fdc: %d -> threshold\n", thr);
   1706  1.88.4.2  nathanw #endif
   1707  1.88.4.2  nathanw 					fdconf(fdc);
   1708  1.88.4.2  nathanw 				}
   1709  1.88.4.2  nathanw 				fdc->sc_overruns = 0;
   1710  1.88.4.2  nathanw 			}
   1711  1.88.4.2  nathanw 		}
   1712  1.88.4.2  nathanw 		fd->sc_blkno += fd->sc_nblks;
   1713  1.88.4.2  nathanw 		fd->sc_skip += fd->sc_nbytes;
   1714  1.88.4.2  nathanw 		fd->sc_bcount -= fd->sc_nbytes;
   1715  1.88.4.2  nathanw 		if (finfo == NULL && fd->sc_bcount > 0) {
   1716  1.88.4.2  nathanw 			bp->b_cylinder = fd->sc_blkno / fd->sc_type->seccyl;
   1717  1.88.4.2  nathanw 			goto doseek;
   1718  1.88.4.2  nathanw 		}
   1719  1.88.4.2  nathanw 		fdfinish(fd, bp);
   1720  1.88.4.2  nathanw 		goto loop;
   1721  1.88.4.2  nathanw 
   1722  1.88.4.2  nathanw 	case DORESET:
   1723  1.88.4.2  nathanw 		/* try a reset, keep motor on */
   1724  1.88.4.2  nathanw 		fd_set_motor(fdc);
   1725  1.88.4.2  nathanw 		delay(100);
   1726  1.88.4.2  nathanw 		fdc->sc_nstat = 0;
   1727  1.88.4.2  nathanw 		fdc->sc_itask = FDC_ITASK_SENSEI;
   1728  1.88.4.2  nathanw 		fdc->sc_state = RESETCOMPLETE;
   1729  1.88.4.2  nathanw 		callout_reset(&fdc->sc_timo_ch, hz / 2, fdctimeout, fdc);
   1730  1.88.4.2  nathanw 		fdc_reset(fdc);
   1731  1.88.4.2  nathanw 		return (1);			/* will return later */
   1732  1.88.4.2  nathanw 
   1733  1.88.4.2  nathanw 	case RESETCOMPLETE:
   1734  1.88.4.2  nathanw 		callout_stop(&fdc->sc_timo_ch);
   1735  1.88.4.2  nathanw 		fdconf(fdc);
   1736  1.88.4.2  nathanw 
   1737  1.88.4.2  nathanw 		/* FALLTHROUGH */
   1738  1.88.4.2  nathanw 	case DORECAL:
   1739  1.88.4.2  nathanw 		fdc->sc_state = RECALWAIT;
   1740  1.88.4.2  nathanw 		fdc->sc_itask = FDC_ITASK_SENSEI;
   1741  1.88.4.2  nathanw 		fdc->sc_nstat = 0;
   1742  1.88.4.2  nathanw 		callout_reset(&fdc->sc_timo_ch, 5 * hz, fdctimeout, fdc);
   1743  1.88.4.2  nathanw 		/* recalibrate function */
   1744  1.88.4.2  nathanw 		FDC_WRFIFO(fdc, NE7CMD_RECAL);
   1745  1.88.4.2  nathanw 		FDC_WRFIFO(fdc, fd->sc_drive);
   1746  1.88.4.2  nathanw 		return (1);			/* will return later */
   1747  1.88.4.2  nathanw 
   1748  1.88.4.2  nathanw 	case RECALWAIT:
   1749  1.88.4.2  nathanw 		callout_stop(&fdc->sc_timo_ch);
   1750  1.88.4.2  nathanw 		fdc->sc_state = RECALCOMPLETE;
   1751  1.88.4.2  nathanw 		if (fdc->sc_flags & FDC_NEEDHEADSETTLE) {
   1752  1.88.4.2  nathanw 			/* allow 1/30 second for heads to settle */
   1753  1.88.4.2  nathanw 			callout_reset(&fdc->sc_intr_ch, hz / 30,
   1754  1.88.4.2  nathanw 			    fdcpseudointr, fdc);
   1755  1.88.4.2  nathanw 			return (1);		/* will return later */
   1756  1.88.4.2  nathanw 		}
   1757  1.88.4.2  nathanw 
   1758  1.88.4.2  nathanw 	case RECALCOMPLETE:
   1759  1.88.4.2  nathanw 		if (fdc->sc_nstat != 2 || (st0 & 0xf8) != 0x20 || cyl != 0) {
   1760  1.88.4.2  nathanw #ifdef FD_DEBUG
   1761  1.88.4.2  nathanw 			if (fdc_debug)
   1762  1.88.4.2  nathanw 				fdcstatus(fdc, "recalibrate failed");
   1763  1.88.4.2  nathanw #endif
   1764  1.88.4.2  nathanw 			fdcretry(fdc);
   1765  1.88.4.2  nathanw 			goto loop;
   1766  1.88.4.2  nathanw 		}
   1767  1.88.4.2  nathanw 		fd->sc_cylin = 0;
   1768  1.88.4.2  nathanw 		goto doseek;
   1769  1.88.4.2  nathanw 
   1770  1.88.4.2  nathanw 	case MOTORWAIT:
   1771  1.88.4.2  nathanw 		if (fd->sc_flags & FD_MOTOR_WAIT)
   1772  1.88.4.2  nathanw 			return (1);		/* time's not up yet */
   1773  1.88.4.2  nathanw 		goto doseek;
   1774  1.88.4.2  nathanw 
   1775  1.88.4.2  nathanw 	default:
   1776  1.88.4.2  nathanw 		fdcstatus(fdc, "stray interrupt");
   1777  1.88.4.2  nathanw 		return (1);
   1778  1.88.4.2  nathanw 	}
   1779  1.88.4.2  nathanw #ifdef DIAGNOSTIC
   1780  1.88.4.2  nathanw 	panic("fdcintr: impossible");
   1781  1.88.4.2  nathanw #endif
   1782  1.88.4.2  nathanw 
   1783  1.88.4.2  nathanw xxx:
   1784  1.88.4.2  nathanw 	/*
   1785  1.88.4.2  nathanw 	 * We get here if the chip locks up in FDC_WRFIFO()
   1786  1.88.4.2  nathanw 	 * Cancel any operation and schedule a reset
   1787  1.88.4.2  nathanw 	 */
   1788  1.88.4.2  nathanw 	callout_stop(&fdc->sc_timo_ch);
   1789  1.88.4.2  nathanw 	fdcretry(fdc);
   1790  1.88.4.2  nathanw 	(fdc)->sc_state = DORESET;
   1791  1.88.4.2  nathanw 	goto loop;
   1792  1.88.4.2  nathanw 
   1793  1.88.4.2  nathanw #undef	st0
   1794  1.88.4.2  nathanw #undef	st1
   1795  1.88.4.2  nathanw #undef	cyl
   1796  1.88.4.2  nathanw }
   1797  1.88.4.2  nathanw 
   1798  1.88.4.2  nathanw void
   1799  1.88.4.2  nathanw fdcretry(fdc)
   1800  1.88.4.2  nathanw 	struct fdc_softc *fdc;
   1801  1.88.4.2  nathanw {
   1802  1.88.4.2  nathanw 	struct fd_softc *fd;
   1803  1.88.4.2  nathanw 	struct buf *bp;
   1804  1.88.4.2  nathanw 	int error = EIO;
   1805  1.88.4.2  nathanw 
   1806  1.88.4.2  nathanw 	fd = fdc->sc_drives.tqh_first;
   1807  1.88.4.2  nathanw 	bp = BUFQ_FIRST(&fd->sc_q);
   1808  1.88.4.2  nathanw 
   1809  1.88.4.2  nathanw 	fdc->sc_overruns = 0;
   1810  1.88.4.2  nathanw 	if (fd->sc_opts & FDOPT_NORETRY)
   1811  1.88.4.2  nathanw 		goto fail;
   1812  1.88.4.2  nathanw 
   1813  1.88.4.2  nathanw 	switch (fdc->sc_errors) {
   1814  1.88.4.2  nathanw 	case 0:
   1815  1.88.4.2  nathanw 		if (fdc->sc_nstat == 7 &&
   1816  1.88.4.2  nathanw 		    (fdc->sc_status[0] & 0xd8) == 0x40 &&
   1817  1.88.4.2  nathanw 		    (fdc->sc_status[1] & 0x2) == 0x2) {
   1818  1.88.4.2  nathanw 			printf("%s: read-only medium\n", fd->sc_dv.dv_xname);
   1819  1.88.4.2  nathanw 			error = EROFS;
   1820  1.88.4.2  nathanw 			goto failsilent;
   1821  1.88.4.2  nathanw 		}
   1822  1.88.4.2  nathanw 		/* try again */
   1823  1.88.4.2  nathanw 		fdc->sc_state =
   1824  1.88.4.2  nathanw 			(fdc->sc_flags & FDC_EIS) ? DOIO : DOSEEK;
   1825  1.88.4.2  nathanw 		break;
   1826  1.88.4.2  nathanw 
   1827  1.88.4.2  nathanw 	case 1: case 2: case 3:
   1828  1.88.4.2  nathanw 		/* didn't work; try recalibrating */
   1829  1.88.4.2  nathanw 		fdc->sc_state = DORECAL;
   1830  1.88.4.2  nathanw 		break;
   1831  1.88.4.2  nathanw 
   1832  1.88.4.2  nathanw 	case 4:
   1833  1.88.4.2  nathanw 		if (fdc->sc_nstat == 7 &&
   1834  1.88.4.2  nathanw 		    fdc->sc_status[0] == 0 &&
   1835  1.88.4.2  nathanw 		    fdc->sc_status[1] == 0 &&
   1836  1.88.4.2  nathanw 		    fdc->sc_status[2] == 0) {
   1837  1.88.4.2  nathanw 			/*
   1838  1.88.4.2  nathanw 			 * We've retried a few times and we've got
   1839  1.88.4.2  nathanw 			 * valid status and all three status bytes
   1840  1.88.4.2  nathanw 			 * are zero.  Assume this condition is the
   1841  1.88.4.2  nathanw 			 * result of no disk loaded into the drive.
   1842  1.88.4.2  nathanw 			 */
   1843  1.88.4.2  nathanw 			printf("%s: no medium?\n", fd->sc_dv.dv_xname);
   1844  1.88.4.2  nathanw 			error = ENODEV;
   1845  1.88.4.2  nathanw 			goto failsilent;
   1846  1.88.4.2  nathanw 		}
   1847  1.88.4.2  nathanw 
   1848  1.88.4.2  nathanw 		/* still no go; reset the bastard */
   1849  1.88.4.2  nathanw 		fdc->sc_state = DORESET;
   1850  1.88.4.2  nathanw 		break;
   1851  1.88.4.2  nathanw 
   1852  1.88.4.2  nathanw 	default:
   1853  1.88.4.2  nathanw 	fail:
   1854  1.88.4.2  nathanw 		if ((fd->sc_opts & FDOPT_SILENT) == 0) {
   1855  1.88.4.2  nathanw 			diskerr(bp, "fd", "hard error", LOG_PRINTF,
   1856  1.88.4.2  nathanw 				fd->sc_skip / FD_BSIZE(fd),
   1857  1.88.4.2  nathanw 				(struct disklabel *)NULL);
   1858  1.88.4.2  nathanw 			printf("\n");
   1859  1.88.4.2  nathanw 			fdcstatus(fdc, "controller status");
   1860  1.88.4.2  nathanw 		}
   1861  1.88.4.2  nathanw 
   1862  1.88.4.2  nathanw 	failsilent:
   1863  1.88.4.2  nathanw 		bp->b_flags |= B_ERROR;
   1864  1.88.4.2  nathanw 		bp->b_error = error;
   1865  1.88.4.2  nathanw 		fdfinish(fd, bp);
   1866  1.88.4.2  nathanw 	}
   1867  1.88.4.2  nathanw 	fdc->sc_errors++;
   1868  1.88.4.2  nathanw }
   1869  1.88.4.2  nathanw 
   1870  1.88.4.2  nathanw int
   1871  1.88.4.2  nathanw fdsize(dev)
   1872  1.88.4.2  nathanw 	dev_t dev;
   1873  1.88.4.2  nathanw {
   1874  1.88.4.2  nathanw 
   1875  1.88.4.2  nathanw 	/* Swapping to floppies would not make sense. */
   1876  1.88.4.2  nathanw 	return (-1);
   1877  1.88.4.2  nathanw }
   1878  1.88.4.2  nathanw 
   1879  1.88.4.2  nathanw int
   1880  1.88.4.2  nathanw fddump(dev, blkno, va, size)
   1881  1.88.4.2  nathanw 	dev_t dev;
   1882  1.88.4.2  nathanw 	daddr_t blkno;
   1883  1.88.4.2  nathanw 	caddr_t va;
   1884  1.88.4.2  nathanw 	size_t size;
   1885  1.88.4.2  nathanw {
   1886  1.88.4.2  nathanw 
   1887  1.88.4.2  nathanw 	/* Not implemented. */
   1888  1.88.4.2  nathanw 	return (EINVAL);
   1889  1.88.4.2  nathanw }
   1890  1.88.4.2  nathanw 
   1891  1.88.4.2  nathanw int
   1892  1.88.4.2  nathanw fdioctl(dev, cmd, addr, flag, p)
   1893  1.88.4.2  nathanw 	dev_t dev;
   1894  1.88.4.2  nathanw 	u_long cmd;
   1895  1.88.4.2  nathanw 	caddr_t addr;
   1896  1.88.4.2  nathanw 	int flag;
   1897  1.88.4.2  nathanw 	struct proc *p;
   1898  1.88.4.2  nathanw {
   1899  1.88.4.2  nathanw 	struct fd_softc *fd;
   1900  1.88.4.2  nathanw 	struct fdc_softc *fdc;
   1901  1.88.4.2  nathanw 	struct fdformat_parms *form_parms;
   1902  1.88.4.2  nathanw 	struct fdformat_cmd *form_cmd;
   1903  1.88.4.2  nathanw 	struct ne7_fd_formb *fd_formb;
   1904  1.88.4.2  nathanw 	int il[FD_MAX_NSEC + 1];
   1905  1.88.4.2  nathanw 	int unit;
   1906  1.88.4.2  nathanw 	int i, j;
   1907  1.88.4.2  nathanw 	int error;
   1908  1.88.4.2  nathanw 
   1909  1.88.4.2  nathanw 	unit = FDUNIT(dev);
   1910  1.88.4.2  nathanw 	if (unit >= fd_cd.cd_ndevs)
   1911  1.88.4.2  nathanw 		return (ENXIO);
   1912  1.88.4.2  nathanw 
   1913  1.88.4.2  nathanw 	fd = fd_cd.cd_devs[FDUNIT(dev)];
   1914  1.88.4.2  nathanw 	fdc = (struct fdc_softc *)fd->sc_dv.dv_parent;
   1915  1.88.4.2  nathanw 
   1916  1.88.4.2  nathanw 	switch (cmd) {
   1917  1.88.4.2  nathanw 	case DIOCGDINFO:
   1918  1.88.4.2  nathanw 		*(struct disklabel *)addr = *(fd->sc_dk.dk_label);
   1919  1.88.4.2  nathanw 		return 0;
   1920  1.88.4.2  nathanw 
   1921  1.88.4.2  nathanw 	case DIOCWLABEL:
   1922  1.88.4.2  nathanw 		if ((flag & FWRITE) == 0)
   1923  1.88.4.2  nathanw 			return EBADF;
   1924  1.88.4.2  nathanw 		/* XXX do something */
   1925  1.88.4.2  nathanw 		return (0);
   1926  1.88.4.2  nathanw 
   1927  1.88.4.2  nathanw 	case DIOCWDINFO:
   1928  1.88.4.2  nathanw 		if ((flag & FWRITE) == 0)
   1929  1.88.4.2  nathanw 			return (EBADF);
   1930  1.88.4.2  nathanw 
   1931  1.88.4.2  nathanw 		error = setdisklabel(fd->sc_dk.dk_label,
   1932  1.88.4.2  nathanw 				    (struct disklabel *)addr, 0,
   1933  1.88.4.2  nathanw 				    fd->sc_dk.dk_cpulabel);
   1934  1.88.4.2  nathanw 		if (error)
   1935  1.88.4.2  nathanw 			return (error);
   1936  1.88.4.2  nathanw 
   1937  1.88.4.2  nathanw 		error = writedisklabel(dev, fdstrategy,
   1938  1.88.4.2  nathanw 				       fd->sc_dk.dk_label,
   1939  1.88.4.2  nathanw 				       fd->sc_dk.dk_cpulabel);
   1940  1.88.4.2  nathanw 		return (error);
   1941  1.88.4.2  nathanw 
   1942  1.88.4.2  nathanw 	case DIOCLOCK:
   1943  1.88.4.2  nathanw 		/*
   1944  1.88.4.2  nathanw 		 * Nothing to do here, really.
   1945  1.88.4.2  nathanw 		 */
   1946  1.88.4.2  nathanw 		return (0);
   1947  1.88.4.2  nathanw 
   1948  1.88.4.2  nathanw 	case DIOCEJECT:
   1949  1.88.4.2  nathanw 		if (*(int *)addr == 0) {
   1950  1.88.4.2  nathanw 			int part = DISKPART(dev);
   1951  1.88.4.2  nathanw 			/*
   1952  1.88.4.2  nathanw 			 * Don't force eject: check that we are the only
   1953  1.88.4.2  nathanw 			 * partition open. If so, unlock it.
   1954  1.88.4.2  nathanw 			 */
   1955  1.88.4.2  nathanw 			if ((fd->sc_dk.dk_openmask & ~(1 << part)) != 0 ||
   1956  1.88.4.2  nathanw 			    fd->sc_dk.dk_bopenmask + fd->sc_dk.dk_copenmask !=
   1957  1.88.4.2  nathanw 			    fd->sc_dk.dk_openmask) {
   1958  1.88.4.2  nathanw 				return (EBUSY);
   1959  1.88.4.2  nathanw 			}
   1960  1.88.4.2  nathanw 		}
   1961  1.88.4.2  nathanw 		/* FALLTHROUGH */
   1962  1.88.4.2  nathanw 	case ODIOCEJECT:
   1963  1.88.4.2  nathanw 		fd_do_eject(fd);
   1964  1.88.4.2  nathanw 		return (0);
   1965  1.88.4.2  nathanw 
   1966  1.88.4.2  nathanw 	case FDIOCGETFORMAT:
   1967  1.88.4.2  nathanw 		form_parms = (struct fdformat_parms *)addr;
   1968  1.88.4.2  nathanw 		form_parms->fdformat_version = FDFORMAT_VERSION;
   1969  1.88.4.2  nathanw 		form_parms->nbps = 128 * (1 << fd->sc_type->secsize);
   1970  1.88.4.2  nathanw 		form_parms->ncyl = fd->sc_type->cylinders;
   1971  1.88.4.2  nathanw 		form_parms->nspt = fd->sc_type->sectrac;
   1972  1.88.4.2  nathanw 		form_parms->ntrk = fd->sc_type->heads;
   1973  1.88.4.2  nathanw 		form_parms->stepspercyl = fd->sc_type->step;
   1974  1.88.4.2  nathanw 		form_parms->gaplen = fd->sc_type->gap2;
   1975  1.88.4.2  nathanw 		form_parms->fillbyte = fd->sc_type->fillbyte;
   1976  1.88.4.2  nathanw 		form_parms->interleave = fd->sc_type->interleave;
   1977  1.88.4.2  nathanw 		switch (fd->sc_type->rate) {
   1978  1.88.4.2  nathanw 		case FDC_500KBPS:
   1979  1.88.4.2  nathanw 			form_parms->xfer_rate = 500 * 1024;
   1980  1.88.4.2  nathanw 			break;
   1981  1.88.4.2  nathanw 		case FDC_300KBPS:
   1982  1.88.4.2  nathanw 			form_parms->xfer_rate = 300 * 1024;
   1983  1.88.4.2  nathanw 			break;
   1984  1.88.4.2  nathanw 		case FDC_250KBPS:
   1985  1.88.4.2  nathanw 			form_parms->xfer_rate = 250 * 1024;
   1986  1.88.4.2  nathanw 			break;
   1987  1.88.4.2  nathanw 		default:
   1988  1.88.4.2  nathanw 			return (EINVAL);
   1989  1.88.4.2  nathanw 		}
   1990  1.88.4.2  nathanw 		return (0);
   1991  1.88.4.2  nathanw 
   1992  1.88.4.2  nathanw 	case FDIOCSETFORMAT:
   1993  1.88.4.2  nathanw 		if ((flag & FWRITE) == 0)
   1994  1.88.4.2  nathanw 			return (EBADF);	/* must be opened for writing */
   1995  1.88.4.2  nathanw 
   1996  1.88.4.2  nathanw 		form_parms = (struct fdformat_parms *)addr;
   1997  1.88.4.2  nathanw 		if (form_parms->fdformat_version != FDFORMAT_VERSION)
   1998  1.88.4.2  nathanw 			return (EINVAL);/* wrong version of formatting prog */
   1999  1.88.4.2  nathanw 
   2000  1.88.4.2  nathanw 		i = form_parms->nbps >> 7;
   2001  1.88.4.2  nathanw 		if ((form_parms->nbps & 0x7f) || ffs(i) == 0 ||
   2002  1.88.4.2  nathanw 		    i & ~(1 << (ffs(i)-1)))
   2003  1.88.4.2  nathanw 			/* not a power-of-two multiple of 128 */
   2004  1.88.4.2  nathanw 			return (EINVAL);
   2005  1.88.4.2  nathanw 
   2006  1.88.4.2  nathanw 		switch (form_parms->xfer_rate) {
   2007  1.88.4.2  nathanw 		case 500 * 1024:
   2008  1.88.4.2  nathanw 			fd->sc_type->rate = FDC_500KBPS;
   2009  1.88.4.2  nathanw 			break;
   2010  1.88.4.2  nathanw 		case 300 * 1024:
   2011  1.88.4.2  nathanw 			fd->sc_type->rate = FDC_300KBPS;
   2012  1.88.4.2  nathanw 			break;
   2013  1.88.4.2  nathanw 		case 250 * 1024:
   2014  1.88.4.2  nathanw 			fd->sc_type->rate = FDC_250KBPS;
   2015  1.88.4.2  nathanw 			break;
   2016  1.88.4.2  nathanw 		default:
   2017  1.88.4.2  nathanw 			return (EINVAL);
   2018  1.88.4.2  nathanw 		}
   2019  1.88.4.2  nathanw 
   2020  1.88.4.2  nathanw 		if (form_parms->nspt > FD_MAX_NSEC ||
   2021  1.88.4.2  nathanw 		    form_parms->fillbyte > 0xff ||
   2022  1.88.4.2  nathanw 		    form_parms->interleave > 0xff)
   2023  1.88.4.2  nathanw 			return EINVAL;
   2024  1.88.4.2  nathanw 		fd->sc_type->sectrac = form_parms->nspt;
   2025  1.88.4.2  nathanw 		if (form_parms->ntrk != 2 && form_parms->ntrk != 1)
   2026  1.88.4.2  nathanw 			return EINVAL;
   2027  1.88.4.2  nathanw 		fd->sc_type->heads = form_parms->ntrk;
   2028  1.88.4.2  nathanw 		fd->sc_type->seccyl = form_parms->nspt * form_parms->ntrk;
   2029  1.88.4.2  nathanw 		fd->sc_type->secsize = ffs(i)-1;
   2030  1.88.4.2  nathanw 		fd->sc_type->gap2 = form_parms->gaplen;
   2031  1.88.4.2  nathanw 		fd->sc_type->cylinders = form_parms->ncyl;
   2032  1.88.4.2  nathanw 		fd->sc_type->size = fd->sc_type->seccyl * form_parms->ncyl *
   2033  1.88.4.2  nathanw 			form_parms->nbps / DEV_BSIZE;
   2034  1.88.4.2  nathanw 		fd->sc_type->step = form_parms->stepspercyl;
   2035  1.88.4.2  nathanw 		fd->sc_type->fillbyte = form_parms->fillbyte;
   2036  1.88.4.2  nathanw 		fd->sc_type->interleave = form_parms->interleave;
   2037  1.88.4.2  nathanw 		return (0);
   2038  1.88.4.2  nathanw 
   2039  1.88.4.2  nathanw 	case FDIOCFORMAT_TRACK:
   2040  1.88.4.2  nathanw 		if((flag & FWRITE) == 0)
   2041  1.88.4.2  nathanw 			/* must be opened for writing */
   2042  1.88.4.2  nathanw 			return (EBADF);
   2043  1.88.4.2  nathanw 		form_cmd = (struct fdformat_cmd *)addr;
   2044  1.88.4.2  nathanw 		if (form_cmd->formatcmd_version != FDFORMAT_VERSION)
   2045  1.88.4.2  nathanw 			/* wrong version of formatting prog */
   2046  1.88.4.2  nathanw 			return (EINVAL);
   2047  1.88.4.2  nathanw 
   2048  1.88.4.2  nathanw 		if (form_cmd->head >= fd->sc_type->heads ||
   2049  1.88.4.2  nathanw 		    form_cmd->cylinder >= fd->sc_type->cylinders) {
   2050  1.88.4.2  nathanw 			return (EINVAL);
   2051  1.88.4.2  nathanw 		}
   2052  1.88.4.2  nathanw 
   2053  1.88.4.2  nathanw 		fd_formb = malloc(sizeof(struct ne7_fd_formb),
   2054  1.88.4.2  nathanw 		    M_TEMP, M_NOWAIT);
   2055  1.88.4.2  nathanw 		if (fd_formb == 0)
   2056  1.88.4.2  nathanw 			return (ENOMEM);
   2057  1.88.4.2  nathanw 
   2058  1.88.4.2  nathanw 		fd_formb->head = form_cmd->head;
   2059  1.88.4.2  nathanw 		fd_formb->cyl = form_cmd->cylinder;
   2060  1.88.4.2  nathanw 		fd_formb->transfer_rate = fd->sc_type->rate;
   2061  1.88.4.2  nathanw 		fd_formb->fd_formb_secshift = fd->sc_type->secsize;
   2062  1.88.4.2  nathanw 		fd_formb->fd_formb_nsecs = fd->sc_type->sectrac;
   2063  1.88.4.2  nathanw 		fd_formb->fd_formb_gaplen = fd->sc_type->gap2;
   2064  1.88.4.2  nathanw 		fd_formb->fd_formb_fillbyte = fd->sc_type->fillbyte;
   2065  1.88.4.2  nathanw 
   2066  1.88.4.2  nathanw 		bzero(il, sizeof il);
   2067  1.88.4.2  nathanw 		for (j = 0, i = 1; i <= fd_formb->fd_formb_nsecs; i++) {
   2068  1.88.4.2  nathanw 			while (il[(j%fd_formb->fd_formb_nsecs) + 1])
   2069  1.88.4.2  nathanw 				j++;
   2070  1.88.4.2  nathanw 			il[(j%fd_formb->fd_formb_nsecs) + 1] = i;
   2071  1.88.4.2  nathanw 			j += fd->sc_type->interleave;
   2072  1.88.4.2  nathanw 		}
   2073  1.88.4.2  nathanw 		for (i = 0; i < fd_formb->fd_formb_nsecs; i++) {
   2074  1.88.4.2  nathanw 			fd_formb->fd_formb_cylno(i) = form_cmd->cylinder;
   2075  1.88.4.2  nathanw 			fd_formb->fd_formb_headno(i) = form_cmd->head;
   2076  1.88.4.2  nathanw 			fd_formb->fd_formb_secno(i) = il[i+1];
   2077  1.88.4.2  nathanw 			fd_formb->fd_formb_secsize(i) = fd->sc_type->secsize;
   2078  1.88.4.2  nathanw 		}
   2079  1.88.4.2  nathanw 
   2080  1.88.4.2  nathanw 		error = fdformat(dev, fd_formb, p);
   2081  1.88.4.2  nathanw 		free(fd_formb, M_TEMP);
   2082  1.88.4.2  nathanw 		return error;
   2083  1.88.4.2  nathanw 
   2084  1.88.4.2  nathanw 	case FDIOCGETOPTS:		/* get drive options */
   2085  1.88.4.2  nathanw 		*(int *)addr = fd->sc_opts;
   2086  1.88.4.2  nathanw 		return (0);
   2087  1.88.4.2  nathanw 
   2088  1.88.4.2  nathanw 	case FDIOCSETOPTS:		/* set drive options */
   2089  1.88.4.2  nathanw 		fd->sc_opts = *(int *)addr;
   2090  1.88.4.2  nathanw 		return (0);
   2091  1.88.4.2  nathanw 
   2092  1.88.4.2  nathanw #ifdef FD_DEBUG
   2093  1.88.4.2  nathanw 	case _IO('f', 100):
   2094  1.88.4.2  nathanw 		fdc_wrfifo(fdc, NE7CMD_DUMPREG);
   2095  1.88.4.2  nathanw 		fdcresult(fdc);
   2096  1.88.4.2  nathanw 		printf("fdc: dumpreg(%d regs): <", fdc->sc_nstat);
   2097  1.88.4.2  nathanw 		for (i = 0; i < fdc->sc_nstat; i++)
   2098  1.88.4.2  nathanw 			printf(" 0x%x", fdc->sc_status[i]);
   2099  1.88.4.2  nathanw 		printf(">\n");
   2100  1.88.4.2  nathanw 		return (0);
   2101  1.88.4.2  nathanw 
   2102  1.88.4.2  nathanw 	case _IOW('f', 101, int):
   2103  1.88.4.2  nathanw 		fdc->sc_cfg &= ~CFG_THRHLD_MASK;
   2104  1.88.4.2  nathanw 		fdc->sc_cfg |= (*(int *)addr & CFG_THRHLD_MASK);
   2105  1.88.4.2  nathanw 		fdconf(fdc);
   2106  1.88.4.2  nathanw 		return (0);
   2107  1.88.4.2  nathanw 
   2108  1.88.4.2  nathanw 	case _IO('f', 102):
   2109  1.88.4.2  nathanw 		fdc_wrfifo(fdc, NE7CMD_SENSEI);
   2110  1.88.4.2  nathanw 		fdcresult(fdc);
   2111  1.88.4.2  nathanw 		printf("fdc: sensei(%d regs): <", fdc->sc_nstat);
   2112  1.88.4.2  nathanw 		for (i=0; i< fdc->sc_nstat; i++)
   2113  1.88.4.2  nathanw 			printf(" 0x%x", fdc->sc_status[i]);
   2114  1.88.4.2  nathanw 		printf(">\n");
   2115  1.88.4.2  nathanw 		return (0);
   2116  1.88.4.2  nathanw #endif
   2117  1.88.4.2  nathanw 	default:
   2118  1.88.4.2  nathanw 		return (ENOTTY);
   2119  1.88.4.2  nathanw 	}
   2120  1.88.4.2  nathanw 
   2121  1.88.4.2  nathanw #ifdef DIAGNOSTIC
   2122  1.88.4.2  nathanw 	panic("fdioctl: impossible");
   2123  1.88.4.2  nathanw #endif
   2124  1.88.4.2  nathanw }
   2125  1.88.4.2  nathanw 
   2126  1.88.4.2  nathanw int
   2127  1.88.4.2  nathanw fdformat(dev, finfo, p)
   2128  1.88.4.2  nathanw 	dev_t dev;
   2129  1.88.4.2  nathanw 	struct ne7_fd_formb *finfo;
   2130  1.88.4.2  nathanw 	struct proc *p;
   2131  1.88.4.2  nathanw {
   2132  1.88.4.2  nathanw 	int rv = 0, s;
   2133  1.88.4.2  nathanw 	struct fd_softc *fd = fd_cd.cd_devs[FDUNIT(dev)];
   2134  1.88.4.2  nathanw 	struct fd_type *type = fd->sc_type;
   2135  1.88.4.2  nathanw 	struct buf *bp;
   2136  1.88.4.2  nathanw 
   2137  1.88.4.2  nathanw 	/* set up a buffer header for fdstrategy() */
   2138  1.88.4.2  nathanw 	bp = (struct buf *)malloc(sizeof(struct buf), M_TEMP, M_NOWAIT);
   2139  1.88.4.2  nathanw 	if (bp == 0)
   2140  1.88.4.2  nathanw 		return (ENOBUFS);
   2141  1.88.4.2  nathanw 
   2142  1.88.4.2  nathanw 	memset((void *)bp, 0, sizeof(struct buf));
   2143  1.88.4.2  nathanw 	bp->b_flags = B_BUSY | B_PHYS | B_FORMAT;
   2144  1.88.4.2  nathanw 	bp->b_proc = p;
   2145  1.88.4.2  nathanw 	bp->b_dev = dev;
   2146  1.88.4.2  nathanw 
   2147  1.88.4.2  nathanw 	/*
   2148  1.88.4.2  nathanw 	 * Calculate a fake blkno, so fdstrategy() would initiate a
   2149  1.88.4.2  nathanw 	 * seek to the requested cylinder.
   2150  1.88.4.2  nathanw 	 */
   2151  1.88.4.2  nathanw 	bp->b_blkno = ((finfo->cyl * (type->sectrac * type->heads)
   2152  1.88.4.2  nathanw 		       + finfo->head * type->sectrac) * FD_BSIZE(fd))
   2153  1.88.4.2  nathanw 		      / DEV_BSIZE;
   2154  1.88.4.2  nathanw 
   2155  1.88.4.2  nathanw 	bp->b_bcount = sizeof(struct fd_idfield_data) * finfo->fd_formb_nsecs;
   2156  1.88.4.2  nathanw 	bp->b_data = (caddr_t)finfo;
   2157  1.88.4.2  nathanw 
   2158  1.88.4.2  nathanw #ifdef FD_DEBUG
   2159  1.88.4.2  nathanw 	if (fdc_debug) {
   2160  1.88.4.2  nathanw 		int i;
   2161  1.88.4.2  nathanw 
   2162  1.88.4.2  nathanw 		printf("fdformat: blkno 0x%x count %ld\n",
   2163  1.88.4.2  nathanw 			bp->b_blkno, bp->b_bcount);
   2164  1.88.4.2  nathanw 
   2165  1.88.4.2  nathanw 		printf("\tcyl:\t%d\n", finfo->cyl);
   2166  1.88.4.2  nathanw 		printf("\thead:\t%d\n", finfo->head);
   2167  1.88.4.2  nathanw 		printf("\tnsecs:\t%d\n", finfo->fd_formb_nsecs);
   2168  1.88.4.2  nathanw 		printf("\tsshft:\t%d\n", finfo->fd_formb_secshift);
   2169  1.88.4.2  nathanw 		printf("\tgaplen:\t%d\n", finfo->fd_formb_gaplen);
   2170  1.88.4.2  nathanw 		printf("\ttrack data:");
   2171  1.88.4.2  nathanw 		for (i = 0; i < finfo->fd_formb_nsecs; i++) {
   2172  1.88.4.2  nathanw 			printf(" [c%d h%d s%d]",
   2173  1.88.4.2  nathanw 					finfo->fd_formb_cylno(i),
   2174  1.88.4.2  nathanw 					finfo->fd_formb_headno(i),
   2175  1.88.4.2  nathanw 					finfo->fd_formb_secno(i) );
   2176  1.88.4.2  nathanw 			if (finfo->fd_formb_secsize(i) != 2)
   2177  1.88.4.2  nathanw 				printf("<sz:%d>", finfo->fd_formb_secsize(i));
   2178  1.88.4.2  nathanw 		}
   2179  1.88.4.2  nathanw 		printf("\n");
   2180  1.88.4.2  nathanw 	}
   2181  1.88.4.2  nathanw #endif
   2182  1.88.4.2  nathanw 
   2183  1.88.4.2  nathanw 	/* now do the format */
   2184  1.88.4.2  nathanw 	fdstrategy(bp);
   2185  1.88.4.2  nathanw 
   2186  1.88.4.2  nathanw 	/* ...and wait for it to complete */
   2187  1.88.4.2  nathanw 	s = splbio();
   2188  1.88.4.2  nathanw 	while (!(bp->b_flags & B_DONE)) {
   2189  1.88.4.2  nathanw 		rv = tsleep((caddr_t)bp, PRIBIO, "fdform", 20 * hz);
   2190  1.88.4.2  nathanw 		if (rv == EWOULDBLOCK)
   2191  1.88.4.2  nathanw 			break;
   2192  1.88.4.2  nathanw 	}
   2193  1.88.4.2  nathanw 	splx(s);
   2194  1.88.4.2  nathanw 
   2195  1.88.4.2  nathanw 	if (rv == EWOULDBLOCK) {
   2196  1.88.4.2  nathanw 		/* timed out */
   2197  1.88.4.2  nathanw 		rv = EIO;
   2198  1.88.4.2  nathanw 		biodone(bp);
   2199  1.88.4.2  nathanw 	}
   2200  1.88.4.2  nathanw 	if (bp->b_flags & B_ERROR) {
   2201  1.88.4.2  nathanw 		rv = bp->b_error;
   2202  1.88.4.2  nathanw 	}
   2203  1.88.4.2  nathanw 	free(bp, M_TEMP);
   2204  1.88.4.2  nathanw 	return (rv);
   2205  1.88.4.2  nathanw }
   2206  1.88.4.2  nathanw 
   2207  1.88.4.2  nathanw void
   2208  1.88.4.2  nathanw fdgetdisklabel(dev)
   2209  1.88.4.2  nathanw 	dev_t dev;
   2210  1.88.4.2  nathanw {
   2211  1.88.4.2  nathanw 	int unit = FDUNIT(dev), i;
   2212  1.88.4.2  nathanw 	struct fd_softc *fd = fd_cd.cd_devs[unit];
   2213  1.88.4.2  nathanw 	struct disklabel *lp = fd->sc_dk.dk_label;
   2214  1.88.4.2  nathanw 	struct cpu_disklabel *clp = fd->sc_dk.dk_cpulabel;
   2215  1.88.4.2  nathanw 
   2216  1.88.4.2  nathanw 	bzero(lp, sizeof(struct disklabel));
   2217  1.88.4.2  nathanw 	bzero(lp, sizeof(struct cpu_disklabel));
   2218  1.88.4.2  nathanw 
   2219  1.88.4.2  nathanw 	lp->d_type = DTYPE_FLOPPY;
   2220  1.88.4.2  nathanw 	lp->d_secsize = FD_BSIZE(fd);
   2221  1.88.4.2  nathanw 	lp->d_secpercyl = fd->sc_type->seccyl;
   2222  1.88.4.2  nathanw 	lp->d_nsectors = fd->sc_type->sectrac;
   2223  1.88.4.2  nathanw 	lp->d_ncylinders = fd->sc_type->cylinders;
   2224  1.88.4.2  nathanw 	lp->d_ntracks = fd->sc_type->heads;	/* Go figure... */
   2225  1.88.4.2  nathanw 	lp->d_secperunit = lp->d_secpercyl * lp->d_ncylinders;
   2226  1.88.4.2  nathanw 	lp->d_rpm = 3600;	/* XXX like it matters... */
   2227  1.88.4.2  nathanw 
   2228  1.88.4.2  nathanw 	strncpy(lp->d_typename, "floppy", sizeof(lp->d_typename));
   2229  1.88.4.2  nathanw 	strncpy(lp->d_packname, "fictitious", sizeof(lp->d_packname));
   2230  1.88.4.2  nathanw 	lp->d_interleave = 1;
   2231  1.88.4.2  nathanw 
   2232  1.88.4.2  nathanw 	lp->d_partitions[RAW_PART].p_offset = 0;
   2233  1.88.4.2  nathanw 	lp->d_partitions[RAW_PART].p_size = lp->d_secpercyl * lp->d_ncylinders;
   2234  1.88.4.2  nathanw 	lp->d_partitions[RAW_PART].p_fstype = FS_UNUSED;
   2235  1.88.4.2  nathanw 	lp->d_npartitions = RAW_PART + 1;
   2236  1.88.4.2  nathanw 
   2237  1.88.4.2  nathanw 	lp->d_magic = DISKMAGIC;
   2238  1.88.4.2  nathanw 	lp->d_magic2 = DISKMAGIC;
   2239  1.88.4.2  nathanw 	lp->d_checksum = dkcksum(lp);
   2240  1.88.4.2  nathanw 
   2241  1.88.4.2  nathanw 	/*
   2242  1.88.4.2  nathanw 	 * Call the generic disklabel extraction routine.  If there's
   2243  1.88.4.2  nathanw 	 * not a label there, fake it.
   2244  1.88.4.2  nathanw 	 */
   2245  1.88.4.2  nathanw 	if (readdisklabel(dev, fdstrategy, lp, clp) != NULL) {
   2246  1.88.4.2  nathanw 		strncpy(lp->d_packname, "default label",
   2247  1.88.4.2  nathanw 		    sizeof(lp->d_packname));
   2248  1.88.4.2  nathanw 		/*
   2249  1.88.4.2  nathanw 		 * Reset the partition info; it might have gotten
   2250  1.88.4.2  nathanw 		 * trashed in readdisklabel().
   2251  1.88.4.2  nathanw 		 *
   2252  1.88.4.2  nathanw 		 * XXX Why do we have to do this?  readdisklabel()
   2253  1.88.4.2  nathanw 		 * should be safe...
   2254  1.88.4.2  nathanw 		 */
   2255  1.88.4.2  nathanw 		for (i = 0; i < MAXPARTITIONS; ++i) {
   2256  1.88.4.2  nathanw 			lp->d_partitions[i].p_offset = 0;
   2257  1.88.4.2  nathanw 			if (i == RAW_PART) {
   2258  1.88.4.2  nathanw 				lp->d_partitions[i].p_size =
   2259  1.88.4.2  nathanw 				    lp->d_secpercyl * lp->d_ncylinders;
   2260  1.88.4.2  nathanw 				lp->d_partitions[i].p_fstype = FS_BSDFFS;
   2261  1.88.4.2  nathanw 			} else {
   2262  1.88.4.2  nathanw 				lp->d_partitions[i].p_size = 0;
   2263  1.88.4.2  nathanw 				lp->d_partitions[i].p_fstype = FS_UNUSED;
   2264  1.88.4.2  nathanw 			}
   2265  1.88.4.2  nathanw 		}
   2266  1.88.4.2  nathanw 		lp->d_npartitions = RAW_PART + 1;
   2267  1.88.4.2  nathanw 	}
   2268  1.88.4.2  nathanw }
   2269  1.88.4.2  nathanw 
   2270  1.88.4.2  nathanw void
   2271  1.88.4.2  nathanw fd_do_eject(fd)
   2272  1.88.4.2  nathanw 	struct fd_softc *fd;
   2273  1.88.4.2  nathanw {
   2274  1.88.4.2  nathanw 	struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
   2275  1.88.4.2  nathanw 
   2276  1.88.4.2  nathanw 	if (CPU_ISSUN4C) {
   2277  1.88.4.2  nathanw 		auxregbisc(AUXIO4C_FDS, AUXIO4C_FEJ);
   2278  1.88.4.2  nathanw 		delay(10);
   2279  1.88.4.2  nathanw 		auxregbisc(AUXIO4C_FEJ, AUXIO4C_FDS);
   2280  1.88.4.2  nathanw 		return;
   2281  1.88.4.2  nathanw 	}
   2282  1.88.4.2  nathanw 	if (CPU_ISSUN4M && (fdc->sc_flags & FDC_82077) != 0) {
   2283  1.88.4.2  nathanw 		bus_space_tag_t t = fdc->sc_bustag;
   2284  1.88.4.2  nathanw 		bus_space_handle_t h = fdc->sc_handle;
   2285  1.88.4.2  nathanw 		u_int8_t dor = FDO_FRST | FDO_FDMAEN | FDO_MOEN(0);
   2286  1.88.4.2  nathanw 
   2287  1.88.4.2  nathanw 		bus_space_write_1(t, h, fdc->sc_reg_dor, dor | FDO_EJ);
   2288  1.88.4.2  nathanw 		delay(10);
   2289  1.88.4.2  nathanw 		bus_space_write_1(t, h, fdc->sc_reg_dor, FDO_FRST | FDO_DS);
   2290  1.88.4.2  nathanw 		return;
   2291  1.88.4.2  nathanw 	}
   2292  1.88.4.2  nathanw }
   2293  1.88.4.2  nathanw 
   2294  1.88.4.2  nathanw #ifdef MEMORY_DISK_HOOKS
   2295  1.88.4.2  nathanw int	fd_read_md_image __P((size_t *, caddr_t *));
   2296  1.88.4.2  nathanw #endif
   2297  1.88.4.2  nathanw 
   2298  1.88.4.2  nathanw /* ARGSUSED */
   2299  1.88.4.2  nathanw void
   2300  1.88.4.2  nathanw fd_mountroot_hook(dev)
   2301  1.88.4.2  nathanw 	struct device *dev;
   2302  1.88.4.2  nathanw {
   2303  1.88.4.2  nathanw 	int c;
   2304  1.88.4.2  nathanw 
   2305  1.88.4.2  nathanw 	fd_do_eject((struct fd_softc *)dev);
   2306  1.88.4.2  nathanw 	printf("Insert filesystem floppy and press return.");
   2307  1.88.4.2  nathanw 	for (;;) {
   2308  1.88.4.2  nathanw 		c = cngetc();
   2309  1.88.4.2  nathanw 		if ((c == '\r') || (c == '\n')) {
   2310  1.88.4.2  nathanw 			printf("\n");
   2311  1.88.4.2  nathanw 			break;
   2312  1.88.4.2  nathanw 		}
   2313  1.88.4.2  nathanw 	}
   2314  1.88.4.2  nathanw }
   2315  1.88.4.2  nathanw 
   2316  1.88.4.2  nathanw #ifdef MEMORY_DISK_HOOKS
   2317  1.88.4.2  nathanw 
   2318  1.88.4.2  nathanw #define FDMICROROOTSIZE ((2*18*80) << DEV_BSHIFT)
   2319  1.88.4.2  nathanw 
   2320  1.88.4.2  nathanw int
   2321  1.88.4.2  nathanw fd_read_md_image(sizep, addrp)
   2322  1.88.4.2  nathanw 	size_t	*sizep;
   2323  1.88.4.2  nathanw 	caddr_t	*addrp;
   2324  1.88.4.2  nathanw {
   2325  1.88.4.2  nathanw 	struct buf buf, *bp = &buf;
   2326  1.88.4.2  nathanw 	dev_t dev;
   2327  1.88.4.2  nathanw 	off_t offset;
   2328  1.88.4.2  nathanw 	caddr_t addr;
   2329  1.88.4.2  nathanw 
   2330  1.88.4.2  nathanw 	dev = makedev(54,0);	/* XXX */
   2331  1.88.4.2  nathanw 
   2332  1.88.4.2  nathanw 	MALLOC(addr, caddr_t, FDMICROROOTSIZE, M_DEVBUF, M_WAITOK);
   2333  1.88.4.2  nathanw 	*addrp = addr;
   2334  1.88.4.2  nathanw 
   2335  1.88.4.2  nathanw 	if (fdopen(dev, 0, S_IFCHR, NULL))
   2336  1.88.4.2  nathanw 		panic("fd: mountroot: fdopen");
   2337  1.88.4.2  nathanw 
   2338  1.88.4.2  nathanw 	offset = 0;
   2339  1.88.4.2  nathanw 
   2340  1.88.4.2  nathanw 	for (;;) {
   2341  1.88.4.2  nathanw 		bp->b_dev = dev;
   2342  1.88.4.2  nathanw 		bp->b_error = 0;
   2343  1.88.4.2  nathanw 		bp->b_resid = 0;
   2344  1.88.4.2  nathanw 		bp->b_proc = NULL;
   2345  1.88.4.2  nathanw 		bp->b_flags = B_BUSY | B_PHYS | B_RAW | B_READ;
   2346  1.88.4.2  nathanw 		bp->b_blkno = btodb(offset);
   2347  1.88.4.2  nathanw 		bp->b_bcount = DEV_BSIZE;
   2348  1.88.4.2  nathanw 		bp->b_data = addr;
   2349  1.88.4.2  nathanw 		fdstrategy(bp);
   2350  1.88.4.2  nathanw 		while ((bp->b_flags & B_DONE) == 0) {
   2351  1.88.4.2  nathanw 			tsleep((caddr_t)bp, PRIBIO + 1, "physio", 0);
   2352  1.88.4.2  nathanw 		}
   2353  1.88.4.2  nathanw 		if (bp->b_error)
   2354  1.88.4.2  nathanw 			panic("fd: mountroot: fdread error %d", bp->b_error);
   2355  1.88.4.2  nathanw 
   2356  1.88.4.2  nathanw 		if (bp->b_resid != 0)
   2357  1.88.4.2  nathanw 			break;
   2358  1.88.4.2  nathanw 
   2359  1.88.4.2  nathanw 		addr += DEV_BSIZE;
   2360  1.88.4.2  nathanw 		offset += DEV_BSIZE;
   2361  1.88.4.2  nathanw 		if (offset + DEV_BSIZE > FDMICROROOTSIZE)
   2362  1.88.4.2  nathanw 			break;
   2363  1.88.4.2  nathanw 	}
   2364  1.88.4.2  nathanw 	(void)fdclose(dev, 0, S_IFCHR, NULL);
   2365  1.88.4.2  nathanw 	*sizep = offset;
   2366  1.88.4.2  nathanw 	fd_do_eject(fd_cd.cd_devs[FDUNIT(dev)]);
   2367  1.88.4.2  nathanw 	return (0);
   2368  1.88.4.2  nathanw }
   2369  1.88.4.2  nathanw #endif
   2370