fd.c revision 1.88.4.4 1 1.88.4.4 nathanw /* $NetBSD: fd.c,v 1.88.4.4 2002/09/17 21:17:42 nathanw Exp $ */
2 1.88.4.2 nathanw
3 1.88.4.2 nathanw /*-
4 1.88.4.2 nathanw * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.88.4.2 nathanw * All rights reserved.
6 1.88.4.2 nathanw *
7 1.88.4.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.88.4.2 nathanw * by Paul Kranenburg.
9 1.88.4.2 nathanw *
10 1.88.4.2 nathanw * Redistribution and use in source and binary forms, with or without
11 1.88.4.2 nathanw * modification, are permitted provided that the following conditions
12 1.88.4.2 nathanw * are met:
13 1.88.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
14 1.88.4.2 nathanw * notice, this list of conditions and the following disclaimer.
15 1.88.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
16 1.88.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
17 1.88.4.2 nathanw * documentation and/or other materials provided with the distribution.
18 1.88.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
19 1.88.4.2 nathanw * must display the following acknowledgement:
20 1.88.4.2 nathanw * This product includes software developed by the NetBSD
21 1.88.4.2 nathanw * Foundation, Inc. and its contributors.
22 1.88.4.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.88.4.2 nathanw * contributors may be used to endorse or promote products derived
24 1.88.4.2 nathanw * from this software without specific prior written permission.
25 1.88.4.2 nathanw *
26 1.88.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.88.4.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.88.4.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.88.4.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.88.4.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.88.4.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.88.4.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.88.4.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.88.4.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.88.4.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.88.4.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
37 1.88.4.2 nathanw */
38 1.88.4.2 nathanw
39 1.88.4.2 nathanw /*-
40 1.88.4.2 nathanw * Copyright (c) 1993, 1994, 1995 Charles M. Hannum.
41 1.88.4.2 nathanw * Copyright (c) 1995 Paul Kranenburg.
42 1.88.4.2 nathanw * Copyright (c) 1990 The Regents of the University of California.
43 1.88.4.2 nathanw * All rights reserved.
44 1.88.4.2 nathanw *
45 1.88.4.2 nathanw * This code is derived from software contributed to Berkeley by
46 1.88.4.2 nathanw * Don Ahn.
47 1.88.4.2 nathanw *
48 1.88.4.2 nathanw * Redistribution and use in source and binary forms, with or without
49 1.88.4.2 nathanw * modification, are permitted provided that the following conditions
50 1.88.4.2 nathanw * are met:
51 1.88.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
52 1.88.4.2 nathanw * notice, this list of conditions and the following disclaimer.
53 1.88.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
54 1.88.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
55 1.88.4.2 nathanw * documentation and/or other materials provided with the distribution.
56 1.88.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
57 1.88.4.2 nathanw * must display the following acknowledgement:
58 1.88.4.2 nathanw * This product includes software developed by the University of
59 1.88.4.2 nathanw * California, Berkeley and its contributors.
60 1.88.4.2 nathanw * 4. Neither the name of the University nor the names of its contributors
61 1.88.4.2 nathanw * may be used to endorse or promote products derived from this software
62 1.88.4.2 nathanw * without specific prior written permission.
63 1.88.4.2 nathanw *
64 1.88.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
65 1.88.4.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 1.88.4.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 1.88.4.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
68 1.88.4.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 1.88.4.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 1.88.4.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 1.88.4.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 1.88.4.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 1.88.4.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
74 1.88.4.2 nathanw * SUCH DAMAGE.
75 1.88.4.2 nathanw *
76 1.88.4.2 nathanw * @(#)fd.c 7.4 (Berkeley) 5/25/91
77 1.88.4.2 nathanw */
78 1.88.4.2 nathanw
79 1.88.4.2 nathanw #include "opt_ddb.h"
80 1.88.4.2 nathanw #include "opt_md.h"
81 1.88.4.2 nathanw
82 1.88.4.2 nathanw #include <sys/param.h>
83 1.88.4.2 nathanw #include <sys/systm.h>
84 1.88.4.2 nathanw #include <sys/callout.h>
85 1.88.4.2 nathanw #include <sys/kernel.h>
86 1.88.4.2 nathanw #include <sys/file.h>
87 1.88.4.2 nathanw #include <sys/ioctl.h>
88 1.88.4.2 nathanw #include <sys/device.h>
89 1.88.4.2 nathanw #include <sys/disklabel.h>
90 1.88.4.2 nathanw #include <sys/dkstat.h>
91 1.88.4.2 nathanw #include <sys/disk.h>
92 1.88.4.2 nathanw #include <sys/fdio.h>
93 1.88.4.2 nathanw #include <sys/buf.h>
94 1.88.4.2 nathanw #include <sys/malloc.h>
95 1.88.4.2 nathanw #include <sys/proc.h>
96 1.88.4.2 nathanw #include <sys/uio.h>
97 1.88.4.2 nathanw #include <sys/stat.h>
98 1.88.4.2 nathanw #include <sys/syslog.h>
99 1.88.4.2 nathanw #include <sys/queue.h>
100 1.88.4.2 nathanw #include <sys/conf.h>
101 1.88.4.2 nathanw
102 1.88.4.2 nathanw #include <dev/cons.h>
103 1.88.4.2 nathanw
104 1.88.4.2 nathanw #include <uvm/uvm_extern.h>
105 1.88.4.2 nathanw
106 1.88.4.2 nathanw #include <machine/autoconf.h>
107 1.88.4.2 nathanw #include <machine/intr.h>
108 1.88.4.2 nathanw
109 1.88.4.2 nathanw #include <sparc/sparc/auxreg.h>
110 1.88.4.2 nathanw #include <sparc/dev/fdreg.h>
111 1.88.4.2 nathanw #include <sparc/dev/fdvar.h>
112 1.88.4.2 nathanw
113 1.88.4.2 nathanw #define FDUNIT(dev) (minor(dev) / 8)
114 1.88.4.2 nathanw #define FDTYPE(dev) (minor(dev) % 8)
115 1.88.4.2 nathanw
116 1.88.4.2 nathanw /* XXX misuse a flag to identify format operation */
117 1.88.4.2 nathanw #define B_FORMAT B_XXX
118 1.88.4.2 nathanw
119 1.88.4.2 nathanw #define FD_DEBUG
120 1.88.4.2 nathanw #ifdef FD_DEBUG
121 1.88.4.2 nathanw int fdc_debug = 0;
122 1.88.4.2 nathanw #endif
123 1.88.4.2 nathanw
124 1.88.4.2 nathanw enum fdc_state {
125 1.88.4.2 nathanw DEVIDLE = 0,
126 1.88.4.2 nathanw MOTORWAIT, /* 1 */
127 1.88.4.2 nathanw DOSEEK, /* 2 */
128 1.88.4.2 nathanw SEEKWAIT, /* 3 */
129 1.88.4.2 nathanw SEEKTIMEDOUT, /* 4 */
130 1.88.4.2 nathanw SEEKCOMPLETE, /* 5 */
131 1.88.4.2 nathanw DOIO, /* 6 */
132 1.88.4.2 nathanw IOCOMPLETE, /* 7 */
133 1.88.4.2 nathanw IOTIMEDOUT, /* 8 */
134 1.88.4.2 nathanw IOCLEANUPWAIT, /* 9 */
135 1.88.4.2 nathanw IOCLEANUPTIMEDOUT,/*10 */
136 1.88.4.2 nathanw DORESET, /* 11 */
137 1.88.4.2 nathanw RESETCOMPLETE, /* 12 */
138 1.88.4.2 nathanw RESETTIMEDOUT, /* 13 */
139 1.88.4.2 nathanw DORECAL, /* 14 */
140 1.88.4.2 nathanw RECALWAIT, /* 15 */
141 1.88.4.2 nathanw RECALTIMEDOUT, /* 16 */
142 1.88.4.2 nathanw RECALCOMPLETE, /* 17 */
143 1.88.4.2 nathanw };
144 1.88.4.2 nathanw
145 1.88.4.2 nathanw /* software state, per controller */
146 1.88.4.2 nathanw struct fdc_softc {
147 1.88.4.2 nathanw struct device sc_dev; /* boilerplate */
148 1.88.4.2 nathanw bus_space_tag_t sc_bustag;
149 1.88.4.2 nathanw
150 1.88.4.2 nathanw struct callout sc_timo_ch; /* timeout callout */
151 1.88.4.2 nathanw struct callout sc_intr_ch; /* pseudo-intr callout */
152 1.88.4.2 nathanw
153 1.88.4.2 nathanw struct fd_softc *sc_fd[4]; /* pointers to children */
154 1.88.4.2 nathanw TAILQ_HEAD(drivehead, fd_softc) sc_drives;
155 1.88.4.2 nathanw enum fdc_state sc_state;
156 1.88.4.2 nathanw int sc_flags;
157 1.88.4.2 nathanw #define FDC_82077 0x01
158 1.88.4.2 nathanw #define FDC_NEEDHEADSETTLE 0x02
159 1.88.4.2 nathanw #define FDC_EIS 0x04
160 1.88.4.2 nathanw #define FDC_NEEDMOTORWAIT 0x08
161 1.88.4.2 nathanw int sc_errors; /* number of retries so far */
162 1.88.4.2 nathanw int sc_overruns; /* number of DMA overruns */
163 1.88.4.2 nathanw int sc_cfg; /* current configuration */
164 1.88.4.2 nathanw struct fdcio sc_io;
165 1.88.4.2 nathanw #define sc_handle sc_io.fdcio_handle
166 1.88.4.2 nathanw #define sc_reg_msr sc_io.fdcio_reg_msr
167 1.88.4.2 nathanw #define sc_reg_fifo sc_io.fdcio_reg_fifo
168 1.88.4.2 nathanw #define sc_reg_dor sc_io.fdcio_reg_dor
169 1.88.4.2 nathanw #define sc_reg_drs sc_io.fdcio_reg_msr
170 1.88.4.2 nathanw #define sc_itask sc_io.fdcio_itask
171 1.88.4.2 nathanw #define sc_istatus sc_io.fdcio_istatus
172 1.88.4.2 nathanw #define sc_data sc_io.fdcio_data
173 1.88.4.2 nathanw #define sc_tc sc_io.fdcio_tc
174 1.88.4.2 nathanw #define sc_nstat sc_io.fdcio_nstat
175 1.88.4.2 nathanw #define sc_status sc_io.fdcio_status
176 1.88.4.2 nathanw #define sc_intrcnt sc_io.fdcio_intrcnt
177 1.88.4.2 nathanw };
178 1.88.4.2 nathanw
179 1.88.4.2 nathanw extern struct fdcio *fdciop; /* I/O descriptor used in fdintr.s */
180 1.88.4.2 nathanw
181 1.88.4.2 nathanw /* controller driver configuration */
182 1.88.4.2 nathanw int fdcmatch_mainbus __P((struct device *, struct cfdata *, void *));
183 1.88.4.2 nathanw int fdcmatch_obio __P((struct device *, struct cfdata *, void *));
184 1.88.4.2 nathanw void fdcattach_mainbus __P((struct device *, struct device *, void *));
185 1.88.4.2 nathanw void fdcattach_obio __P((struct device *, struct device *, void *));
186 1.88.4.2 nathanw
187 1.88.4.2 nathanw int fdcattach __P((struct fdc_softc *, int));
188 1.88.4.2 nathanw
189 1.88.4.2 nathanw struct cfattach fdc_mainbus_ca = {
190 1.88.4.2 nathanw sizeof(struct fdc_softc), fdcmatch_mainbus, fdcattach_mainbus
191 1.88.4.2 nathanw };
192 1.88.4.2 nathanw struct cfattach fdc_obio_ca = {
193 1.88.4.2 nathanw sizeof(struct fdc_softc), fdcmatch_obio, fdcattach_obio
194 1.88.4.2 nathanw };
195 1.88.4.2 nathanw
196 1.88.4.2 nathanw __inline struct fd_type *fd_dev_to_type __P((struct fd_softc *, dev_t));
197 1.88.4.2 nathanw
198 1.88.4.2 nathanw /*
199 1.88.4.2 nathanw * Floppies come in various flavors, e.g., 1.2MB vs 1.44MB; here is how
200 1.88.4.2 nathanw * we tell them apart.
201 1.88.4.2 nathanw */
202 1.88.4.2 nathanw struct fd_type {
203 1.88.4.2 nathanw int sectrac; /* sectors per track */
204 1.88.4.2 nathanw int heads; /* number of heads */
205 1.88.4.2 nathanw int seccyl; /* sectors per cylinder */
206 1.88.4.2 nathanw int secsize; /* size code for sectors */
207 1.88.4.2 nathanw int datalen; /* data len when secsize = 0 */
208 1.88.4.2 nathanw int steprate; /* step rate and head unload time */
209 1.88.4.2 nathanw int gap1; /* gap len between sectors */
210 1.88.4.2 nathanw int gap2; /* formatting gap */
211 1.88.4.2 nathanw int cylinders; /* total num of cylinders */
212 1.88.4.2 nathanw int size; /* size of disk in sectors */
213 1.88.4.2 nathanw int step; /* steps per cylinder */
214 1.88.4.2 nathanw int rate; /* transfer speed code */
215 1.88.4.2 nathanw int fillbyte; /* format fill byte */
216 1.88.4.2 nathanw int interleave; /* interleave factor (formatting) */
217 1.88.4.2 nathanw char *name;
218 1.88.4.2 nathanw };
219 1.88.4.2 nathanw
220 1.88.4.2 nathanw /* The order of entries in the following table is important -- BEWARE! */
221 1.88.4.2 nathanw struct fd_type fd_types[] = {
222 1.88.4.2 nathanw { 18,2,36,2,0xff,0xcf,0x1b,0x54,80,2880,1,FDC_500KBPS,0xf6,1, "1.44MB" }, /* 1.44MB diskette */
223 1.88.4.2 nathanw { 9,2,18,2,0xff,0xdf,0x2a,0x50,80,1440,1,FDC_250KBPS,0xf6,1, "720KB" }, /* 3.5" 720kB diskette */
224 1.88.4.2 nathanw { 9,2,18,2,0xff,0xdf,0x2a,0x50,40, 720,2,FDC_250KBPS,0xf6,1, "360KB/x" }, /* 360kB in 720kB drive */
225 1.88.4.2 nathanw { 8,2,16,3,0xff,0xdf,0x35,0x74,77,1232,1,FDC_500KBPS,0xf6,1, "1.2MB/NEC" } /* 1.2 MB japanese format */
226 1.88.4.2 nathanw };
227 1.88.4.2 nathanw
228 1.88.4.2 nathanw /* software state, per disk (with up to 4 disks per ctlr) */
229 1.88.4.2 nathanw struct fd_softc {
230 1.88.4.2 nathanw struct device sc_dv; /* generic device info */
231 1.88.4.2 nathanw struct disk sc_dk; /* generic disk info */
232 1.88.4.2 nathanw
233 1.88.4.2 nathanw struct fd_type *sc_deftype; /* default type descriptor */
234 1.88.4.2 nathanw struct fd_type *sc_type; /* current type descriptor */
235 1.88.4.2 nathanw
236 1.88.4.2 nathanw struct callout sc_motoron_ch;
237 1.88.4.2 nathanw struct callout sc_motoroff_ch;
238 1.88.4.2 nathanw
239 1.88.4.2 nathanw daddr_t sc_blkno; /* starting block number */
240 1.88.4.2 nathanw int sc_bcount; /* byte count left */
241 1.88.4.2 nathanw int sc_skip; /* bytes already transferred */
242 1.88.4.2 nathanw int sc_nblks; /* number of blocks currently transferring */
243 1.88.4.2 nathanw int sc_nbytes; /* number of bytes currently transferring */
244 1.88.4.2 nathanw
245 1.88.4.2 nathanw int sc_drive; /* physical unit number */
246 1.88.4.2 nathanw int sc_flags;
247 1.88.4.2 nathanw #define FD_OPEN 0x01 /* it's open */
248 1.88.4.2 nathanw #define FD_MOTOR 0x02 /* motor should be on */
249 1.88.4.2 nathanw #define FD_MOTOR_WAIT 0x04 /* motor coming up */
250 1.88.4.2 nathanw int sc_cylin; /* where we think the head is */
251 1.88.4.2 nathanw int sc_opts; /* user-set options */
252 1.88.4.2 nathanw
253 1.88.4.2 nathanw void *sc_sdhook; /* shutdownhook cookie */
254 1.88.4.2 nathanw
255 1.88.4.2 nathanw TAILQ_ENTRY(fd_softc) sc_drivechain;
256 1.88.4.2 nathanw int sc_ops; /* I/O ops since last switch */
257 1.88.4.3 nathanw struct bufq_state sc_q; /* pending I/O requests */
258 1.88.4.2 nathanw int sc_active; /* number of active I/O requests */
259 1.88.4.2 nathanw };
260 1.88.4.2 nathanw
261 1.88.4.2 nathanw /* floppy driver configuration */
262 1.88.4.2 nathanw int fdmatch __P((struct device *, struct cfdata *, void *));
263 1.88.4.2 nathanw void fdattach __P((struct device *, struct device *, void *));
264 1.88.4.2 nathanw
265 1.88.4.2 nathanw struct cfattach fd_ca = {
266 1.88.4.2 nathanw sizeof(struct fd_softc), fdmatch, fdattach
267 1.88.4.2 nathanw };
268 1.88.4.2 nathanw
269 1.88.4.2 nathanw extern struct cfdriver fd_cd;
270 1.88.4.2 nathanw
271 1.88.4.4 nathanw dev_type_open(fdopen);
272 1.88.4.4 nathanw dev_type_close(fdclose);
273 1.88.4.4 nathanw dev_type_read(fdread);
274 1.88.4.4 nathanw dev_type_write(fdwrite);
275 1.88.4.4 nathanw dev_type_ioctl(fdioctl);
276 1.88.4.4 nathanw dev_type_strategy(fdstrategy);
277 1.88.4.4 nathanw
278 1.88.4.4 nathanw const struct bdevsw fd_bdevsw = {
279 1.88.4.4 nathanw fdopen, fdclose, fdstrategy, fdioctl, nodump, nosize, D_DISK
280 1.88.4.4 nathanw };
281 1.88.4.4 nathanw
282 1.88.4.4 nathanw const struct cdevsw fd_cdevsw = {
283 1.88.4.4 nathanw fdopen, fdclose, fdread, fdwrite, fdioctl,
284 1.88.4.4 nathanw nostop, notty, nopoll, nommap, D_DISK
285 1.88.4.4 nathanw };
286 1.88.4.4 nathanw
287 1.88.4.2 nathanw void fdgetdisklabel __P((dev_t));
288 1.88.4.2 nathanw int fd_get_parms __P((struct fd_softc *));
289 1.88.4.2 nathanw void fdstart __P((struct fd_softc *));
290 1.88.4.2 nathanw int fdprint __P((void *, const char *));
291 1.88.4.2 nathanw
292 1.88.4.2 nathanw struct dkdriver fddkdriver = { fdstrategy };
293 1.88.4.2 nathanw
294 1.88.4.2 nathanw struct fd_type *fd_nvtotype __P((char *, int, int));
295 1.88.4.2 nathanw void fd_set_motor __P((struct fdc_softc *fdc));
296 1.88.4.2 nathanw void fd_motor_off __P((void *arg));
297 1.88.4.2 nathanw void fd_motor_on __P((void *arg));
298 1.88.4.2 nathanw int fdcresult __P((struct fdc_softc *fdc));
299 1.88.4.2 nathanw int fdc_wrfifo __P((struct fdc_softc *fdc, u_char x));
300 1.88.4.2 nathanw void fdcstart __P((struct fdc_softc *fdc));
301 1.88.4.2 nathanw void fdcstatus __P((struct fdc_softc *fdc, char *s));
302 1.88.4.2 nathanw void fdc_reset __P((struct fdc_softc *fdc));
303 1.88.4.2 nathanw void fdctimeout __P((void *arg));
304 1.88.4.2 nathanw void fdcpseudointr __P((void *arg));
305 1.88.4.2 nathanw int fdc_c_hwintr __P((void *));
306 1.88.4.2 nathanw void fdchwintr __P((void));
307 1.88.4.2 nathanw int fdcswintr __P((void *));
308 1.88.4.2 nathanw int fdcstate __P((struct fdc_softc *));
309 1.88.4.2 nathanw void fdcretry __P((struct fdc_softc *fdc));
310 1.88.4.2 nathanw void fdfinish __P((struct fd_softc *fd, struct buf *bp));
311 1.88.4.2 nathanw int fdformat __P((dev_t, struct ne7_fd_formb *, struct proc *));
312 1.88.4.2 nathanw void fd_do_eject __P((struct fd_softc *));
313 1.88.4.2 nathanw void fd_mountroot_hook __P((struct device *));
314 1.88.4.2 nathanw static int fdconf __P((struct fdc_softc *));
315 1.88.4.2 nathanw static void establish_chip_type __P((
316 1.88.4.2 nathanw struct fdc_softc *,
317 1.88.4.2 nathanw bus_space_tag_t,
318 1.88.4.2 nathanw bus_addr_t,
319 1.88.4.2 nathanw bus_size_t,
320 1.88.4.2 nathanw bus_space_handle_t));
321 1.88.4.2 nathanw
322 1.88.4.2 nathanw
323 1.88.4.2 nathanw #if PIL_FDSOFT == 4
324 1.88.4.2 nathanw #define IE_FDSOFT IE_L4
325 1.88.4.2 nathanw #else
326 1.88.4.2 nathanw #error 4
327 1.88.4.2 nathanw #endif
328 1.88.4.2 nathanw
329 1.88.4.2 nathanw #if defined(SUN4M)
330 1.88.4.2 nathanw #define FD_SET_SWINTR do { \
331 1.88.4.2 nathanw if (CPU_ISSUN4M) \
332 1.88.4.2 nathanw raise(0, PIL_FDSOFT); \
333 1.88.4.2 nathanw else \
334 1.88.4.2 nathanw ienab_bis(IE_L4); \
335 1.88.4.2 nathanw } while(0)
336 1.88.4.2 nathanw #else
337 1.88.4.2 nathanw #define FD_SET_SWINTR ienab_bis(IE_FDSOFT)
338 1.88.4.2 nathanw #endif /* defined(SUN4M) */
339 1.88.4.2 nathanw
340 1.88.4.2 nathanw #define OBP_FDNAME (CPU_ISSUN4M ? "SUNW,fdtwo" : "fd")
341 1.88.4.2 nathanw
342 1.88.4.2 nathanw int
343 1.88.4.2 nathanw fdcmatch_mainbus(parent, match, aux)
344 1.88.4.2 nathanw struct device *parent;
345 1.88.4.2 nathanw struct cfdata *match;
346 1.88.4.2 nathanw void *aux;
347 1.88.4.2 nathanw {
348 1.88.4.2 nathanw struct mainbus_attach_args *ma = aux;
349 1.88.4.2 nathanw
350 1.88.4.2 nathanw /*
351 1.88.4.2 nathanw * Floppy controller is on mainbus on sun4c.
352 1.88.4.2 nathanw */
353 1.88.4.2 nathanw if (!CPU_ISSUN4C)
354 1.88.4.2 nathanw return (0);
355 1.88.4.2 nathanw
356 1.88.4.2 nathanw /* sun4c PROMs call the controller "fd" */
357 1.88.4.2 nathanw if (strcmp("fd", ma->ma_name) != 0)
358 1.88.4.2 nathanw return (0);
359 1.88.4.2 nathanw
360 1.88.4.2 nathanw return (bus_space_probe(ma->ma_bustag,
361 1.88.4.2 nathanw ma->ma_paddr,
362 1.88.4.2 nathanw 1, /* probe size */
363 1.88.4.2 nathanw 0, /* offset */
364 1.88.4.2 nathanw 0, /* flags */
365 1.88.4.2 nathanw NULL, NULL));
366 1.88.4.2 nathanw }
367 1.88.4.2 nathanw
368 1.88.4.2 nathanw int
369 1.88.4.2 nathanw fdcmatch_obio(parent, match, aux)
370 1.88.4.2 nathanw struct device *parent;
371 1.88.4.2 nathanw struct cfdata *match;
372 1.88.4.2 nathanw void *aux;
373 1.88.4.2 nathanw {
374 1.88.4.2 nathanw union obio_attach_args *uoba = aux;
375 1.88.4.2 nathanw struct sbus_attach_args *sa;
376 1.88.4.2 nathanw
377 1.88.4.2 nathanw /*
378 1.88.4.2 nathanw * Floppy controller is on obio on sun4m.
379 1.88.4.2 nathanw */
380 1.88.4.2 nathanw if (uoba->uoba_isobio4 != 0)
381 1.88.4.2 nathanw return (0);
382 1.88.4.2 nathanw
383 1.88.4.2 nathanw sa = &uoba->uoba_sbus;
384 1.88.4.2 nathanw
385 1.88.4.2 nathanw /* sun4m PROMs call the controller "SUNW,fdtwo" */
386 1.88.4.2 nathanw if (strcmp("SUNW,fdtwo", sa->sa_name) != 0)
387 1.88.4.2 nathanw return (0);
388 1.88.4.2 nathanw
389 1.88.4.2 nathanw return (bus_space_probe(sa->sa_bustag,
390 1.88.4.2 nathanw sbus_bus_addr(sa->sa_bustag,
391 1.88.4.2 nathanw sa->sa_slot, sa->sa_offset),
392 1.88.4.2 nathanw 1, /* probe size */
393 1.88.4.2 nathanw 0, /* offset */
394 1.88.4.2 nathanw 0, /* flags */
395 1.88.4.2 nathanw NULL, NULL));
396 1.88.4.2 nathanw }
397 1.88.4.2 nathanw
398 1.88.4.2 nathanw static void
399 1.88.4.2 nathanw establish_chip_type(fdc, tag, addr, size, handle)
400 1.88.4.2 nathanw struct fdc_softc *fdc;
401 1.88.4.2 nathanw bus_space_tag_t tag;
402 1.88.4.2 nathanw bus_addr_t addr;
403 1.88.4.2 nathanw bus_size_t size;
404 1.88.4.2 nathanw bus_space_handle_t handle;
405 1.88.4.2 nathanw {
406 1.88.4.2 nathanw u_int8_t v;
407 1.88.4.2 nathanw
408 1.88.4.2 nathanw /*
409 1.88.4.2 nathanw * This hack from Chris Torek: apparently DOR really
410 1.88.4.2 nathanw * addresses MSR/DRS on a 82072.
411 1.88.4.2 nathanw * We used to rely on the VERSION command to tell the
412 1.88.4.2 nathanw * difference (which did not work).
413 1.88.4.2 nathanw */
414 1.88.4.2 nathanw
415 1.88.4.2 nathanw /* First, check the size of the register bank */
416 1.88.4.2 nathanw if (size < 8)
417 1.88.4.2 nathanw /* It isn't a 82077 */
418 1.88.4.2 nathanw return;
419 1.88.4.2 nathanw
420 1.88.4.2 nathanw /* Then probe the DOR register offset */
421 1.88.4.2 nathanw if (bus_space_probe(tag, addr,
422 1.88.4.2 nathanw 1, /* probe size */
423 1.88.4.2 nathanw FDREG77_DOR, /* offset */
424 1.88.4.2 nathanw 0, /* flags */
425 1.88.4.2 nathanw NULL, NULL) == 0) {
426 1.88.4.2 nathanw
427 1.88.4.2 nathanw /* It isn't a 82077 */
428 1.88.4.2 nathanw return;
429 1.88.4.2 nathanw }
430 1.88.4.2 nathanw
431 1.88.4.2 nathanw v = bus_space_read_1(tag, handle, FDREG77_DOR);
432 1.88.4.2 nathanw if (v == NE7_RQM) {
433 1.88.4.2 nathanw /*
434 1.88.4.2 nathanw * Value in DOR looks like it's really MSR
435 1.88.4.2 nathanw */
436 1.88.4.2 nathanw bus_space_write_1(tag, handle, FDREG77_DOR, FDC_250KBPS);
437 1.88.4.2 nathanw v = bus_space_read_1(tag, handle, FDREG77_DOR);
438 1.88.4.2 nathanw if (v == NE7_RQM) {
439 1.88.4.2 nathanw /*
440 1.88.4.2 nathanw * The value in the DOR didn't stick;
441 1.88.4.2 nathanw * it isn't a 82077
442 1.88.4.2 nathanw */
443 1.88.4.2 nathanw return;
444 1.88.4.2 nathanw }
445 1.88.4.2 nathanw }
446 1.88.4.2 nathanw
447 1.88.4.2 nathanw fdc->sc_flags |= FDC_82077;
448 1.88.4.2 nathanw }
449 1.88.4.2 nathanw
450 1.88.4.2 nathanw /*
451 1.88.4.2 nathanw * Arguments passed between fdcattach and fdprobe.
452 1.88.4.2 nathanw */
453 1.88.4.2 nathanw struct fdc_attach_args {
454 1.88.4.2 nathanw int fa_drive;
455 1.88.4.2 nathanw struct fd_type *fa_deftype;
456 1.88.4.2 nathanw };
457 1.88.4.2 nathanw
458 1.88.4.2 nathanw /*
459 1.88.4.2 nathanw * Print the location of a disk drive (called just before attaching the
460 1.88.4.2 nathanw * the drive). If `fdc' is not NULL, the drive was found but was not
461 1.88.4.2 nathanw * in the system config file; print the drive name as well.
462 1.88.4.2 nathanw * Return QUIET (config_find ignores this if the device was configured) to
463 1.88.4.2 nathanw * avoid printing `fdN not configured' messages.
464 1.88.4.2 nathanw */
465 1.88.4.2 nathanw int
466 1.88.4.2 nathanw fdprint(aux, fdc)
467 1.88.4.2 nathanw void *aux;
468 1.88.4.2 nathanw const char *fdc;
469 1.88.4.2 nathanw {
470 1.88.4.2 nathanw register struct fdc_attach_args *fa = aux;
471 1.88.4.2 nathanw
472 1.88.4.2 nathanw if (!fdc)
473 1.88.4.2 nathanw printf(" drive %d", fa->fa_drive);
474 1.88.4.2 nathanw return (QUIET);
475 1.88.4.2 nathanw }
476 1.88.4.2 nathanw
477 1.88.4.2 nathanw /*
478 1.88.4.2 nathanw * Configure several parameters and features on the FDC.
479 1.88.4.2 nathanw * Return 0 on success.
480 1.88.4.2 nathanw */
481 1.88.4.2 nathanw static int
482 1.88.4.2 nathanw fdconf(fdc)
483 1.88.4.2 nathanw struct fdc_softc *fdc;
484 1.88.4.2 nathanw {
485 1.88.4.2 nathanw int vroom;
486 1.88.4.2 nathanw
487 1.88.4.2 nathanw if (fdc_wrfifo(fdc, NE7CMD_DUMPREG) || fdcresult(fdc) != 10)
488 1.88.4.2 nathanw return (-1);
489 1.88.4.2 nathanw
490 1.88.4.2 nathanw /*
491 1.88.4.2 nathanw * dumpreg[7] seems to be a motor-off timeout; set it to whatever
492 1.88.4.2 nathanw * the PROM thinks is appropriate.
493 1.88.4.2 nathanw */
494 1.88.4.2 nathanw if ((vroom = fdc->sc_status[7]) == 0)
495 1.88.4.2 nathanw vroom = 0x64;
496 1.88.4.2 nathanw
497 1.88.4.2 nathanw /* Configure controller to use FIFO and Implied Seek */
498 1.88.4.2 nathanw if (fdc_wrfifo(fdc, NE7CMD_CFG) != 0)
499 1.88.4.2 nathanw return (-1);
500 1.88.4.2 nathanw if (fdc_wrfifo(fdc, vroom) != 0)
501 1.88.4.2 nathanw return (-1);
502 1.88.4.2 nathanw if (fdc_wrfifo(fdc, fdc->sc_cfg) != 0)
503 1.88.4.2 nathanw return (-1);
504 1.88.4.2 nathanw if (fdc_wrfifo(fdc, 0) != 0) /* PRETRK */
505 1.88.4.2 nathanw return (-1);
506 1.88.4.2 nathanw /* No result phase for the NE7CMD_CFG command */
507 1.88.4.2 nathanw
508 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
509 1.88.4.2 nathanw /* Lock configuration across soft resets. */
510 1.88.4.2 nathanw if (fdc_wrfifo(fdc, NE7CMD_LOCK | CFG_LOCK) != 0 ||
511 1.88.4.2 nathanw fdcresult(fdc) != 1) {
512 1.88.4.2 nathanw #ifdef DEBUG
513 1.88.4.2 nathanw printf("fdconf: CFGLOCK failed");
514 1.88.4.2 nathanw #endif
515 1.88.4.2 nathanw return (-1);
516 1.88.4.2 nathanw }
517 1.88.4.2 nathanw }
518 1.88.4.2 nathanw
519 1.88.4.2 nathanw return (0);
520 1.88.4.2 nathanw #if 0
521 1.88.4.2 nathanw if (fdc_wrfifo(fdc, NE7CMD_VERSION) == 0 &&
522 1.88.4.2 nathanw fdcresult(fdc) == 1 && fdc->sc_status[0] == 0x90) {
523 1.88.4.2 nathanw if (fdc_debug)
524 1.88.4.2 nathanw printf("[version cmd]");
525 1.88.4.2 nathanw }
526 1.88.4.2 nathanw #endif
527 1.88.4.2 nathanw }
528 1.88.4.2 nathanw
529 1.88.4.2 nathanw void
530 1.88.4.2 nathanw fdcattach_mainbus(parent, self, aux)
531 1.88.4.2 nathanw struct device *parent, *self;
532 1.88.4.2 nathanw void *aux;
533 1.88.4.2 nathanw {
534 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)self;
535 1.88.4.2 nathanw struct mainbus_attach_args *ma = aux;
536 1.88.4.2 nathanw
537 1.88.4.2 nathanw fdc->sc_bustag = ma->ma_bustag;
538 1.88.4.2 nathanw
539 1.88.4.2 nathanw if (bus_space_map(
540 1.88.4.2 nathanw ma->ma_bustag,
541 1.88.4.2 nathanw ma->ma_paddr,
542 1.88.4.2 nathanw ma->ma_size,
543 1.88.4.2 nathanw BUS_SPACE_MAP_LINEAR,
544 1.88.4.2 nathanw &fdc->sc_handle) != 0) {
545 1.88.4.2 nathanw printf("%s: cannot map registers\n", self->dv_xname);
546 1.88.4.2 nathanw return;
547 1.88.4.2 nathanw }
548 1.88.4.2 nathanw
549 1.88.4.2 nathanw establish_chip_type(fdc,
550 1.88.4.2 nathanw ma->ma_bustag,
551 1.88.4.2 nathanw ma->ma_paddr,
552 1.88.4.2 nathanw ma->ma_size,
553 1.88.4.2 nathanw fdc->sc_handle);
554 1.88.4.2 nathanw
555 1.88.4.2 nathanw if (fdcattach(fdc, ma->ma_pri) != 0)
556 1.88.4.2 nathanw bus_space_unmap(ma->ma_bustag, fdc->sc_handle, ma->ma_size);
557 1.88.4.2 nathanw }
558 1.88.4.2 nathanw
559 1.88.4.2 nathanw void
560 1.88.4.2 nathanw fdcattach_obio(parent, self, aux)
561 1.88.4.2 nathanw struct device *parent, *self;
562 1.88.4.2 nathanw void *aux;
563 1.88.4.2 nathanw {
564 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)self;
565 1.88.4.2 nathanw union obio_attach_args *uoba = aux;
566 1.88.4.2 nathanw struct sbus_attach_args *sa = &uoba->uoba_sbus;
567 1.88.4.2 nathanw
568 1.88.4.2 nathanw if (sa->sa_nintr == 0) {
569 1.88.4.2 nathanw printf(": no interrupt line configured\n");
570 1.88.4.2 nathanw return;
571 1.88.4.2 nathanw }
572 1.88.4.2 nathanw
573 1.88.4.2 nathanw fdc->sc_bustag = sa->sa_bustag;
574 1.88.4.2 nathanw
575 1.88.4.2 nathanw if (sbus_bus_map(sa->sa_bustag,
576 1.88.4.2 nathanw sa->sa_slot, sa->sa_offset, sa->sa_size,
577 1.88.4.2 nathanw BUS_SPACE_MAP_LINEAR, &fdc->sc_handle) != 0) {
578 1.88.4.2 nathanw printf("%s: cannot map control registers\n",
579 1.88.4.2 nathanw self->dv_xname);
580 1.88.4.2 nathanw return;
581 1.88.4.2 nathanw }
582 1.88.4.2 nathanw
583 1.88.4.2 nathanw establish_chip_type(fdc,
584 1.88.4.2 nathanw sa->sa_bustag,
585 1.88.4.2 nathanw sbus_bus_addr(sa->sa_bustag, sa->sa_slot, sa->sa_offset),
586 1.88.4.2 nathanw sa->sa_size,
587 1.88.4.2 nathanw fdc->sc_handle);
588 1.88.4.2 nathanw
589 1.88.4.2 nathanw if (strcmp(PROM_getpropstring(sa->sa_node, "status"), "disabled") == 0) {
590 1.88.4.2 nathanw printf(": no drives attached\n");
591 1.88.4.2 nathanw return;
592 1.88.4.2 nathanw }
593 1.88.4.2 nathanw
594 1.88.4.2 nathanw if (fdcattach(fdc, sa->sa_pri) != 0)
595 1.88.4.2 nathanw bus_space_unmap(sa->sa_bustag, fdc->sc_handle, sa->sa_size);
596 1.88.4.2 nathanw }
597 1.88.4.2 nathanw
598 1.88.4.2 nathanw int
599 1.88.4.2 nathanw fdcattach(fdc, pri)
600 1.88.4.2 nathanw struct fdc_softc *fdc;
601 1.88.4.2 nathanw int pri;
602 1.88.4.2 nathanw {
603 1.88.4.2 nathanw struct fdc_attach_args fa;
604 1.88.4.2 nathanw int drive_attached;
605 1.88.4.2 nathanw char code;
606 1.88.4.2 nathanw
607 1.88.4.2 nathanw callout_init(&fdc->sc_timo_ch);
608 1.88.4.2 nathanw callout_init(&fdc->sc_intr_ch);
609 1.88.4.2 nathanw
610 1.88.4.2 nathanw fdc->sc_state = DEVIDLE;
611 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_NONE;
612 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_NONE;
613 1.88.4.2 nathanw fdc->sc_flags |= FDC_EIS;
614 1.88.4.2 nathanw TAILQ_INIT(&fdc->sc_drives);
615 1.88.4.2 nathanw
616 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
617 1.88.4.2 nathanw fdc->sc_reg_msr = FDREG77_MSR;
618 1.88.4.2 nathanw fdc->sc_reg_fifo = FDREG77_FIFO;
619 1.88.4.2 nathanw fdc->sc_reg_dor = FDREG77_DOR;
620 1.88.4.2 nathanw code = '7';
621 1.88.4.2 nathanw fdc->sc_flags |= FDC_NEEDMOTORWAIT;
622 1.88.4.2 nathanw } else {
623 1.88.4.2 nathanw fdc->sc_reg_msr = FDREG72_MSR;
624 1.88.4.2 nathanw fdc->sc_reg_fifo = FDREG72_FIFO;
625 1.88.4.2 nathanw fdc->sc_reg_dor = 0;
626 1.88.4.2 nathanw code = '2';
627 1.88.4.2 nathanw }
628 1.88.4.2 nathanw
629 1.88.4.2 nathanw printf(" softpri %d: chip 8207%c\n", PIL_FDSOFT, code);
630 1.88.4.2 nathanw
631 1.88.4.2 nathanw /*
632 1.88.4.2 nathanw * Configure controller; enable FIFO, Implied seek, no POLL mode?.
633 1.88.4.2 nathanw * Note: CFG_EFIFO is active-low, initial threshold value: 8
634 1.88.4.2 nathanw */
635 1.88.4.2 nathanw fdc->sc_cfg = CFG_EIS|/*CFG_EFIFO|*/CFG_POLL|(8 & CFG_THRHLD_MASK);
636 1.88.4.2 nathanw if (fdconf(fdc) != 0) {
637 1.88.4.2 nathanw printf("%s: no drives attached\n", fdc->sc_dev.dv_xname);
638 1.88.4.2 nathanw return (-1);
639 1.88.4.2 nathanw }
640 1.88.4.2 nathanw
641 1.88.4.2 nathanw fdciop = &fdc->sc_io;
642 1.88.4.2 nathanw if (bus_intr_establish(fdc->sc_bustag, pri, IPL_BIO,
643 1.88.4.2 nathanw BUS_INTR_ESTABLISH_FASTTRAP,
644 1.88.4.2 nathanw (int (*) __P((void *)))fdchwintr, NULL) == NULL) {
645 1.88.4.2 nathanw
646 1.88.4.2 nathanw printf("%s: notice: no fast trap handler slot available\n",
647 1.88.4.2 nathanw fdc->sc_dev.dv_xname);
648 1.88.4.2 nathanw if (bus_intr_establish(fdc->sc_bustag, pri, IPL_BIO, 0,
649 1.88.4.2 nathanw fdc_c_hwintr, fdc) == NULL) {
650 1.88.4.2 nathanw printf("%s: cannot register interrupt handler\n",
651 1.88.4.2 nathanw fdc->sc_dev.dv_xname);
652 1.88.4.2 nathanw return (-1);
653 1.88.4.2 nathanw }
654 1.88.4.2 nathanw }
655 1.88.4.2 nathanw
656 1.88.4.2 nathanw if (bus_intr_establish(fdc->sc_bustag, PIL_FDSOFT, IPL_BIO,
657 1.88.4.2 nathanw BUS_INTR_ESTABLISH_SOFTINTR,
658 1.88.4.2 nathanw fdcswintr, fdc) == NULL) {
659 1.88.4.2 nathanw printf("%s: cannot register interrupt handler\n",
660 1.88.4.2 nathanw fdc->sc_dev.dv_xname);
661 1.88.4.2 nathanw return (-1);
662 1.88.4.2 nathanw }
663 1.88.4.2 nathanw
664 1.88.4.2 nathanw evcnt_attach_dynamic(&fdc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
665 1.88.4.2 nathanw fdc->sc_dev.dv_xname, "intr");
666 1.88.4.2 nathanw
667 1.88.4.2 nathanw /* physical limit: four drives per controller. */
668 1.88.4.2 nathanw drive_attached = 0;
669 1.88.4.2 nathanw for (fa.fa_drive = 0; fa.fa_drive < 4; fa.fa_drive++) {
670 1.88.4.2 nathanw fa.fa_deftype = NULL; /* unknown */
671 1.88.4.2 nathanw fa.fa_deftype = &fd_types[0]; /* XXX */
672 1.88.4.2 nathanw if (config_found(&fdc->sc_dev, (void *)&fa, fdprint) != NULL)
673 1.88.4.2 nathanw drive_attached = 1;
674 1.88.4.2 nathanw }
675 1.88.4.2 nathanw
676 1.88.4.2 nathanw if (drive_attached == 0) {
677 1.88.4.2 nathanw /* XXX - dis-establish interrupts here */
678 1.88.4.2 nathanw /* return (-1); */
679 1.88.4.2 nathanw }
680 1.88.4.2 nathanw
681 1.88.4.2 nathanw return (0);
682 1.88.4.2 nathanw }
683 1.88.4.2 nathanw
684 1.88.4.2 nathanw int
685 1.88.4.2 nathanw fdmatch(parent, match, aux)
686 1.88.4.2 nathanw struct device *parent;
687 1.88.4.2 nathanw struct cfdata *match;
688 1.88.4.2 nathanw void *aux;
689 1.88.4.2 nathanw {
690 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)parent;
691 1.88.4.2 nathanw bus_space_tag_t t = fdc->sc_bustag;
692 1.88.4.2 nathanw bus_space_handle_t h = fdc->sc_handle;
693 1.88.4.2 nathanw struct fdc_attach_args *fa = aux;
694 1.88.4.2 nathanw int drive = fa->fa_drive;
695 1.88.4.2 nathanw int n, ok;
696 1.88.4.2 nathanw
697 1.88.4.2 nathanw if (drive > 0)
698 1.88.4.2 nathanw /* XXX - for now, punt on more than one drive */
699 1.88.4.2 nathanw return (0);
700 1.88.4.2 nathanw
701 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
702 1.88.4.2 nathanw /* select drive and turn on motor */
703 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_dor,
704 1.88.4.2 nathanw drive | FDO_FRST | FDO_MOEN(drive));
705 1.88.4.2 nathanw /* wait for motor to spin up */
706 1.88.4.2 nathanw delay(250000);
707 1.88.4.2 nathanw } else {
708 1.88.4.2 nathanw auxregbisc(AUXIO4C_FDS, 0);
709 1.88.4.2 nathanw }
710 1.88.4.2 nathanw fdc->sc_nstat = 0;
711 1.88.4.2 nathanw fdc_wrfifo(fdc, NE7CMD_RECAL);
712 1.88.4.2 nathanw fdc_wrfifo(fdc, drive);
713 1.88.4.2 nathanw
714 1.88.4.2 nathanw /* Wait for recalibration to complete */
715 1.88.4.2 nathanw for (n = 0; n < 10000; n++) {
716 1.88.4.2 nathanw u_int8_t v;
717 1.88.4.2 nathanw
718 1.88.4.2 nathanw delay(1000);
719 1.88.4.2 nathanw v = bus_space_read_1(t, h, fdc->sc_reg_msr);
720 1.88.4.2 nathanw if ((v & (NE7_RQM|NE7_DIO|NE7_CB)) == NE7_RQM) {
721 1.88.4.2 nathanw /* wait a bit longer till device *really* is ready */
722 1.88.4.2 nathanw delay(100000);
723 1.88.4.2 nathanw if (fdc_wrfifo(fdc, NE7CMD_SENSEI))
724 1.88.4.2 nathanw break;
725 1.88.4.2 nathanw if (fdcresult(fdc) == 1 && fdc->sc_status[0] == 0x80)
726 1.88.4.2 nathanw /*
727 1.88.4.2 nathanw * Got `invalid command'; we interpret it
728 1.88.4.2 nathanw * to mean that the re-calibrate hasn't in
729 1.88.4.2 nathanw * fact finished yet
730 1.88.4.2 nathanw */
731 1.88.4.2 nathanw continue;
732 1.88.4.2 nathanw break;
733 1.88.4.2 nathanw }
734 1.88.4.2 nathanw }
735 1.88.4.2 nathanw n = fdc->sc_nstat;
736 1.88.4.2 nathanw #ifdef FD_DEBUG
737 1.88.4.2 nathanw if (fdc_debug) {
738 1.88.4.2 nathanw int i;
739 1.88.4.2 nathanw printf("fdprobe: %d stati:", n);
740 1.88.4.2 nathanw for (i = 0; i < n; i++)
741 1.88.4.2 nathanw printf(" 0x%x", fdc->sc_status[i]);
742 1.88.4.2 nathanw printf("\n");
743 1.88.4.2 nathanw }
744 1.88.4.2 nathanw #endif
745 1.88.4.2 nathanw ok = (n == 2 && (fdc->sc_status[0] & 0xf8) == 0x20) ? 1 : 0;
746 1.88.4.2 nathanw
747 1.88.4.2 nathanw /* turn off motor */
748 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
749 1.88.4.2 nathanw /* deselect drive and turn motor off */
750 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_dor, FDO_FRST | FDO_DS);
751 1.88.4.2 nathanw } else {
752 1.88.4.2 nathanw auxregbisc(0, AUXIO4C_FDS);
753 1.88.4.2 nathanw }
754 1.88.4.2 nathanw
755 1.88.4.2 nathanw return (ok);
756 1.88.4.2 nathanw }
757 1.88.4.2 nathanw
758 1.88.4.2 nathanw /*
759 1.88.4.2 nathanw * Controller is working, and drive responded. Attach it.
760 1.88.4.2 nathanw */
761 1.88.4.2 nathanw void
762 1.88.4.2 nathanw fdattach(parent, self, aux)
763 1.88.4.2 nathanw struct device *parent, *self;
764 1.88.4.2 nathanw void *aux;
765 1.88.4.2 nathanw {
766 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)parent;
767 1.88.4.2 nathanw struct fd_softc *fd = (void *)self;
768 1.88.4.2 nathanw struct fdc_attach_args *fa = aux;
769 1.88.4.2 nathanw struct fd_type *type = fa->fa_deftype;
770 1.88.4.2 nathanw int drive = fa->fa_drive;
771 1.88.4.2 nathanw
772 1.88.4.2 nathanw callout_init(&fd->sc_motoron_ch);
773 1.88.4.2 nathanw callout_init(&fd->sc_motoroff_ch);
774 1.88.4.2 nathanw
775 1.88.4.2 nathanw /* XXX Allow `flags' to override device type? */
776 1.88.4.2 nathanw
777 1.88.4.2 nathanw if (type)
778 1.88.4.2 nathanw printf(": %s %d cyl, %d head, %d sec\n", type->name,
779 1.88.4.2 nathanw type->cylinders, type->heads, type->sectrac);
780 1.88.4.2 nathanw else
781 1.88.4.2 nathanw printf(": density unknown\n");
782 1.88.4.2 nathanw
783 1.88.4.3 nathanw bufq_alloc(&fd->sc_q, BUFQ_DISKSORT|BUFQ_SORT_CYLINDER);
784 1.88.4.2 nathanw fd->sc_cylin = -1;
785 1.88.4.2 nathanw fd->sc_drive = drive;
786 1.88.4.2 nathanw fd->sc_deftype = type;
787 1.88.4.2 nathanw fdc->sc_fd[drive] = fd;
788 1.88.4.2 nathanw
789 1.88.4.2 nathanw fdc_wrfifo(fdc, NE7CMD_SPECIFY);
790 1.88.4.2 nathanw fdc_wrfifo(fdc, type->steprate);
791 1.88.4.2 nathanw /* XXX head load time == 6ms */
792 1.88.4.2 nathanw fdc_wrfifo(fdc, 6 | NE7_SPECIFY_NODMA);
793 1.88.4.2 nathanw
794 1.88.4.2 nathanw /*
795 1.88.4.2 nathanw * Initialize and attach the disk structure.
796 1.88.4.2 nathanw */
797 1.88.4.2 nathanw fd->sc_dk.dk_name = fd->sc_dv.dv_xname;
798 1.88.4.2 nathanw fd->sc_dk.dk_driver = &fddkdriver;
799 1.88.4.2 nathanw disk_attach(&fd->sc_dk);
800 1.88.4.2 nathanw
801 1.88.4.2 nathanw /*
802 1.88.4.2 nathanw * Establish a mountroot_hook anyway in case we booted
803 1.88.4.2 nathanw * with RB_ASKNAME and get selected as the boot device.
804 1.88.4.2 nathanw */
805 1.88.4.2 nathanw mountroothook_establish(fd_mountroot_hook, &fd->sc_dv);
806 1.88.4.2 nathanw
807 1.88.4.2 nathanw /* Make sure the drive motor gets turned off at shutdown time. */
808 1.88.4.2 nathanw fd->sc_sdhook = shutdownhook_establish(fd_motor_off, fd);
809 1.88.4.2 nathanw }
810 1.88.4.2 nathanw
811 1.88.4.2 nathanw __inline struct fd_type *
812 1.88.4.2 nathanw fd_dev_to_type(fd, dev)
813 1.88.4.2 nathanw struct fd_softc *fd;
814 1.88.4.2 nathanw dev_t dev;
815 1.88.4.2 nathanw {
816 1.88.4.2 nathanw int type = FDTYPE(dev);
817 1.88.4.2 nathanw
818 1.88.4.2 nathanw if (type > (sizeof(fd_types) / sizeof(fd_types[0])))
819 1.88.4.2 nathanw return (NULL);
820 1.88.4.2 nathanw return (type ? &fd_types[type - 1] : fd->sc_deftype);
821 1.88.4.2 nathanw }
822 1.88.4.2 nathanw
823 1.88.4.2 nathanw void
824 1.88.4.2 nathanw fdstrategy(bp)
825 1.88.4.2 nathanw register struct buf *bp; /* IO operation to perform */
826 1.88.4.2 nathanw {
827 1.88.4.2 nathanw struct fd_softc *fd;
828 1.88.4.2 nathanw int unit = FDUNIT(bp->b_dev);
829 1.88.4.2 nathanw int sz;
830 1.88.4.2 nathanw int s;
831 1.88.4.2 nathanw
832 1.88.4.2 nathanw /* Valid unit, controller, and request? */
833 1.88.4.2 nathanw if (unit >= fd_cd.cd_ndevs ||
834 1.88.4.2 nathanw (fd = fd_cd.cd_devs[unit]) == 0 ||
835 1.88.4.2 nathanw bp->b_blkno < 0 ||
836 1.88.4.2 nathanw (((bp->b_bcount % FD_BSIZE(fd)) != 0 ||
837 1.88.4.2 nathanw (bp->b_blkno * DEV_BSIZE) % FD_BSIZE(fd) != 0) &&
838 1.88.4.2 nathanw (bp->b_flags & B_FORMAT) == 0)) {
839 1.88.4.2 nathanw bp->b_error = EINVAL;
840 1.88.4.2 nathanw goto bad;
841 1.88.4.2 nathanw }
842 1.88.4.2 nathanw
843 1.88.4.2 nathanw /* If it's a null transfer, return immediately. */
844 1.88.4.2 nathanw if (bp->b_bcount == 0)
845 1.88.4.2 nathanw goto done;
846 1.88.4.2 nathanw
847 1.88.4.2 nathanw sz = howmany(bp->b_bcount, DEV_BSIZE);
848 1.88.4.2 nathanw
849 1.88.4.2 nathanw if (bp->b_blkno + sz > (fd->sc_type->size * DEV_BSIZE) / FD_BSIZE(fd)) {
850 1.88.4.2 nathanw sz = (fd->sc_type->size * DEV_BSIZE) / FD_BSIZE(fd)
851 1.88.4.2 nathanw - bp->b_blkno;
852 1.88.4.2 nathanw if (sz == 0) {
853 1.88.4.2 nathanw /* If exactly at end of disk, return EOF. */
854 1.88.4.2 nathanw bp->b_resid = bp->b_bcount;
855 1.88.4.2 nathanw goto done;
856 1.88.4.2 nathanw }
857 1.88.4.2 nathanw if (sz < 0) {
858 1.88.4.2 nathanw /* If past end of disk, return EINVAL. */
859 1.88.4.2 nathanw bp->b_error = EINVAL;
860 1.88.4.2 nathanw goto bad;
861 1.88.4.2 nathanw }
862 1.88.4.2 nathanw /* Otherwise, truncate request. */
863 1.88.4.2 nathanw bp->b_bcount = sz << DEV_BSHIFT;
864 1.88.4.2 nathanw }
865 1.88.4.2 nathanw
866 1.88.4.2 nathanw bp->b_rawblkno = bp->b_blkno;
867 1.88.4.2 nathanw bp->b_cylinder = (bp->b_blkno * DEV_BSIZE) /
868 1.88.4.2 nathanw (FD_BSIZE(fd) * fd->sc_type->seccyl);
869 1.88.4.2 nathanw
870 1.88.4.2 nathanw #ifdef FD_DEBUG
871 1.88.4.2 nathanw if (fdc_debug > 1)
872 1.88.4.2 nathanw printf("fdstrategy: b_blkno %d b_bcount %ld blkno %d cylin %ld\n",
873 1.88.4.2 nathanw bp->b_blkno, bp->b_bcount, fd->sc_blkno, bp->b_cylinder);
874 1.88.4.2 nathanw #endif
875 1.88.4.2 nathanw
876 1.88.4.2 nathanw /* Queue transfer on drive, activate drive and controller if idle. */
877 1.88.4.2 nathanw s = splbio();
878 1.88.4.3 nathanw BUFQ_PUT(&fd->sc_q, bp);
879 1.88.4.2 nathanw callout_stop(&fd->sc_motoroff_ch); /* a good idea */
880 1.88.4.2 nathanw if (fd->sc_active == 0)
881 1.88.4.2 nathanw fdstart(fd);
882 1.88.4.2 nathanw #ifdef DIAGNOSTIC
883 1.88.4.2 nathanw else {
884 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
885 1.88.4.2 nathanw if (fdc->sc_state == DEVIDLE) {
886 1.88.4.2 nathanw printf("fdstrategy: controller inactive\n");
887 1.88.4.2 nathanw fdcstart(fdc);
888 1.88.4.2 nathanw }
889 1.88.4.2 nathanw }
890 1.88.4.2 nathanw #endif
891 1.88.4.2 nathanw splx(s);
892 1.88.4.2 nathanw return;
893 1.88.4.2 nathanw
894 1.88.4.2 nathanw bad:
895 1.88.4.2 nathanw bp->b_flags |= B_ERROR;
896 1.88.4.2 nathanw done:
897 1.88.4.2 nathanw /* Toss transfer; we're done early. */
898 1.88.4.2 nathanw biodone(bp);
899 1.88.4.2 nathanw }
900 1.88.4.2 nathanw
901 1.88.4.2 nathanw void
902 1.88.4.2 nathanw fdstart(fd)
903 1.88.4.2 nathanw struct fd_softc *fd;
904 1.88.4.2 nathanw {
905 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
906 1.88.4.2 nathanw int active = fdc->sc_drives.tqh_first != 0;
907 1.88.4.2 nathanw
908 1.88.4.2 nathanw /* Link into controller queue. */
909 1.88.4.2 nathanw fd->sc_active = 1;
910 1.88.4.2 nathanw TAILQ_INSERT_TAIL(&fdc->sc_drives, fd, sc_drivechain);
911 1.88.4.2 nathanw
912 1.88.4.2 nathanw /* If controller not already active, start it. */
913 1.88.4.2 nathanw if (!active)
914 1.88.4.2 nathanw fdcstart(fdc);
915 1.88.4.2 nathanw }
916 1.88.4.2 nathanw
917 1.88.4.2 nathanw void
918 1.88.4.2 nathanw fdfinish(fd, bp)
919 1.88.4.2 nathanw struct fd_softc *fd;
920 1.88.4.2 nathanw struct buf *bp;
921 1.88.4.2 nathanw {
922 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
923 1.88.4.2 nathanw
924 1.88.4.2 nathanw /*
925 1.88.4.2 nathanw * Move this drive to the end of the queue to give others a `fair'
926 1.88.4.2 nathanw * chance. We only force a switch if N operations are completed while
927 1.88.4.2 nathanw * another drive is waiting to be serviced, since there is a long motor
928 1.88.4.2 nathanw * startup delay whenever we switch.
929 1.88.4.2 nathanw */
930 1.88.4.3 nathanw (void)BUFQ_GET(&fd->sc_q);
931 1.88.4.2 nathanw if (fd->sc_drivechain.tqe_next && ++fd->sc_ops >= 8) {
932 1.88.4.2 nathanw fd->sc_ops = 0;
933 1.88.4.2 nathanw TAILQ_REMOVE(&fdc->sc_drives, fd, sc_drivechain);
934 1.88.4.3 nathanw if (BUFQ_PEEK(&fd->sc_q) != NULL) {
935 1.88.4.2 nathanw TAILQ_INSERT_TAIL(&fdc->sc_drives, fd, sc_drivechain);
936 1.88.4.2 nathanw } else
937 1.88.4.2 nathanw fd->sc_active = 0;
938 1.88.4.2 nathanw }
939 1.88.4.2 nathanw bp->b_resid = fd->sc_bcount;
940 1.88.4.2 nathanw fd->sc_skip = 0;
941 1.88.4.2 nathanw
942 1.88.4.2 nathanw biodone(bp);
943 1.88.4.2 nathanw /* turn off motor 5s from now */
944 1.88.4.2 nathanw callout_reset(&fd->sc_motoroff_ch, 5 * hz, fd_motor_off, fd);
945 1.88.4.2 nathanw fdc->sc_state = DEVIDLE;
946 1.88.4.2 nathanw }
947 1.88.4.2 nathanw
948 1.88.4.2 nathanw void
949 1.88.4.2 nathanw fdc_reset(fdc)
950 1.88.4.2 nathanw struct fdc_softc *fdc;
951 1.88.4.2 nathanw {
952 1.88.4.2 nathanw bus_space_tag_t t = fdc->sc_bustag;
953 1.88.4.2 nathanw bus_space_handle_t h = fdc->sc_handle;
954 1.88.4.2 nathanw
955 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
956 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_dor,
957 1.88.4.2 nathanw FDO_FDMAEN | FDO_MOEN(0));
958 1.88.4.2 nathanw }
959 1.88.4.2 nathanw
960 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_drs, DRS_RESET);
961 1.88.4.2 nathanw delay(10);
962 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_drs, 0);
963 1.88.4.2 nathanw
964 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
965 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_dor,
966 1.88.4.2 nathanw FDO_FRST | FDO_FDMAEN | FDO_DS);
967 1.88.4.2 nathanw }
968 1.88.4.2 nathanw #ifdef FD_DEBUG
969 1.88.4.2 nathanw if (fdc_debug)
970 1.88.4.2 nathanw printf("fdc reset\n");
971 1.88.4.2 nathanw #endif
972 1.88.4.2 nathanw }
973 1.88.4.2 nathanw
974 1.88.4.2 nathanw void
975 1.88.4.2 nathanw fd_set_motor(fdc)
976 1.88.4.2 nathanw struct fdc_softc *fdc;
977 1.88.4.2 nathanw {
978 1.88.4.2 nathanw struct fd_softc *fd;
979 1.88.4.2 nathanw u_char status;
980 1.88.4.2 nathanw int n;
981 1.88.4.2 nathanw
982 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
983 1.88.4.2 nathanw status = FDO_FRST | FDO_FDMAEN;
984 1.88.4.2 nathanw if ((fd = fdc->sc_drives.tqh_first) != NULL)
985 1.88.4.2 nathanw status |= fd->sc_drive;
986 1.88.4.2 nathanw
987 1.88.4.2 nathanw for (n = 0; n < 4; n++)
988 1.88.4.2 nathanw if ((fd = fdc->sc_fd[n]) && (fd->sc_flags & FD_MOTOR))
989 1.88.4.2 nathanw status |= FDO_MOEN(n);
990 1.88.4.2 nathanw bus_space_write_1(fdc->sc_bustag, fdc->sc_handle,
991 1.88.4.2 nathanw fdc->sc_reg_dor, status);
992 1.88.4.2 nathanw } else {
993 1.88.4.2 nathanw
994 1.88.4.2 nathanw for (n = 0; n < 4; n++) {
995 1.88.4.2 nathanw if ((fd = fdc->sc_fd[n]) != NULL &&
996 1.88.4.2 nathanw (fd->sc_flags & FD_MOTOR) != 0) {
997 1.88.4.2 nathanw auxregbisc(AUXIO4C_FDS, 0);
998 1.88.4.2 nathanw return;
999 1.88.4.2 nathanw }
1000 1.88.4.2 nathanw }
1001 1.88.4.2 nathanw auxregbisc(0, AUXIO4C_FDS);
1002 1.88.4.2 nathanw }
1003 1.88.4.2 nathanw }
1004 1.88.4.2 nathanw
1005 1.88.4.2 nathanw void
1006 1.88.4.2 nathanw fd_motor_off(arg)
1007 1.88.4.2 nathanw void *arg;
1008 1.88.4.2 nathanw {
1009 1.88.4.2 nathanw struct fd_softc *fd = arg;
1010 1.88.4.2 nathanw int s;
1011 1.88.4.2 nathanw
1012 1.88.4.2 nathanw s = splbio();
1013 1.88.4.2 nathanw fd->sc_flags &= ~(FD_MOTOR | FD_MOTOR_WAIT);
1014 1.88.4.2 nathanw fd_set_motor((struct fdc_softc *)fd->sc_dv.dv_parent);
1015 1.88.4.2 nathanw splx(s);
1016 1.88.4.2 nathanw }
1017 1.88.4.2 nathanw
1018 1.88.4.2 nathanw void
1019 1.88.4.2 nathanw fd_motor_on(arg)
1020 1.88.4.2 nathanw void *arg;
1021 1.88.4.2 nathanw {
1022 1.88.4.2 nathanw struct fd_softc *fd = arg;
1023 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
1024 1.88.4.2 nathanw int s;
1025 1.88.4.2 nathanw
1026 1.88.4.2 nathanw s = splbio();
1027 1.88.4.2 nathanw fd->sc_flags &= ~FD_MOTOR_WAIT;
1028 1.88.4.2 nathanw if ((fdc->sc_drives.tqh_first == fd) && (fdc->sc_state == MOTORWAIT))
1029 1.88.4.2 nathanw (void) fdcstate(fdc);
1030 1.88.4.2 nathanw splx(s);
1031 1.88.4.2 nathanw }
1032 1.88.4.2 nathanw
1033 1.88.4.2 nathanw /*
1034 1.88.4.2 nathanw * Get status bytes off the FDC after a command has finished
1035 1.88.4.2 nathanw * Returns the number of status bytes read; -1 on error.
1036 1.88.4.2 nathanw * The return value is also stored in `sc_nstat'.
1037 1.88.4.2 nathanw */
1038 1.88.4.2 nathanw int
1039 1.88.4.2 nathanw fdcresult(fdc)
1040 1.88.4.2 nathanw struct fdc_softc *fdc;
1041 1.88.4.2 nathanw {
1042 1.88.4.2 nathanw bus_space_tag_t t = fdc->sc_bustag;
1043 1.88.4.2 nathanw bus_space_handle_t h = fdc->sc_handle;
1044 1.88.4.2 nathanw int j, n = 0;
1045 1.88.4.2 nathanw
1046 1.88.4.2 nathanw for (j = 10000; j; j--) {
1047 1.88.4.2 nathanw u_int8_t v = bus_space_read_1(t, h, fdc->sc_reg_msr);
1048 1.88.4.2 nathanw v &= (NE7_DIO | NE7_RQM | NE7_CB);
1049 1.88.4.2 nathanw if (v == NE7_RQM)
1050 1.88.4.2 nathanw return (fdc->sc_nstat = n);
1051 1.88.4.2 nathanw if (v == (NE7_DIO | NE7_RQM | NE7_CB)) {
1052 1.88.4.2 nathanw if (n >= sizeof(fdc->sc_status)) {
1053 1.88.4.2 nathanw log(LOG_ERR, "fdcresult: overrun\n");
1054 1.88.4.2 nathanw return (-1);
1055 1.88.4.2 nathanw }
1056 1.88.4.2 nathanw fdc->sc_status[n++] =
1057 1.88.4.2 nathanw bus_space_read_1(t, h, fdc->sc_reg_fifo);
1058 1.88.4.2 nathanw } else
1059 1.88.4.2 nathanw delay(1);
1060 1.88.4.2 nathanw }
1061 1.88.4.2 nathanw
1062 1.88.4.2 nathanw log(LOG_ERR, "fdcresult: timeout\n");
1063 1.88.4.2 nathanw return (fdc->sc_nstat = -1);
1064 1.88.4.2 nathanw }
1065 1.88.4.2 nathanw
1066 1.88.4.2 nathanw /*
1067 1.88.4.2 nathanw * Write a command byte to the FDC.
1068 1.88.4.2 nathanw * Returns 0 on success; -1 on failure (i.e. timeout)
1069 1.88.4.2 nathanw */
1070 1.88.4.2 nathanw int
1071 1.88.4.2 nathanw fdc_wrfifo(fdc, x)
1072 1.88.4.2 nathanw struct fdc_softc *fdc;
1073 1.88.4.2 nathanw u_int8_t x;
1074 1.88.4.2 nathanw {
1075 1.88.4.2 nathanw bus_space_tag_t t = fdc->sc_bustag;
1076 1.88.4.2 nathanw bus_space_handle_t h = fdc->sc_handle;
1077 1.88.4.2 nathanw int i;
1078 1.88.4.2 nathanw
1079 1.88.4.2 nathanw for (i = 100000; i-- > 0;) {
1080 1.88.4.2 nathanw u_int8_t v = bus_space_read_1(t, h, fdc->sc_reg_msr);
1081 1.88.4.2 nathanw if ((v & (NE7_DIO|NE7_RQM)) == NE7_RQM) {
1082 1.88.4.2 nathanw /* The chip is ready */
1083 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_fifo, x);
1084 1.88.4.2 nathanw return (0);
1085 1.88.4.2 nathanw }
1086 1.88.4.2 nathanw delay(1);
1087 1.88.4.2 nathanw }
1088 1.88.4.2 nathanw return (-1);
1089 1.88.4.2 nathanw }
1090 1.88.4.2 nathanw
1091 1.88.4.2 nathanw int
1092 1.88.4.2 nathanw fdopen(dev, flags, fmt, p)
1093 1.88.4.2 nathanw dev_t dev;
1094 1.88.4.2 nathanw int flags, fmt;
1095 1.88.4.2 nathanw struct proc *p;
1096 1.88.4.2 nathanw {
1097 1.88.4.2 nathanw int unit, pmask;
1098 1.88.4.2 nathanw struct fd_softc *fd;
1099 1.88.4.2 nathanw struct fd_type *type;
1100 1.88.4.2 nathanw
1101 1.88.4.2 nathanw unit = FDUNIT(dev);
1102 1.88.4.2 nathanw if (unit >= fd_cd.cd_ndevs)
1103 1.88.4.2 nathanw return (ENXIO);
1104 1.88.4.2 nathanw fd = fd_cd.cd_devs[unit];
1105 1.88.4.2 nathanw if (fd == NULL)
1106 1.88.4.2 nathanw return (ENXIO);
1107 1.88.4.2 nathanw type = fd_dev_to_type(fd, dev);
1108 1.88.4.2 nathanw if (type == NULL)
1109 1.88.4.2 nathanw return (ENXIO);
1110 1.88.4.2 nathanw
1111 1.88.4.2 nathanw if ((fd->sc_flags & FD_OPEN) != 0 &&
1112 1.88.4.2 nathanw fd->sc_type != type)
1113 1.88.4.2 nathanw return (EBUSY);
1114 1.88.4.2 nathanw
1115 1.88.4.2 nathanw fd->sc_type = type;
1116 1.88.4.2 nathanw fd->sc_cylin = -1;
1117 1.88.4.2 nathanw fd->sc_flags |= FD_OPEN;
1118 1.88.4.2 nathanw
1119 1.88.4.2 nathanw /*
1120 1.88.4.2 nathanw * Only update the disklabel if we're not open anywhere else.
1121 1.88.4.2 nathanw */
1122 1.88.4.2 nathanw if (fd->sc_dk.dk_openmask == 0)
1123 1.88.4.2 nathanw fdgetdisklabel(dev);
1124 1.88.4.2 nathanw
1125 1.88.4.2 nathanw pmask = (1 << DISKPART(dev));
1126 1.88.4.2 nathanw
1127 1.88.4.2 nathanw switch (fmt) {
1128 1.88.4.2 nathanw case S_IFCHR:
1129 1.88.4.2 nathanw fd->sc_dk.dk_copenmask |= pmask;
1130 1.88.4.2 nathanw break;
1131 1.88.4.2 nathanw
1132 1.88.4.2 nathanw case S_IFBLK:
1133 1.88.4.2 nathanw fd->sc_dk.dk_bopenmask |= pmask;
1134 1.88.4.2 nathanw break;
1135 1.88.4.2 nathanw }
1136 1.88.4.2 nathanw fd->sc_dk.dk_openmask =
1137 1.88.4.2 nathanw fd->sc_dk.dk_copenmask | fd->sc_dk.dk_bopenmask;
1138 1.88.4.2 nathanw
1139 1.88.4.2 nathanw return (0);
1140 1.88.4.2 nathanw }
1141 1.88.4.2 nathanw
1142 1.88.4.2 nathanw int
1143 1.88.4.2 nathanw fdclose(dev, flags, fmt, p)
1144 1.88.4.2 nathanw dev_t dev;
1145 1.88.4.2 nathanw int flags, fmt;
1146 1.88.4.2 nathanw struct proc *p;
1147 1.88.4.2 nathanw {
1148 1.88.4.2 nathanw struct fd_softc *fd = fd_cd.cd_devs[FDUNIT(dev)];
1149 1.88.4.2 nathanw int pmask = (1 << DISKPART(dev));
1150 1.88.4.2 nathanw
1151 1.88.4.2 nathanw fd->sc_flags &= ~FD_OPEN;
1152 1.88.4.2 nathanw fd->sc_opts &= ~(FDOPT_NORETRY|FDOPT_SILENT);
1153 1.88.4.2 nathanw
1154 1.88.4.2 nathanw switch (fmt) {
1155 1.88.4.2 nathanw case S_IFCHR:
1156 1.88.4.2 nathanw fd->sc_dk.dk_copenmask &= ~pmask;
1157 1.88.4.2 nathanw break;
1158 1.88.4.2 nathanw
1159 1.88.4.2 nathanw case S_IFBLK:
1160 1.88.4.2 nathanw fd->sc_dk.dk_bopenmask &= ~pmask;
1161 1.88.4.2 nathanw break;
1162 1.88.4.2 nathanw }
1163 1.88.4.2 nathanw fd->sc_dk.dk_openmask =
1164 1.88.4.2 nathanw fd->sc_dk.dk_copenmask | fd->sc_dk.dk_bopenmask;
1165 1.88.4.2 nathanw
1166 1.88.4.2 nathanw return (0);
1167 1.88.4.2 nathanw }
1168 1.88.4.2 nathanw
1169 1.88.4.2 nathanw int
1170 1.88.4.2 nathanw fdread(dev, uio, flag)
1171 1.88.4.2 nathanw dev_t dev;
1172 1.88.4.2 nathanw struct uio *uio;
1173 1.88.4.2 nathanw int flag;
1174 1.88.4.2 nathanw {
1175 1.88.4.2 nathanw
1176 1.88.4.2 nathanw return (physio(fdstrategy, NULL, dev, B_READ, minphys, uio));
1177 1.88.4.2 nathanw }
1178 1.88.4.2 nathanw
1179 1.88.4.2 nathanw int
1180 1.88.4.2 nathanw fdwrite(dev, uio, flag)
1181 1.88.4.2 nathanw dev_t dev;
1182 1.88.4.2 nathanw struct uio *uio;
1183 1.88.4.2 nathanw int flag;
1184 1.88.4.2 nathanw {
1185 1.88.4.2 nathanw
1186 1.88.4.2 nathanw return (physio(fdstrategy, NULL, dev, B_WRITE, minphys, uio));
1187 1.88.4.2 nathanw }
1188 1.88.4.2 nathanw
1189 1.88.4.2 nathanw void
1190 1.88.4.2 nathanw fdcstart(fdc)
1191 1.88.4.2 nathanw struct fdc_softc *fdc;
1192 1.88.4.2 nathanw {
1193 1.88.4.2 nathanw
1194 1.88.4.2 nathanw #ifdef DIAGNOSTIC
1195 1.88.4.2 nathanw /* only got here if controller's drive queue was inactive; should
1196 1.88.4.2 nathanw be in idle state */
1197 1.88.4.2 nathanw if (fdc->sc_state != DEVIDLE) {
1198 1.88.4.2 nathanw printf("fdcstart: not idle\n");
1199 1.88.4.2 nathanw return;
1200 1.88.4.2 nathanw }
1201 1.88.4.2 nathanw #endif
1202 1.88.4.2 nathanw (void) fdcstate(fdc);
1203 1.88.4.2 nathanw }
1204 1.88.4.2 nathanw
1205 1.88.4.2 nathanw void
1206 1.88.4.2 nathanw fdcstatus(fdc, s)
1207 1.88.4.2 nathanw struct fdc_softc *fdc;
1208 1.88.4.2 nathanw char *s;
1209 1.88.4.2 nathanw {
1210 1.88.4.2 nathanw struct fd_softc *fd = fdc->sc_drives.tqh_first;
1211 1.88.4.2 nathanw int n;
1212 1.88.4.2 nathanw char bits[64];
1213 1.88.4.2 nathanw
1214 1.88.4.2 nathanw /* Just print last status */
1215 1.88.4.2 nathanw n = fdc->sc_nstat;
1216 1.88.4.2 nathanw
1217 1.88.4.2 nathanw #if 0
1218 1.88.4.2 nathanw /*
1219 1.88.4.2 nathanw * A 82072 seems to return <invalid command> on
1220 1.88.4.2 nathanw * gratuitous Sense Interrupt commands.
1221 1.88.4.2 nathanw */
1222 1.88.4.2 nathanw if (n == 0 && (fdc->sc_flags & FDC_82077) != 0) {
1223 1.88.4.2 nathanw fdc_wrfifo(fdc, NE7CMD_SENSEI);
1224 1.88.4.2 nathanw (void) fdcresult(fdc);
1225 1.88.4.2 nathanw n = 2;
1226 1.88.4.2 nathanw }
1227 1.88.4.2 nathanw #endif
1228 1.88.4.2 nathanw
1229 1.88.4.2 nathanw printf("%s: %s: state %d",
1230 1.88.4.2 nathanw fd ? fd->sc_dv.dv_xname : "fdc", s, fdc->sc_state);
1231 1.88.4.2 nathanw
1232 1.88.4.2 nathanw switch (n) {
1233 1.88.4.2 nathanw case 0:
1234 1.88.4.2 nathanw printf("\n");
1235 1.88.4.2 nathanw break;
1236 1.88.4.2 nathanw case 2:
1237 1.88.4.2 nathanw printf(" (st0 %s cyl %d)\n",
1238 1.88.4.2 nathanw bitmask_snprintf(fdc->sc_status[0], NE7_ST0BITS,
1239 1.88.4.2 nathanw bits, sizeof(bits)), fdc->sc_status[1]);
1240 1.88.4.2 nathanw break;
1241 1.88.4.2 nathanw case 7:
1242 1.88.4.2 nathanw printf(" (st0 %s", bitmask_snprintf(fdc->sc_status[0],
1243 1.88.4.2 nathanw NE7_ST0BITS, bits, sizeof(bits)));
1244 1.88.4.2 nathanw printf(" st1 %s", bitmask_snprintf(fdc->sc_status[1],
1245 1.88.4.2 nathanw NE7_ST1BITS, bits, sizeof(bits)));
1246 1.88.4.2 nathanw printf(" st2 %s", bitmask_snprintf(fdc->sc_status[2],
1247 1.88.4.2 nathanw NE7_ST2BITS, bits, sizeof(bits)));
1248 1.88.4.2 nathanw printf(" cyl %d head %d sec %d)\n",
1249 1.88.4.2 nathanw fdc->sc_status[3], fdc->sc_status[4], fdc->sc_status[5]);
1250 1.88.4.2 nathanw break;
1251 1.88.4.2 nathanw #ifdef DIAGNOSTIC
1252 1.88.4.2 nathanw default:
1253 1.88.4.2 nathanw printf(" fdcstatus: weird size: %d\n", n);
1254 1.88.4.2 nathanw break;
1255 1.88.4.2 nathanw #endif
1256 1.88.4.2 nathanw }
1257 1.88.4.2 nathanw }
1258 1.88.4.2 nathanw
1259 1.88.4.2 nathanw void
1260 1.88.4.2 nathanw fdctimeout(arg)
1261 1.88.4.2 nathanw void *arg;
1262 1.88.4.2 nathanw {
1263 1.88.4.2 nathanw struct fdc_softc *fdc = arg;
1264 1.88.4.2 nathanw struct fd_softc *fd;
1265 1.88.4.2 nathanw int s;
1266 1.88.4.2 nathanw
1267 1.88.4.2 nathanw s = splbio();
1268 1.88.4.2 nathanw fd = fdc->sc_drives.tqh_first;
1269 1.88.4.2 nathanw if (fd == NULL) {
1270 1.88.4.2 nathanw printf("%s: timeout but no I/O pending: state %d, istatus=%d\n",
1271 1.88.4.2 nathanw fdc->sc_dev.dv_xname,
1272 1.88.4.2 nathanw fdc->sc_state, fdc->sc_istatus);
1273 1.88.4.2 nathanw fdc->sc_state = DEVIDLE;
1274 1.88.4.2 nathanw goto out;
1275 1.88.4.2 nathanw }
1276 1.88.4.2 nathanw
1277 1.88.4.3 nathanw if (BUFQ_PEEK(&fd->sc_q) != NULL)
1278 1.88.4.2 nathanw fdc->sc_state++;
1279 1.88.4.2 nathanw else
1280 1.88.4.2 nathanw fdc->sc_state = DEVIDLE;
1281 1.88.4.2 nathanw
1282 1.88.4.2 nathanw (void) fdcstate(fdc);
1283 1.88.4.2 nathanw out:
1284 1.88.4.2 nathanw splx(s);
1285 1.88.4.2 nathanw
1286 1.88.4.2 nathanw }
1287 1.88.4.2 nathanw
1288 1.88.4.2 nathanw void
1289 1.88.4.2 nathanw fdcpseudointr(arg)
1290 1.88.4.2 nathanw void *arg;
1291 1.88.4.2 nathanw {
1292 1.88.4.2 nathanw struct fdc_softc *fdc = arg;
1293 1.88.4.2 nathanw int s;
1294 1.88.4.2 nathanw
1295 1.88.4.2 nathanw /* Just ensure it has the right spl. */
1296 1.88.4.2 nathanw s = splbio();
1297 1.88.4.2 nathanw (void) fdcstate(fdc);
1298 1.88.4.2 nathanw splx(s);
1299 1.88.4.2 nathanw }
1300 1.88.4.2 nathanw
1301 1.88.4.2 nathanw
1302 1.88.4.2 nathanw /*
1303 1.88.4.2 nathanw * hardware interrupt entry point: used only if no `fast trap' * (in-window)
1304 1.88.4.2 nathanw * handler is available. Unfortunately, we have no reliable way to
1305 1.88.4.2 nathanw * determine that the interrupt really came from the floppy controller;
1306 1.88.4.2 nathanw * just hope that the other devices that share this interrupt level
1307 1.88.4.2 nathanw * can do better..
1308 1.88.4.2 nathanw */
1309 1.88.4.2 nathanw int
1310 1.88.4.2 nathanw fdc_c_hwintr(arg)
1311 1.88.4.2 nathanw void *arg;
1312 1.88.4.2 nathanw {
1313 1.88.4.2 nathanw struct fdc_softc *fdc = arg;
1314 1.88.4.2 nathanw bus_space_tag_t t = fdc->sc_bustag;
1315 1.88.4.2 nathanw bus_space_handle_t h = fdc->sc_handle;
1316 1.88.4.2 nathanw
1317 1.88.4.2 nathanw switch (fdc->sc_itask) {
1318 1.88.4.2 nathanw case FDC_ITASK_NONE:
1319 1.88.4.2 nathanw return (0);
1320 1.88.4.2 nathanw case FDC_ITASK_SENSEI:
1321 1.88.4.2 nathanw if (fdc_wrfifo(fdc, NE7CMD_SENSEI) != 0 || fdcresult(fdc) == -1)
1322 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_ERROR;
1323 1.88.4.2 nathanw else
1324 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_DONE;
1325 1.88.4.2 nathanw FD_SET_SWINTR;
1326 1.88.4.2 nathanw return (1);
1327 1.88.4.2 nathanw case FDC_ITASK_DMA:
1328 1.88.4.2 nathanw /* Proceed with pseudo-dma below */
1329 1.88.4.2 nathanw break;
1330 1.88.4.2 nathanw default:
1331 1.88.4.2 nathanw printf("fdc: stray hard interrupt: itask=%d\n", fdc->sc_itask);
1332 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_SPURIOUS;
1333 1.88.4.2 nathanw FD_SET_SWINTR;
1334 1.88.4.2 nathanw return (1);
1335 1.88.4.2 nathanw }
1336 1.88.4.2 nathanw
1337 1.88.4.2 nathanw /*
1338 1.88.4.2 nathanw * Pseudo DMA in progress
1339 1.88.4.2 nathanw */
1340 1.88.4.2 nathanw for (;;) {
1341 1.88.4.2 nathanw u_int8_t msr;
1342 1.88.4.2 nathanw
1343 1.88.4.2 nathanw msr = bus_space_read_1(t, h, fdc->sc_reg_msr);
1344 1.88.4.2 nathanw
1345 1.88.4.2 nathanw if ((msr & NE7_RQM) == 0)
1346 1.88.4.2 nathanw /* That's all this round */
1347 1.88.4.2 nathanw break;
1348 1.88.4.2 nathanw
1349 1.88.4.2 nathanw if ((msr & NE7_NDM) == 0) {
1350 1.88.4.2 nathanw fdcresult(fdc);
1351 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_DONE;
1352 1.88.4.2 nathanw FD_SET_SWINTR;
1353 1.88.4.2 nathanw #ifdef FD_DEBUG
1354 1.88.4.2 nathanw if (fdc_debug > 1)
1355 1.88.4.2 nathanw printf("fdc: overrun: tc = %d\n", fdc->sc_tc);
1356 1.88.4.2 nathanw #endif
1357 1.88.4.2 nathanw break;
1358 1.88.4.2 nathanw }
1359 1.88.4.2 nathanw
1360 1.88.4.2 nathanw /* Another byte can be transferred */
1361 1.88.4.2 nathanw if ((msr & NE7_DIO) != 0)
1362 1.88.4.2 nathanw *fdc->sc_data =
1363 1.88.4.2 nathanw bus_space_read_1(t, h, fdc->sc_reg_fifo);
1364 1.88.4.2 nathanw else
1365 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_fifo,
1366 1.88.4.2 nathanw *fdc->sc_data);
1367 1.88.4.2 nathanw
1368 1.88.4.2 nathanw fdc->sc_data++;
1369 1.88.4.2 nathanw if (--fdc->sc_tc == 0) {
1370 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_DONE;
1371 1.88.4.2 nathanw FTC_FLIP;
1372 1.88.4.2 nathanw fdcresult(fdc);
1373 1.88.4.2 nathanw FD_SET_SWINTR;
1374 1.88.4.2 nathanw break;
1375 1.88.4.2 nathanw }
1376 1.88.4.2 nathanw }
1377 1.88.4.2 nathanw return (1);
1378 1.88.4.2 nathanw }
1379 1.88.4.2 nathanw
1380 1.88.4.2 nathanw int
1381 1.88.4.2 nathanw fdcswintr(arg)
1382 1.88.4.2 nathanw void *arg;
1383 1.88.4.2 nathanw {
1384 1.88.4.2 nathanw struct fdc_softc *fdc = arg;
1385 1.88.4.2 nathanw int s;
1386 1.88.4.2 nathanw
1387 1.88.4.2 nathanw if (fdc->sc_istatus == FDC_ISTATUS_NONE)
1388 1.88.4.2 nathanw /* This (software) interrupt is not for us */
1389 1.88.4.2 nathanw return (0);
1390 1.88.4.2 nathanw
1391 1.88.4.2 nathanw switch (fdc->sc_istatus) {
1392 1.88.4.2 nathanw case FDC_ISTATUS_ERROR:
1393 1.88.4.2 nathanw printf("fdc: ierror status: state %d\n", fdc->sc_state);
1394 1.88.4.2 nathanw break;
1395 1.88.4.2 nathanw case FDC_ISTATUS_SPURIOUS:
1396 1.88.4.2 nathanw printf("fdc: spurious interrupt: state %d\n", fdc->sc_state);
1397 1.88.4.2 nathanw break;
1398 1.88.4.2 nathanw }
1399 1.88.4.2 nathanw
1400 1.88.4.2 nathanw s = splbio();
1401 1.88.4.2 nathanw fdcstate(fdc);
1402 1.88.4.2 nathanw splx(s);
1403 1.88.4.2 nathanw return (1);
1404 1.88.4.2 nathanw }
1405 1.88.4.2 nathanw
1406 1.88.4.2 nathanw int
1407 1.88.4.2 nathanw fdcstate(fdc)
1408 1.88.4.2 nathanw struct fdc_softc *fdc;
1409 1.88.4.2 nathanw {
1410 1.88.4.2 nathanw #define st0 fdc->sc_status[0]
1411 1.88.4.2 nathanw #define st1 fdc->sc_status[1]
1412 1.88.4.2 nathanw #define cyl fdc->sc_status[1]
1413 1.88.4.2 nathanw #define FDC_WRFIFO(fdc, c) do { \
1414 1.88.4.2 nathanw if (fdc_wrfifo(fdc, (c))) { \
1415 1.88.4.2 nathanw goto xxx; \
1416 1.88.4.2 nathanw } \
1417 1.88.4.2 nathanw } while(0)
1418 1.88.4.2 nathanw
1419 1.88.4.2 nathanw struct fd_softc *fd;
1420 1.88.4.2 nathanw struct buf *bp;
1421 1.88.4.2 nathanw int read, head, sec, nblks;
1422 1.88.4.2 nathanw struct fd_type *type;
1423 1.88.4.2 nathanw struct ne7_fd_formb *finfo = NULL;
1424 1.88.4.2 nathanw
1425 1.88.4.2 nathanw if (fdc->sc_istatus == FDC_ISTATUS_ERROR) {
1426 1.88.4.2 nathanw /* Prevent loop if the reset sequence produces errors */
1427 1.88.4.2 nathanw if (fdc->sc_state != RESETCOMPLETE &&
1428 1.88.4.2 nathanw fdc->sc_state != RECALWAIT &&
1429 1.88.4.2 nathanw fdc->sc_state != RECALCOMPLETE)
1430 1.88.4.2 nathanw fdc->sc_state = DORESET;
1431 1.88.4.2 nathanw }
1432 1.88.4.2 nathanw
1433 1.88.4.2 nathanw /* Clear I task/status field */
1434 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_NONE;
1435 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_NONE;
1436 1.88.4.2 nathanw
1437 1.88.4.2 nathanw loop:
1438 1.88.4.2 nathanw /* Is there a drive for the controller to do a transfer with? */
1439 1.88.4.2 nathanw fd = fdc->sc_drives.tqh_first;
1440 1.88.4.2 nathanw if (fd == NULL) {
1441 1.88.4.2 nathanw fdc->sc_state = DEVIDLE;
1442 1.88.4.2 nathanw return (0);
1443 1.88.4.2 nathanw }
1444 1.88.4.2 nathanw
1445 1.88.4.2 nathanw /* Is there a transfer to this drive? If not, deactivate drive. */
1446 1.88.4.3 nathanw bp = BUFQ_PEEK(&fd->sc_q);
1447 1.88.4.2 nathanw if (bp == NULL) {
1448 1.88.4.2 nathanw fd->sc_ops = 0;
1449 1.88.4.2 nathanw TAILQ_REMOVE(&fdc->sc_drives, fd, sc_drivechain);
1450 1.88.4.2 nathanw fd->sc_active = 0;
1451 1.88.4.2 nathanw goto loop;
1452 1.88.4.2 nathanw }
1453 1.88.4.2 nathanw
1454 1.88.4.2 nathanw if (bp->b_flags & B_FORMAT)
1455 1.88.4.2 nathanw finfo = (struct ne7_fd_formb *)bp->b_data;
1456 1.88.4.2 nathanw
1457 1.88.4.2 nathanw switch (fdc->sc_state) {
1458 1.88.4.2 nathanw case DEVIDLE:
1459 1.88.4.2 nathanw fdc->sc_errors = 0;
1460 1.88.4.2 nathanw fd->sc_skip = 0;
1461 1.88.4.2 nathanw fd->sc_bcount = bp->b_bcount;
1462 1.88.4.2 nathanw fd->sc_blkno = (bp->b_blkno * DEV_BSIZE) / FD_BSIZE(fd);
1463 1.88.4.2 nathanw callout_stop(&fd->sc_motoroff_ch);
1464 1.88.4.2 nathanw if ((fd->sc_flags & FD_MOTOR_WAIT) != 0) {
1465 1.88.4.2 nathanw fdc->sc_state = MOTORWAIT;
1466 1.88.4.2 nathanw return (1);
1467 1.88.4.2 nathanw }
1468 1.88.4.2 nathanw if ((fd->sc_flags & FD_MOTOR) == 0) {
1469 1.88.4.2 nathanw /* Turn on the motor, being careful about pairing. */
1470 1.88.4.2 nathanw struct fd_softc *ofd = fdc->sc_fd[fd->sc_drive ^ 1];
1471 1.88.4.2 nathanw if (ofd && ofd->sc_flags & FD_MOTOR) {
1472 1.88.4.2 nathanw callout_stop(&ofd->sc_motoroff_ch);
1473 1.88.4.2 nathanw ofd->sc_flags &= ~(FD_MOTOR | FD_MOTOR_WAIT);
1474 1.88.4.2 nathanw }
1475 1.88.4.2 nathanw fd->sc_flags |= FD_MOTOR | FD_MOTOR_WAIT;
1476 1.88.4.2 nathanw fd_set_motor(fdc);
1477 1.88.4.2 nathanw fdc->sc_state = MOTORWAIT;
1478 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_NEEDMOTORWAIT) != 0) { /*XXX*/
1479 1.88.4.2 nathanw /* Allow .25s for motor to stabilize. */
1480 1.88.4.2 nathanw callout_reset(&fd->sc_motoron_ch, hz / 4,
1481 1.88.4.2 nathanw fd_motor_on, fd);
1482 1.88.4.2 nathanw } else {
1483 1.88.4.2 nathanw fd->sc_flags &= ~FD_MOTOR_WAIT;
1484 1.88.4.2 nathanw goto loop;
1485 1.88.4.2 nathanw }
1486 1.88.4.2 nathanw return (1);
1487 1.88.4.2 nathanw }
1488 1.88.4.2 nathanw /* Make sure the right drive is selected. */
1489 1.88.4.2 nathanw fd_set_motor(fdc);
1490 1.88.4.2 nathanw
1491 1.88.4.2 nathanw /*FALLTHROUGH*/
1492 1.88.4.2 nathanw case DOSEEK:
1493 1.88.4.2 nathanw doseek:
1494 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_EIS) &&
1495 1.88.4.2 nathanw (bp->b_flags & B_FORMAT) == 0) {
1496 1.88.4.2 nathanw fd->sc_cylin = bp->b_cylinder;
1497 1.88.4.2 nathanw /* We use implied seek */
1498 1.88.4.2 nathanw goto doio;
1499 1.88.4.2 nathanw }
1500 1.88.4.2 nathanw
1501 1.88.4.2 nathanw if (fd->sc_cylin == bp->b_cylinder)
1502 1.88.4.2 nathanw goto doio;
1503 1.88.4.2 nathanw
1504 1.88.4.2 nathanw fd->sc_cylin = -1;
1505 1.88.4.2 nathanw fdc->sc_state = SEEKWAIT;
1506 1.88.4.2 nathanw fdc->sc_nstat = 0;
1507 1.88.4.2 nathanw
1508 1.88.4.2 nathanw fd->sc_dk.dk_seek++;
1509 1.88.4.2 nathanw
1510 1.88.4.2 nathanw disk_busy(&fd->sc_dk);
1511 1.88.4.2 nathanw callout_reset(&fdc->sc_timo_ch, 4 * hz, fdctimeout, fdc);
1512 1.88.4.2 nathanw
1513 1.88.4.2 nathanw /* specify command */
1514 1.88.4.2 nathanw FDC_WRFIFO(fdc, NE7CMD_SPECIFY);
1515 1.88.4.2 nathanw FDC_WRFIFO(fdc, fd->sc_type->steprate);
1516 1.88.4.2 nathanw /* XXX head load time == 6ms */
1517 1.88.4.2 nathanw FDC_WRFIFO(fdc, 6 | NE7_SPECIFY_NODMA);
1518 1.88.4.2 nathanw
1519 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_SENSEI;
1520 1.88.4.2 nathanw /* seek function */
1521 1.88.4.2 nathanw FDC_WRFIFO(fdc, NE7CMD_SEEK);
1522 1.88.4.2 nathanw FDC_WRFIFO(fdc, fd->sc_drive); /* drive number */
1523 1.88.4.2 nathanw FDC_WRFIFO(fdc, bp->b_cylinder * fd->sc_type->step);
1524 1.88.4.2 nathanw return (1);
1525 1.88.4.2 nathanw
1526 1.88.4.2 nathanw case DOIO:
1527 1.88.4.2 nathanw doio:
1528 1.88.4.2 nathanw if (finfo != NULL)
1529 1.88.4.2 nathanw fd->sc_skip = (char *)&(finfo->fd_formb_cylno(0)) -
1530 1.88.4.2 nathanw (char *)finfo;
1531 1.88.4.2 nathanw type = fd->sc_type;
1532 1.88.4.2 nathanw sec = fd->sc_blkno % type->seccyl;
1533 1.88.4.2 nathanw nblks = type->seccyl - sec;
1534 1.88.4.2 nathanw nblks = min(nblks, fd->sc_bcount / FD_BSIZE(fd));
1535 1.88.4.2 nathanw nblks = min(nblks, FDC_MAXIOSIZE / FD_BSIZE(fd));
1536 1.88.4.2 nathanw fd->sc_nblks = nblks;
1537 1.88.4.2 nathanw fd->sc_nbytes = finfo ? bp->b_bcount : nblks * FD_BSIZE(fd);
1538 1.88.4.2 nathanw head = sec / type->sectrac;
1539 1.88.4.2 nathanw sec -= head * type->sectrac;
1540 1.88.4.2 nathanw #ifdef DIAGNOSTIC
1541 1.88.4.2 nathanw {int block;
1542 1.88.4.2 nathanw block = (fd->sc_cylin * type->heads + head) * type->sectrac + sec;
1543 1.88.4.2 nathanw if (block != fd->sc_blkno) {
1544 1.88.4.2 nathanw printf("fdcintr: block %d != blkno %d\n", block, fd->sc_blkno);
1545 1.88.4.2 nathanw #ifdef DDB
1546 1.88.4.2 nathanw Debugger();
1547 1.88.4.2 nathanw #endif
1548 1.88.4.2 nathanw }}
1549 1.88.4.2 nathanw #endif
1550 1.88.4.2 nathanw read = bp->b_flags & B_READ;
1551 1.88.4.2 nathanw
1552 1.88.4.2 nathanw /* Setup for pseudo DMA */
1553 1.88.4.2 nathanw fdc->sc_data = bp->b_data + fd->sc_skip;
1554 1.88.4.2 nathanw fdc->sc_tc = fd->sc_nbytes;
1555 1.88.4.2 nathanw
1556 1.88.4.2 nathanw bus_space_write_1(fdc->sc_bustag, fdc->sc_handle,
1557 1.88.4.2 nathanw fdc->sc_reg_drs, type->rate);
1558 1.88.4.2 nathanw #ifdef FD_DEBUG
1559 1.88.4.2 nathanw if (fdc_debug > 1)
1560 1.88.4.2 nathanw printf("fdcstate: doio: %s drive %d "
1561 1.88.4.2 nathanw "track %d head %d sec %d nblks %d\n",
1562 1.88.4.2 nathanw finfo ? "format" :
1563 1.88.4.2 nathanw (read ? "read" : "write"),
1564 1.88.4.2 nathanw fd->sc_drive, fd->sc_cylin, head, sec, nblks);
1565 1.88.4.2 nathanw #endif
1566 1.88.4.2 nathanw fdc->sc_state = IOCOMPLETE;
1567 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_DMA;
1568 1.88.4.2 nathanw fdc->sc_nstat = 0;
1569 1.88.4.2 nathanw
1570 1.88.4.2 nathanw disk_busy(&fd->sc_dk);
1571 1.88.4.2 nathanw
1572 1.88.4.2 nathanw /* allow 3 seconds for operation */
1573 1.88.4.2 nathanw callout_reset(&fdc->sc_timo_ch, 3 * hz, fdctimeout, fdc);
1574 1.88.4.2 nathanw
1575 1.88.4.2 nathanw if (finfo != NULL) {
1576 1.88.4.2 nathanw /* formatting */
1577 1.88.4.2 nathanw FDC_WRFIFO(fdc, NE7CMD_FORMAT);
1578 1.88.4.2 nathanw FDC_WRFIFO(fdc, (head << 2) | fd->sc_drive);
1579 1.88.4.2 nathanw FDC_WRFIFO(fdc, finfo->fd_formb_secshift);
1580 1.88.4.2 nathanw FDC_WRFIFO(fdc, finfo->fd_formb_nsecs);
1581 1.88.4.2 nathanw FDC_WRFIFO(fdc, finfo->fd_formb_gaplen);
1582 1.88.4.2 nathanw FDC_WRFIFO(fdc, finfo->fd_formb_fillbyte);
1583 1.88.4.2 nathanw } else {
1584 1.88.4.2 nathanw if (read)
1585 1.88.4.2 nathanw FDC_WRFIFO(fdc, NE7CMD_READ);
1586 1.88.4.2 nathanw else
1587 1.88.4.2 nathanw FDC_WRFIFO(fdc, NE7CMD_WRITE);
1588 1.88.4.2 nathanw FDC_WRFIFO(fdc, (head << 2) | fd->sc_drive);
1589 1.88.4.2 nathanw FDC_WRFIFO(fdc, fd->sc_cylin); /*track*/
1590 1.88.4.2 nathanw FDC_WRFIFO(fdc, head);
1591 1.88.4.2 nathanw FDC_WRFIFO(fdc, sec + 1); /*sector+1*/
1592 1.88.4.2 nathanw FDC_WRFIFO(fdc, type->secsize);/*sector size*/
1593 1.88.4.2 nathanw FDC_WRFIFO(fdc, type->sectrac);/*secs/track*/
1594 1.88.4.2 nathanw FDC_WRFIFO(fdc, type->gap1); /*gap1 size*/
1595 1.88.4.2 nathanw FDC_WRFIFO(fdc, type->datalen);/*data length*/
1596 1.88.4.2 nathanw }
1597 1.88.4.2 nathanw
1598 1.88.4.2 nathanw return (1); /* will return later */
1599 1.88.4.2 nathanw
1600 1.88.4.2 nathanw case SEEKWAIT:
1601 1.88.4.2 nathanw callout_stop(&fdc->sc_timo_ch);
1602 1.88.4.2 nathanw fdc->sc_state = SEEKCOMPLETE;
1603 1.88.4.2 nathanw if (fdc->sc_flags & FDC_NEEDHEADSETTLE) {
1604 1.88.4.2 nathanw /* allow 1/50 second for heads to settle */
1605 1.88.4.2 nathanw callout_reset(&fdc->sc_intr_ch, hz / 50,
1606 1.88.4.2 nathanw fdcpseudointr, fdc);
1607 1.88.4.2 nathanw return (1); /* will return later */
1608 1.88.4.2 nathanw }
1609 1.88.4.2 nathanw /*FALLTHROUGH*/
1610 1.88.4.2 nathanw case SEEKCOMPLETE:
1611 1.88.4.2 nathanw disk_unbusy(&fd->sc_dk, 0); /* no data on seek */
1612 1.88.4.2 nathanw
1613 1.88.4.2 nathanw /* Make sure seek really happened. */
1614 1.88.4.2 nathanw if (fdc->sc_nstat != 2 || (st0 & 0xf8) != 0x20 ||
1615 1.88.4.2 nathanw cyl != bp->b_cylinder * fd->sc_type->step) {
1616 1.88.4.2 nathanw #ifdef FD_DEBUG
1617 1.88.4.2 nathanw if (fdc_debug)
1618 1.88.4.2 nathanw fdcstatus(fdc, "seek failed");
1619 1.88.4.2 nathanw #endif
1620 1.88.4.2 nathanw fdcretry(fdc);
1621 1.88.4.2 nathanw goto loop;
1622 1.88.4.2 nathanw }
1623 1.88.4.2 nathanw fd->sc_cylin = bp->b_cylinder;
1624 1.88.4.2 nathanw goto doio;
1625 1.88.4.2 nathanw
1626 1.88.4.2 nathanw case IOTIMEDOUT:
1627 1.88.4.2 nathanw /*
1628 1.88.4.2 nathanw * Try to abort the I/O operation without resetting
1629 1.88.4.2 nathanw * the chip first. Poke TC and arrange to pick up
1630 1.88.4.2 nathanw * the timed out I/O command's status.
1631 1.88.4.2 nathanw */
1632 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_RESULT;
1633 1.88.4.2 nathanw fdc->sc_state = IOCLEANUPWAIT;
1634 1.88.4.2 nathanw fdc->sc_nstat = 0;
1635 1.88.4.2 nathanw /* 1/10 second should be enough */
1636 1.88.4.2 nathanw callout_reset(&fdc->sc_timo_ch, hz / 10, fdctimeout, fdc);
1637 1.88.4.2 nathanw FTC_FLIP;
1638 1.88.4.2 nathanw return (1);
1639 1.88.4.2 nathanw
1640 1.88.4.2 nathanw case IOCLEANUPTIMEDOUT:
1641 1.88.4.2 nathanw case SEEKTIMEDOUT:
1642 1.88.4.2 nathanw case RECALTIMEDOUT:
1643 1.88.4.2 nathanw case RESETTIMEDOUT:
1644 1.88.4.2 nathanw fdcstatus(fdc, "timeout");
1645 1.88.4.2 nathanw
1646 1.88.4.2 nathanw /* All other timeouts always roll through to a chip reset */
1647 1.88.4.2 nathanw fdcretry(fdc);
1648 1.88.4.2 nathanw
1649 1.88.4.2 nathanw /* Force reset, no matter what fdcretry() says */
1650 1.88.4.2 nathanw fdc->sc_state = DORESET;
1651 1.88.4.2 nathanw goto loop;
1652 1.88.4.2 nathanw
1653 1.88.4.2 nathanw case IOCLEANUPWAIT: /* IO FAILED, cleanup succeeded */
1654 1.88.4.2 nathanw callout_stop(&fdc->sc_timo_ch);
1655 1.88.4.2 nathanw disk_unbusy(&fd->sc_dk, (bp->b_bcount - bp->b_resid));
1656 1.88.4.2 nathanw fdcretry(fdc);
1657 1.88.4.2 nathanw goto loop;
1658 1.88.4.2 nathanw
1659 1.88.4.2 nathanw case IOCOMPLETE: /* IO DONE, post-analyze */
1660 1.88.4.2 nathanw callout_stop(&fdc->sc_timo_ch);
1661 1.88.4.2 nathanw
1662 1.88.4.2 nathanw disk_unbusy(&fd->sc_dk, (bp->b_bcount - bp->b_resid));
1663 1.88.4.2 nathanw
1664 1.88.4.2 nathanw if (fdc->sc_nstat != 7 || st1 != 0 ||
1665 1.88.4.2 nathanw ((st0 & 0xf8) != 0 &&
1666 1.88.4.2 nathanw ((st0 & 0xf8) != 0x20 || (fdc->sc_cfg & CFG_EIS) == 0))) {
1667 1.88.4.2 nathanw #ifdef FD_DEBUG
1668 1.88.4.2 nathanw if (fdc_debug) {
1669 1.88.4.2 nathanw fdcstatus(fdc,
1670 1.88.4.2 nathanw bp->b_flags & B_READ
1671 1.88.4.2 nathanw ? "read failed" : "write failed");
1672 1.88.4.2 nathanw printf("blkno %d nblks %d nstat %d tc %d\n",
1673 1.88.4.2 nathanw fd->sc_blkno, fd->sc_nblks,
1674 1.88.4.2 nathanw fdc->sc_nstat, fdc->sc_tc);
1675 1.88.4.2 nathanw }
1676 1.88.4.2 nathanw #endif
1677 1.88.4.2 nathanw if (fdc->sc_nstat == 7 &&
1678 1.88.4.2 nathanw (st1 & ST1_OVERRUN) == ST1_OVERRUN) {
1679 1.88.4.2 nathanw
1680 1.88.4.2 nathanw /*
1681 1.88.4.2 nathanw * Silently retry overruns if no other
1682 1.88.4.2 nathanw * error bit is set. Adjust threshold.
1683 1.88.4.2 nathanw */
1684 1.88.4.2 nathanw int thr = fdc->sc_cfg & CFG_THRHLD_MASK;
1685 1.88.4.2 nathanw if (thr < 15) {
1686 1.88.4.2 nathanw thr++;
1687 1.88.4.2 nathanw fdc->sc_cfg &= ~CFG_THRHLD_MASK;
1688 1.88.4.2 nathanw fdc->sc_cfg |= (thr & CFG_THRHLD_MASK);
1689 1.88.4.2 nathanw #ifdef FD_DEBUG
1690 1.88.4.2 nathanw if (fdc_debug)
1691 1.88.4.2 nathanw printf("fdc: %d -> threshold\n", thr);
1692 1.88.4.2 nathanw #endif
1693 1.88.4.2 nathanw fdconf(fdc);
1694 1.88.4.2 nathanw fdc->sc_overruns = 0;
1695 1.88.4.2 nathanw }
1696 1.88.4.2 nathanw if (++fdc->sc_overruns < 3) {
1697 1.88.4.2 nathanw fdc->sc_state = DOIO;
1698 1.88.4.2 nathanw goto loop;
1699 1.88.4.2 nathanw }
1700 1.88.4.2 nathanw }
1701 1.88.4.2 nathanw fdcretry(fdc);
1702 1.88.4.2 nathanw goto loop;
1703 1.88.4.2 nathanw }
1704 1.88.4.2 nathanw if (fdc->sc_errors) {
1705 1.88.4.2 nathanw diskerr(bp, "fd", "soft error", LOG_PRINTF,
1706 1.88.4.2 nathanw fd->sc_skip / FD_BSIZE(fd),
1707 1.88.4.2 nathanw (struct disklabel *)NULL);
1708 1.88.4.2 nathanw printf("\n");
1709 1.88.4.2 nathanw fdc->sc_errors = 0;
1710 1.88.4.2 nathanw } else {
1711 1.88.4.2 nathanw if (--fdc->sc_overruns < -20) {
1712 1.88.4.2 nathanw int thr = fdc->sc_cfg & CFG_THRHLD_MASK;
1713 1.88.4.2 nathanw if (thr > 0) {
1714 1.88.4.2 nathanw thr--;
1715 1.88.4.2 nathanw fdc->sc_cfg &= ~CFG_THRHLD_MASK;
1716 1.88.4.2 nathanw fdc->sc_cfg |= (thr & CFG_THRHLD_MASK);
1717 1.88.4.2 nathanw #ifdef FD_DEBUG
1718 1.88.4.2 nathanw if (fdc_debug)
1719 1.88.4.2 nathanw printf("fdc: %d -> threshold\n", thr);
1720 1.88.4.2 nathanw #endif
1721 1.88.4.2 nathanw fdconf(fdc);
1722 1.88.4.2 nathanw }
1723 1.88.4.2 nathanw fdc->sc_overruns = 0;
1724 1.88.4.2 nathanw }
1725 1.88.4.2 nathanw }
1726 1.88.4.2 nathanw fd->sc_blkno += fd->sc_nblks;
1727 1.88.4.2 nathanw fd->sc_skip += fd->sc_nbytes;
1728 1.88.4.2 nathanw fd->sc_bcount -= fd->sc_nbytes;
1729 1.88.4.2 nathanw if (finfo == NULL && fd->sc_bcount > 0) {
1730 1.88.4.2 nathanw bp->b_cylinder = fd->sc_blkno / fd->sc_type->seccyl;
1731 1.88.4.2 nathanw goto doseek;
1732 1.88.4.2 nathanw }
1733 1.88.4.2 nathanw fdfinish(fd, bp);
1734 1.88.4.2 nathanw goto loop;
1735 1.88.4.2 nathanw
1736 1.88.4.2 nathanw case DORESET:
1737 1.88.4.2 nathanw /* try a reset, keep motor on */
1738 1.88.4.2 nathanw fd_set_motor(fdc);
1739 1.88.4.2 nathanw delay(100);
1740 1.88.4.2 nathanw fdc->sc_nstat = 0;
1741 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_SENSEI;
1742 1.88.4.2 nathanw fdc->sc_state = RESETCOMPLETE;
1743 1.88.4.2 nathanw callout_reset(&fdc->sc_timo_ch, hz / 2, fdctimeout, fdc);
1744 1.88.4.2 nathanw fdc_reset(fdc);
1745 1.88.4.2 nathanw return (1); /* will return later */
1746 1.88.4.2 nathanw
1747 1.88.4.2 nathanw case RESETCOMPLETE:
1748 1.88.4.2 nathanw callout_stop(&fdc->sc_timo_ch);
1749 1.88.4.2 nathanw fdconf(fdc);
1750 1.88.4.2 nathanw
1751 1.88.4.2 nathanw /* FALLTHROUGH */
1752 1.88.4.2 nathanw case DORECAL:
1753 1.88.4.2 nathanw fdc->sc_state = RECALWAIT;
1754 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_SENSEI;
1755 1.88.4.2 nathanw fdc->sc_nstat = 0;
1756 1.88.4.2 nathanw callout_reset(&fdc->sc_timo_ch, 5 * hz, fdctimeout, fdc);
1757 1.88.4.2 nathanw /* recalibrate function */
1758 1.88.4.2 nathanw FDC_WRFIFO(fdc, NE7CMD_RECAL);
1759 1.88.4.2 nathanw FDC_WRFIFO(fdc, fd->sc_drive);
1760 1.88.4.2 nathanw return (1); /* will return later */
1761 1.88.4.2 nathanw
1762 1.88.4.2 nathanw case RECALWAIT:
1763 1.88.4.2 nathanw callout_stop(&fdc->sc_timo_ch);
1764 1.88.4.2 nathanw fdc->sc_state = RECALCOMPLETE;
1765 1.88.4.2 nathanw if (fdc->sc_flags & FDC_NEEDHEADSETTLE) {
1766 1.88.4.2 nathanw /* allow 1/30 second for heads to settle */
1767 1.88.4.2 nathanw callout_reset(&fdc->sc_intr_ch, hz / 30,
1768 1.88.4.2 nathanw fdcpseudointr, fdc);
1769 1.88.4.2 nathanw return (1); /* will return later */
1770 1.88.4.2 nathanw }
1771 1.88.4.2 nathanw
1772 1.88.4.2 nathanw case RECALCOMPLETE:
1773 1.88.4.2 nathanw if (fdc->sc_nstat != 2 || (st0 & 0xf8) != 0x20 || cyl != 0) {
1774 1.88.4.2 nathanw #ifdef FD_DEBUG
1775 1.88.4.2 nathanw if (fdc_debug)
1776 1.88.4.2 nathanw fdcstatus(fdc, "recalibrate failed");
1777 1.88.4.2 nathanw #endif
1778 1.88.4.2 nathanw fdcretry(fdc);
1779 1.88.4.2 nathanw goto loop;
1780 1.88.4.2 nathanw }
1781 1.88.4.2 nathanw fd->sc_cylin = 0;
1782 1.88.4.2 nathanw goto doseek;
1783 1.88.4.2 nathanw
1784 1.88.4.2 nathanw case MOTORWAIT:
1785 1.88.4.2 nathanw if (fd->sc_flags & FD_MOTOR_WAIT)
1786 1.88.4.2 nathanw return (1); /* time's not up yet */
1787 1.88.4.2 nathanw goto doseek;
1788 1.88.4.2 nathanw
1789 1.88.4.2 nathanw default:
1790 1.88.4.2 nathanw fdcstatus(fdc, "stray interrupt");
1791 1.88.4.2 nathanw return (1);
1792 1.88.4.2 nathanw }
1793 1.88.4.2 nathanw #ifdef DIAGNOSTIC
1794 1.88.4.2 nathanw panic("fdcintr: impossible");
1795 1.88.4.2 nathanw #endif
1796 1.88.4.2 nathanw
1797 1.88.4.2 nathanw xxx:
1798 1.88.4.2 nathanw /*
1799 1.88.4.2 nathanw * We get here if the chip locks up in FDC_WRFIFO()
1800 1.88.4.2 nathanw * Cancel any operation and schedule a reset
1801 1.88.4.2 nathanw */
1802 1.88.4.2 nathanw callout_stop(&fdc->sc_timo_ch);
1803 1.88.4.2 nathanw fdcretry(fdc);
1804 1.88.4.2 nathanw (fdc)->sc_state = DORESET;
1805 1.88.4.2 nathanw goto loop;
1806 1.88.4.2 nathanw
1807 1.88.4.2 nathanw #undef st0
1808 1.88.4.2 nathanw #undef st1
1809 1.88.4.2 nathanw #undef cyl
1810 1.88.4.2 nathanw }
1811 1.88.4.2 nathanw
1812 1.88.4.2 nathanw void
1813 1.88.4.2 nathanw fdcretry(fdc)
1814 1.88.4.2 nathanw struct fdc_softc *fdc;
1815 1.88.4.2 nathanw {
1816 1.88.4.2 nathanw struct fd_softc *fd;
1817 1.88.4.2 nathanw struct buf *bp;
1818 1.88.4.2 nathanw int error = EIO;
1819 1.88.4.2 nathanw
1820 1.88.4.2 nathanw fd = fdc->sc_drives.tqh_first;
1821 1.88.4.3 nathanw bp = BUFQ_PEEK(&fd->sc_q);
1822 1.88.4.2 nathanw
1823 1.88.4.2 nathanw fdc->sc_overruns = 0;
1824 1.88.4.2 nathanw if (fd->sc_opts & FDOPT_NORETRY)
1825 1.88.4.2 nathanw goto fail;
1826 1.88.4.2 nathanw
1827 1.88.4.2 nathanw switch (fdc->sc_errors) {
1828 1.88.4.2 nathanw case 0:
1829 1.88.4.2 nathanw if (fdc->sc_nstat == 7 &&
1830 1.88.4.2 nathanw (fdc->sc_status[0] & 0xd8) == 0x40 &&
1831 1.88.4.2 nathanw (fdc->sc_status[1] & 0x2) == 0x2) {
1832 1.88.4.2 nathanw printf("%s: read-only medium\n", fd->sc_dv.dv_xname);
1833 1.88.4.2 nathanw error = EROFS;
1834 1.88.4.2 nathanw goto failsilent;
1835 1.88.4.2 nathanw }
1836 1.88.4.2 nathanw /* try again */
1837 1.88.4.2 nathanw fdc->sc_state =
1838 1.88.4.2 nathanw (fdc->sc_flags & FDC_EIS) ? DOIO : DOSEEK;
1839 1.88.4.2 nathanw break;
1840 1.88.4.2 nathanw
1841 1.88.4.2 nathanw case 1: case 2: case 3:
1842 1.88.4.2 nathanw /* didn't work; try recalibrating */
1843 1.88.4.2 nathanw fdc->sc_state = DORECAL;
1844 1.88.4.2 nathanw break;
1845 1.88.4.2 nathanw
1846 1.88.4.2 nathanw case 4:
1847 1.88.4.2 nathanw if (fdc->sc_nstat == 7 &&
1848 1.88.4.2 nathanw fdc->sc_status[0] == 0 &&
1849 1.88.4.2 nathanw fdc->sc_status[1] == 0 &&
1850 1.88.4.2 nathanw fdc->sc_status[2] == 0) {
1851 1.88.4.2 nathanw /*
1852 1.88.4.2 nathanw * We've retried a few times and we've got
1853 1.88.4.2 nathanw * valid status and all three status bytes
1854 1.88.4.2 nathanw * are zero. Assume this condition is the
1855 1.88.4.2 nathanw * result of no disk loaded into the drive.
1856 1.88.4.2 nathanw */
1857 1.88.4.2 nathanw printf("%s: no medium?\n", fd->sc_dv.dv_xname);
1858 1.88.4.2 nathanw error = ENODEV;
1859 1.88.4.2 nathanw goto failsilent;
1860 1.88.4.2 nathanw }
1861 1.88.4.2 nathanw
1862 1.88.4.2 nathanw /* still no go; reset the bastard */
1863 1.88.4.2 nathanw fdc->sc_state = DORESET;
1864 1.88.4.2 nathanw break;
1865 1.88.4.2 nathanw
1866 1.88.4.2 nathanw default:
1867 1.88.4.2 nathanw fail:
1868 1.88.4.2 nathanw if ((fd->sc_opts & FDOPT_SILENT) == 0) {
1869 1.88.4.2 nathanw diskerr(bp, "fd", "hard error", LOG_PRINTF,
1870 1.88.4.2 nathanw fd->sc_skip / FD_BSIZE(fd),
1871 1.88.4.2 nathanw (struct disklabel *)NULL);
1872 1.88.4.2 nathanw printf("\n");
1873 1.88.4.2 nathanw fdcstatus(fdc, "controller status");
1874 1.88.4.2 nathanw }
1875 1.88.4.2 nathanw
1876 1.88.4.2 nathanw failsilent:
1877 1.88.4.2 nathanw bp->b_flags |= B_ERROR;
1878 1.88.4.2 nathanw bp->b_error = error;
1879 1.88.4.2 nathanw fdfinish(fd, bp);
1880 1.88.4.2 nathanw }
1881 1.88.4.2 nathanw fdc->sc_errors++;
1882 1.88.4.2 nathanw }
1883 1.88.4.2 nathanw
1884 1.88.4.2 nathanw int
1885 1.88.4.2 nathanw fdioctl(dev, cmd, addr, flag, p)
1886 1.88.4.2 nathanw dev_t dev;
1887 1.88.4.2 nathanw u_long cmd;
1888 1.88.4.2 nathanw caddr_t addr;
1889 1.88.4.2 nathanw int flag;
1890 1.88.4.2 nathanw struct proc *p;
1891 1.88.4.2 nathanw {
1892 1.88.4.2 nathanw struct fd_softc *fd;
1893 1.88.4.2 nathanw struct fdc_softc *fdc;
1894 1.88.4.2 nathanw struct fdformat_parms *form_parms;
1895 1.88.4.2 nathanw struct fdformat_cmd *form_cmd;
1896 1.88.4.2 nathanw struct ne7_fd_formb *fd_formb;
1897 1.88.4.2 nathanw int il[FD_MAX_NSEC + 1];
1898 1.88.4.2 nathanw int unit;
1899 1.88.4.2 nathanw int i, j;
1900 1.88.4.2 nathanw int error;
1901 1.88.4.2 nathanw
1902 1.88.4.2 nathanw unit = FDUNIT(dev);
1903 1.88.4.2 nathanw if (unit >= fd_cd.cd_ndevs)
1904 1.88.4.2 nathanw return (ENXIO);
1905 1.88.4.2 nathanw
1906 1.88.4.2 nathanw fd = fd_cd.cd_devs[FDUNIT(dev)];
1907 1.88.4.2 nathanw fdc = (struct fdc_softc *)fd->sc_dv.dv_parent;
1908 1.88.4.2 nathanw
1909 1.88.4.2 nathanw switch (cmd) {
1910 1.88.4.2 nathanw case DIOCGDINFO:
1911 1.88.4.2 nathanw *(struct disklabel *)addr = *(fd->sc_dk.dk_label);
1912 1.88.4.2 nathanw return 0;
1913 1.88.4.2 nathanw
1914 1.88.4.2 nathanw case DIOCWLABEL:
1915 1.88.4.2 nathanw if ((flag & FWRITE) == 0)
1916 1.88.4.2 nathanw return EBADF;
1917 1.88.4.2 nathanw /* XXX do something */
1918 1.88.4.2 nathanw return (0);
1919 1.88.4.2 nathanw
1920 1.88.4.2 nathanw case DIOCWDINFO:
1921 1.88.4.2 nathanw if ((flag & FWRITE) == 0)
1922 1.88.4.2 nathanw return (EBADF);
1923 1.88.4.2 nathanw
1924 1.88.4.2 nathanw error = setdisklabel(fd->sc_dk.dk_label,
1925 1.88.4.2 nathanw (struct disklabel *)addr, 0,
1926 1.88.4.2 nathanw fd->sc_dk.dk_cpulabel);
1927 1.88.4.2 nathanw if (error)
1928 1.88.4.2 nathanw return (error);
1929 1.88.4.2 nathanw
1930 1.88.4.2 nathanw error = writedisklabel(dev, fdstrategy,
1931 1.88.4.2 nathanw fd->sc_dk.dk_label,
1932 1.88.4.2 nathanw fd->sc_dk.dk_cpulabel);
1933 1.88.4.2 nathanw return (error);
1934 1.88.4.2 nathanw
1935 1.88.4.2 nathanw case DIOCLOCK:
1936 1.88.4.2 nathanw /*
1937 1.88.4.2 nathanw * Nothing to do here, really.
1938 1.88.4.2 nathanw */
1939 1.88.4.2 nathanw return (0);
1940 1.88.4.2 nathanw
1941 1.88.4.2 nathanw case DIOCEJECT:
1942 1.88.4.2 nathanw if (*(int *)addr == 0) {
1943 1.88.4.2 nathanw int part = DISKPART(dev);
1944 1.88.4.2 nathanw /*
1945 1.88.4.2 nathanw * Don't force eject: check that we are the only
1946 1.88.4.2 nathanw * partition open. If so, unlock it.
1947 1.88.4.2 nathanw */
1948 1.88.4.2 nathanw if ((fd->sc_dk.dk_openmask & ~(1 << part)) != 0 ||
1949 1.88.4.2 nathanw fd->sc_dk.dk_bopenmask + fd->sc_dk.dk_copenmask !=
1950 1.88.4.2 nathanw fd->sc_dk.dk_openmask) {
1951 1.88.4.2 nathanw return (EBUSY);
1952 1.88.4.2 nathanw }
1953 1.88.4.2 nathanw }
1954 1.88.4.2 nathanw /* FALLTHROUGH */
1955 1.88.4.2 nathanw case ODIOCEJECT:
1956 1.88.4.2 nathanw fd_do_eject(fd);
1957 1.88.4.2 nathanw return (0);
1958 1.88.4.2 nathanw
1959 1.88.4.2 nathanw case FDIOCGETFORMAT:
1960 1.88.4.2 nathanw form_parms = (struct fdformat_parms *)addr;
1961 1.88.4.2 nathanw form_parms->fdformat_version = FDFORMAT_VERSION;
1962 1.88.4.2 nathanw form_parms->nbps = 128 * (1 << fd->sc_type->secsize);
1963 1.88.4.2 nathanw form_parms->ncyl = fd->sc_type->cylinders;
1964 1.88.4.2 nathanw form_parms->nspt = fd->sc_type->sectrac;
1965 1.88.4.2 nathanw form_parms->ntrk = fd->sc_type->heads;
1966 1.88.4.2 nathanw form_parms->stepspercyl = fd->sc_type->step;
1967 1.88.4.2 nathanw form_parms->gaplen = fd->sc_type->gap2;
1968 1.88.4.2 nathanw form_parms->fillbyte = fd->sc_type->fillbyte;
1969 1.88.4.2 nathanw form_parms->interleave = fd->sc_type->interleave;
1970 1.88.4.2 nathanw switch (fd->sc_type->rate) {
1971 1.88.4.2 nathanw case FDC_500KBPS:
1972 1.88.4.2 nathanw form_parms->xfer_rate = 500 * 1024;
1973 1.88.4.2 nathanw break;
1974 1.88.4.2 nathanw case FDC_300KBPS:
1975 1.88.4.2 nathanw form_parms->xfer_rate = 300 * 1024;
1976 1.88.4.2 nathanw break;
1977 1.88.4.2 nathanw case FDC_250KBPS:
1978 1.88.4.2 nathanw form_parms->xfer_rate = 250 * 1024;
1979 1.88.4.2 nathanw break;
1980 1.88.4.2 nathanw default:
1981 1.88.4.2 nathanw return (EINVAL);
1982 1.88.4.2 nathanw }
1983 1.88.4.2 nathanw return (0);
1984 1.88.4.2 nathanw
1985 1.88.4.2 nathanw case FDIOCSETFORMAT:
1986 1.88.4.2 nathanw if ((flag & FWRITE) == 0)
1987 1.88.4.2 nathanw return (EBADF); /* must be opened for writing */
1988 1.88.4.2 nathanw
1989 1.88.4.2 nathanw form_parms = (struct fdformat_parms *)addr;
1990 1.88.4.2 nathanw if (form_parms->fdformat_version != FDFORMAT_VERSION)
1991 1.88.4.2 nathanw return (EINVAL);/* wrong version of formatting prog */
1992 1.88.4.2 nathanw
1993 1.88.4.2 nathanw i = form_parms->nbps >> 7;
1994 1.88.4.2 nathanw if ((form_parms->nbps & 0x7f) || ffs(i) == 0 ||
1995 1.88.4.2 nathanw i & ~(1 << (ffs(i)-1)))
1996 1.88.4.2 nathanw /* not a power-of-two multiple of 128 */
1997 1.88.4.2 nathanw return (EINVAL);
1998 1.88.4.2 nathanw
1999 1.88.4.2 nathanw switch (form_parms->xfer_rate) {
2000 1.88.4.2 nathanw case 500 * 1024:
2001 1.88.4.2 nathanw fd->sc_type->rate = FDC_500KBPS;
2002 1.88.4.2 nathanw break;
2003 1.88.4.2 nathanw case 300 * 1024:
2004 1.88.4.2 nathanw fd->sc_type->rate = FDC_300KBPS;
2005 1.88.4.2 nathanw break;
2006 1.88.4.2 nathanw case 250 * 1024:
2007 1.88.4.2 nathanw fd->sc_type->rate = FDC_250KBPS;
2008 1.88.4.2 nathanw break;
2009 1.88.4.2 nathanw default:
2010 1.88.4.2 nathanw return (EINVAL);
2011 1.88.4.2 nathanw }
2012 1.88.4.2 nathanw
2013 1.88.4.2 nathanw if (form_parms->nspt > FD_MAX_NSEC ||
2014 1.88.4.2 nathanw form_parms->fillbyte > 0xff ||
2015 1.88.4.2 nathanw form_parms->interleave > 0xff)
2016 1.88.4.2 nathanw return EINVAL;
2017 1.88.4.2 nathanw fd->sc_type->sectrac = form_parms->nspt;
2018 1.88.4.2 nathanw if (form_parms->ntrk != 2 && form_parms->ntrk != 1)
2019 1.88.4.2 nathanw return EINVAL;
2020 1.88.4.2 nathanw fd->sc_type->heads = form_parms->ntrk;
2021 1.88.4.2 nathanw fd->sc_type->seccyl = form_parms->nspt * form_parms->ntrk;
2022 1.88.4.2 nathanw fd->sc_type->secsize = ffs(i)-1;
2023 1.88.4.2 nathanw fd->sc_type->gap2 = form_parms->gaplen;
2024 1.88.4.2 nathanw fd->sc_type->cylinders = form_parms->ncyl;
2025 1.88.4.2 nathanw fd->sc_type->size = fd->sc_type->seccyl * form_parms->ncyl *
2026 1.88.4.2 nathanw form_parms->nbps / DEV_BSIZE;
2027 1.88.4.2 nathanw fd->sc_type->step = form_parms->stepspercyl;
2028 1.88.4.2 nathanw fd->sc_type->fillbyte = form_parms->fillbyte;
2029 1.88.4.2 nathanw fd->sc_type->interleave = form_parms->interleave;
2030 1.88.4.2 nathanw return (0);
2031 1.88.4.2 nathanw
2032 1.88.4.2 nathanw case FDIOCFORMAT_TRACK:
2033 1.88.4.2 nathanw if((flag & FWRITE) == 0)
2034 1.88.4.2 nathanw /* must be opened for writing */
2035 1.88.4.2 nathanw return (EBADF);
2036 1.88.4.2 nathanw form_cmd = (struct fdformat_cmd *)addr;
2037 1.88.4.2 nathanw if (form_cmd->formatcmd_version != FDFORMAT_VERSION)
2038 1.88.4.2 nathanw /* wrong version of formatting prog */
2039 1.88.4.2 nathanw return (EINVAL);
2040 1.88.4.2 nathanw
2041 1.88.4.2 nathanw if (form_cmd->head >= fd->sc_type->heads ||
2042 1.88.4.2 nathanw form_cmd->cylinder >= fd->sc_type->cylinders) {
2043 1.88.4.2 nathanw return (EINVAL);
2044 1.88.4.2 nathanw }
2045 1.88.4.2 nathanw
2046 1.88.4.2 nathanw fd_formb = malloc(sizeof(struct ne7_fd_formb),
2047 1.88.4.2 nathanw M_TEMP, M_NOWAIT);
2048 1.88.4.2 nathanw if (fd_formb == 0)
2049 1.88.4.2 nathanw return (ENOMEM);
2050 1.88.4.2 nathanw
2051 1.88.4.2 nathanw fd_formb->head = form_cmd->head;
2052 1.88.4.2 nathanw fd_formb->cyl = form_cmd->cylinder;
2053 1.88.4.2 nathanw fd_formb->transfer_rate = fd->sc_type->rate;
2054 1.88.4.2 nathanw fd_formb->fd_formb_secshift = fd->sc_type->secsize;
2055 1.88.4.2 nathanw fd_formb->fd_formb_nsecs = fd->sc_type->sectrac;
2056 1.88.4.2 nathanw fd_formb->fd_formb_gaplen = fd->sc_type->gap2;
2057 1.88.4.2 nathanw fd_formb->fd_formb_fillbyte = fd->sc_type->fillbyte;
2058 1.88.4.2 nathanw
2059 1.88.4.2 nathanw bzero(il, sizeof il);
2060 1.88.4.2 nathanw for (j = 0, i = 1; i <= fd_formb->fd_formb_nsecs; i++) {
2061 1.88.4.2 nathanw while (il[(j%fd_formb->fd_formb_nsecs) + 1])
2062 1.88.4.2 nathanw j++;
2063 1.88.4.2 nathanw il[(j%fd_formb->fd_formb_nsecs) + 1] = i;
2064 1.88.4.2 nathanw j += fd->sc_type->interleave;
2065 1.88.4.2 nathanw }
2066 1.88.4.2 nathanw for (i = 0; i < fd_formb->fd_formb_nsecs; i++) {
2067 1.88.4.2 nathanw fd_formb->fd_formb_cylno(i) = form_cmd->cylinder;
2068 1.88.4.2 nathanw fd_formb->fd_formb_headno(i) = form_cmd->head;
2069 1.88.4.2 nathanw fd_formb->fd_formb_secno(i) = il[i+1];
2070 1.88.4.2 nathanw fd_formb->fd_formb_secsize(i) = fd->sc_type->secsize;
2071 1.88.4.2 nathanw }
2072 1.88.4.2 nathanw
2073 1.88.4.2 nathanw error = fdformat(dev, fd_formb, p);
2074 1.88.4.2 nathanw free(fd_formb, M_TEMP);
2075 1.88.4.2 nathanw return error;
2076 1.88.4.2 nathanw
2077 1.88.4.2 nathanw case FDIOCGETOPTS: /* get drive options */
2078 1.88.4.2 nathanw *(int *)addr = fd->sc_opts;
2079 1.88.4.2 nathanw return (0);
2080 1.88.4.2 nathanw
2081 1.88.4.2 nathanw case FDIOCSETOPTS: /* set drive options */
2082 1.88.4.2 nathanw fd->sc_opts = *(int *)addr;
2083 1.88.4.2 nathanw return (0);
2084 1.88.4.2 nathanw
2085 1.88.4.2 nathanw #ifdef FD_DEBUG
2086 1.88.4.2 nathanw case _IO('f', 100):
2087 1.88.4.2 nathanw fdc_wrfifo(fdc, NE7CMD_DUMPREG);
2088 1.88.4.2 nathanw fdcresult(fdc);
2089 1.88.4.2 nathanw printf("fdc: dumpreg(%d regs): <", fdc->sc_nstat);
2090 1.88.4.2 nathanw for (i = 0; i < fdc->sc_nstat; i++)
2091 1.88.4.2 nathanw printf(" 0x%x", fdc->sc_status[i]);
2092 1.88.4.2 nathanw printf(">\n");
2093 1.88.4.2 nathanw return (0);
2094 1.88.4.2 nathanw
2095 1.88.4.2 nathanw case _IOW('f', 101, int):
2096 1.88.4.2 nathanw fdc->sc_cfg &= ~CFG_THRHLD_MASK;
2097 1.88.4.2 nathanw fdc->sc_cfg |= (*(int *)addr & CFG_THRHLD_MASK);
2098 1.88.4.2 nathanw fdconf(fdc);
2099 1.88.4.2 nathanw return (0);
2100 1.88.4.2 nathanw
2101 1.88.4.2 nathanw case _IO('f', 102):
2102 1.88.4.2 nathanw fdc_wrfifo(fdc, NE7CMD_SENSEI);
2103 1.88.4.2 nathanw fdcresult(fdc);
2104 1.88.4.2 nathanw printf("fdc: sensei(%d regs): <", fdc->sc_nstat);
2105 1.88.4.2 nathanw for (i=0; i< fdc->sc_nstat; i++)
2106 1.88.4.2 nathanw printf(" 0x%x", fdc->sc_status[i]);
2107 1.88.4.2 nathanw printf(">\n");
2108 1.88.4.2 nathanw return (0);
2109 1.88.4.2 nathanw #endif
2110 1.88.4.2 nathanw default:
2111 1.88.4.2 nathanw return (ENOTTY);
2112 1.88.4.2 nathanw }
2113 1.88.4.2 nathanw
2114 1.88.4.2 nathanw #ifdef DIAGNOSTIC
2115 1.88.4.2 nathanw panic("fdioctl: impossible");
2116 1.88.4.2 nathanw #endif
2117 1.88.4.2 nathanw }
2118 1.88.4.2 nathanw
2119 1.88.4.2 nathanw int
2120 1.88.4.2 nathanw fdformat(dev, finfo, p)
2121 1.88.4.2 nathanw dev_t dev;
2122 1.88.4.2 nathanw struct ne7_fd_formb *finfo;
2123 1.88.4.2 nathanw struct proc *p;
2124 1.88.4.2 nathanw {
2125 1.88.4.2 nathanw int rv = 0, s;
2126 1.88.4.2 nathanw struct fd_softc *fd = fd_cd.cd_devs[FDUNIT(dev)];
2127 1.88.4.2 nathanw struct fd_type *type = fd->sc_type;
2128 1.88.4.2 nathanw struct buf *bp;
2129 1.88.4.2 nathanw
2130 1.88.4.2 nathanw /* set up a buffer header for fdstrategy() */
2131 1.88.4.2 nathanw bp = (struct buf *)malloc(sizeof(struct buf), M_TEMP, M_NOWAIT);
2132 1.88.4.2 nathanw if (bp == 0)
2133 1.88.4.2 nathanw return (ENOBUFS);
2134 1.88.4.2 nathanw
2135 1.88.4.2 nathanw memset((void *)bp, 0, sizeof(struct buf));
2136 1.88.4.2 nathanw bp->b_flags = B_BUSY | B_PHYS | B_FORMAT;
2137 1.88.4.2 nathanw bp->b_proc = p;
2138 1.88.4.2 nathanw bp->b_dev = dev;
2139 1.88.4.2 nathanw
2140 1.88.4.2 nathanw /*
2141 1.88.4.2 nathanw * Calculate a fake blkno, so fdstrategy() would initiate a
2142 1.88.4.2 nathanw * seek to the requested cylinder.
2143 1.88.4.2 nathanw */
2144 1.88.4.2 nathanw bp->b_blkno = ((finfo->cyl * (type->sectrac * type->heads)
2145 1.88.4.2 nathanw + finfo->head * type->sectrac) * FD_BSIZE(fd))
2146 1.88.4.2 nathanw / DEV_BSIZE;
2147 1.88.4.2 nathanw
2148 1.88.4.2 nathanw bp->b_bcount = sizeof(struct fd_idfield_data) * finfo->fd_formb_nsecs;
2149 1.88.4.2 nathanw bp->b_data = (caddr_t)finfo;
2150 1.88.4.2 nathanw
2151 1.88.4.2 nathanw #ifdef FD_DEBUG
2152 1.88.4.2 nathanw if (fdc_debug) {
2153 1.88.4.2 nathanw int i;
2154 1.88.4.2 nathanw
2155 1.88.4.2 nathanw printf("fdformat: blkno 0x%x count %ld\n",
2156 1.88.4.2 nathanw bp->b_blkno, bp->b_bcount);
2157 1.88.4.2 nathanw
2158 1.88.4.2 nathanw printf("\tcyl:\t%d\n", finfo->cyl);
2159 1.88.4.2 nathanw printf("\thead:\t%d\n", finfo->head);
2160 1.88.4.2 nathanw printf("\tnsecs:\t%d\n", finfo->fd_formb_nsecs);
2161 1.88.4.2 nathanw printf("\tsshft:\t%d\n", finfo->fd_formb_secshift);
2162 1.88.4.2 nathanw printf("\tgaplen:\t%d\n", finfo->fd_formb_gaplen);
2163 1.88.4.2 nathanw printf("\ttrack data:");
2164 1.88.4.2 nathanw for (i = 0; i < finfo->fd_formb_nsecs; i++) {
2165 1.88.4.2 nathanw printf(" [c%d h%d s%d]",
2166 1.88.4.2 nathanw finfo->fd_formb_cylno(i),
2167 1.88.4.2 nathanw finfo->fd_formb_headno(i),
2168 1.88.4.2 nathanw finfo->fd_formb_secno(i) );
2169 1.88.4.2 nathanw if (finfo->fd_formb_secsize(i) != 2)
2170 1.88.4.2 nathanw printf("<sz:%d>", finfo->fd_formb_secsize(i));
2171 1.88.4.2 nathanw }
2172 1.88.4.2 nathanw printf("\n");
2173 1.88.4.2 nathanw }
2174 1.88.4.2 nathanw #endif
2175 1.88.4.2 nathanw
2176 1.88.4.2 nathanw /* now do the format */
2177 1.88.4.2 nathanw fdstrategy(bp);
2178 1.88.4.2 nathanw
2179 1.88.4.2 nathanw /* ...and wait for it to complete */
2180 1.88.4.2 nathanw s = splbio();
2181 1.88.4.2 nathanw while (!(bp->b_flags & B_DONE)) {
2182 1.88.4.2 nathanw rv = tsleep((caddr_t)bp, PRIBIO, "fdform", 20 * hz);
2183 1.88.4.2 nathanw if (rv == EWOULDBLOCK)
2184 1.88.4.2 nathanw break;
2185 1.88.4.2 nathanw }
2186 1.88.4.2 nathanw splx(s);
2187 1.88.4.2 nathanw
2188 1.88.4.2 nathanw if (rv == EWOULDBLOCK) {
2189 1.88.4.2 nathanw /* timed out */
2190 1.88.4.2 nathanw rv = EIO;
2191 1.88.4.2 nathanw biodone(bp);
2192 1.88.4.2 nathanw }
2193 1.88.4.2 nathanw if (bp->b_flags & B_ERROR) {
2194 1.88.4.2 nathanw rv = bp->b_error;
2195 1.88.4.2 nathanw }
2196 1.88.4.2 nathanw free(bp, M_TEMP);
2197 1.88.4.2 nathanw return (rv);
2198 1.88.4.2 nathanw }
2199 1.88.4.2 nathanw
2200 1.88.4.2 nathanw void
2201 1.88.4.2 nathanw fdgetdisklabel(dev)
2202 1.88.4.2 nathanw dev_t dev;
2203 1.88.4.2 nathanw {
2204 1.88.4.2 nathanw int unit = FDUNIT(dev), i;
2205 1.88.4.2 nathanw struct fd_softc *fd = fd_cd.cd_devs[unit];
2206 1.88.4.2 nathanw struct disklabel *lp = fd->sc_dk.dk_label;
2207 1.88.4.2 nathanw struct cpu_disklabel *clp = fd->sc_dk.dk_cpulabel;
2208 1.88.4.2 nathanw
2209 1.88.4.2 nathanw bzero(lp, sizeof(struct disklabel));
2210 1.88.4.2 nathanw bzero(lp, sizeof(struct cpu_disklabel));
2211 1.88.4.2 nathanw
2212 1.88.4.2 nathanw lp->d_type = DTYPE_FLOPPY;
2213 1.88.4.2 nathanw lp->d_secsize = FD_BSIZE(fd);
2214 1.88.4.2 nathanw lp->d_secpercyl = fd->sc_type->seccyl;
2215 1.88.4.2 nathanw lp->d_nsectors = fd->sc_type->sectrac;
2216 1.88.4.2 nathanw lp->d_ncylinders = fd->sc_type->cylinders;
2217 1.88.4.2 nathanw lp->d_ntracks = fd->sc_type->heads; /* Go figure... */
2218 1.88.4.2 nathanw lp->d_secperunit = lp->d_secpercyl * lp->d_ncylinders;
2219 1.88.4.2 nathanw lp->d_rpm = 3600; /* XXX like it matters... */
2220 1.88.4.2 nathanw
2221 1.88.4.2 nathanw strncpy(lp->d_typename, "floppy", sizeof(lp->d_typename));
2222 1.88.4.2 nathanw strncpy(lp->d_packname, "fictitious", sizeof(lp->d_packname));
2223 1.88.4.2 nathanw lp->d_interleave = 1;
2224 1.88.4.2 nathanw
2225 1.88.4.2 nathanw lp->d_partitions[RAW_PART].p_offset = 0;
2226 1.88.4.2 nathanw lp->d_partitions[RAW_PART].p_size = lp->d_secpercyl * lp->d_ncylinders;
2227 1.88.4.2 nathanw lp->d_partitions[RAW_PART].p_fstype = FS_UNUSED;
2228 1.88.4.2 nathanw lp->d_npartitions = RAW_PART + 1;
2229 1.88.4.2 nathanw
2230 1.88.4.2 nathanw lp->d_magic = DISKMAGIC;
2231 1.88.4.2 nathanw lp->d_magic2 = DISKMAGIC;
2232 1.88.4.2 nathanw lp->d_checksum = dkcksum(lp);
2233 1.88.4.2 nathanw
2234 1.88.4.2 nathanw /*
2235 1.88.4.2 nathanw * Call the generic disklabel extraction routine. If there's
2236 1.88.4.2 nathanw * not a label there, fake it.
2237 1.88.4.2 nathanw */
2238 1.88.4.2 nathanw if (readdisklabel(dev, fdstrategy, lp, clp) != NULL) {
2239 1.88.4.2 nathanw strncpy(lp->d_packname, "default label",
2240 1.88.4.2 nathanw sizeof(lp->d_packname));
2241 1.88.4.2 nathanw /*
2242 1.88.4.2 nathanw * Reset the partition info; it might have gotten
2243 1.88.4.2 nathanw * trashed in readdisklabel().
2244 1.88.4.2 nathanw *
2245 1.88.4.2 nathanw * XXX Why do we have to do this? readdisklabel()
2246 1.88.4.2 nathanw * should be safe...
2247 1.88.4.2 nathanw */
2248 1.88.4.2 nathanw for (i = 0; i < MAXPARTITIONS; ++i) {
2249 1.88.4.2 nathanw lp->d_partitions[i].p_offset = 0;
2250 1.88.4.2 nathanw if (i == RAW_PART) {
2251 1.88.4.2 nathanw lp->d_partitions[i].p_size =
2252 1.88.4.2 nathanw lp->d_secpercyl * lp->d_ncylinders;
2253 1.88.4.2 nathanw lp->d_partitions[i].p_fstype = FS_BSDFFS;
2254 1.88.4.2 nathanw } else {
2255 1.88.4.2 nathanw lp->d_partitions[i].p_size = 0;
2256 1.88.4.2 nathanw lp->d_partitions[i].p_fstype = FS_UNUSED;
2257 1.88.4.2 nathanw }
2258 1.88.4.2 nathanw }
2259 1.88.4.2 nathanw lp->d_npartitions = RAW_PART + 1;
2260 1.88.4.2 nathanw }
2261 1.88.4.2 nathanw }
2262 1.88.4.2 nathanw
2263 1.88.4.2 nathanw void
2264 1.88.4.2 nathanw fd_do_eject(fd)
2265 1.88.4.2 nathanw struct fd_softc *fd;
2266 1.88.4.2 nathanw {
2267 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
2268 1.88.4.2 nathanw
2269 1.88.4.2 nathanw if (CPU_ISSUN4C) {
2270 1.88.4.2 nathanw auxregbisc(AUXIO4C_FDS, AUXIO4C_FEJ);
2271 1.88.4.2 nathanw delay(10);
2272 1.88.4.2 nathanw auxregbisc(AUXIO4C_FEJ, AUXIO4C_FDS);
2273 1.88.4.2 nathanw return;
2274 1.88.4.2 nathanw }
2275 1.88.4.2 nathanw if (CPU_ISSUN4M && (fdc->sc_flags & FDC_82077) != 0) {
2276 1.88.4.2 nathanw bus_space_tag_t t = fdc->sc_bustag;
2277 1.88.4.2 nathanw bus_space_handle_t h = fdc->sc_handle;
2278 1.88.4.2 nathanw u_int8_t dor = FDO_FRST | FDO_FDMAEN | FDO_MOEN(0);
2279 1.88.4.2 nathanw
2280 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_dor, dor | FDO_EJ);
2281 1.88.4.2 nathanw delay(10);
2282 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_dor, FDO_FRST | FDO_DS);
2283 1.88.4.2 nathanw return;
2284 1.88.4.2 nathanw }
2285 1.88.4.2 nathanw }
2286 1.88.4.2 nathanw
2287 1.88.4.2 nathanw #ifdef MEMORY_DISK_HOOKS
2288 1.88.4.2 nathanw int fd_read_md_image __P((size_t *, caddr_t *));
2289 1.88.4.2 nathanw #endif
2290 1.88.4.2 nathanw
2291 1.88.4.2 nathanw /* ARGSUSED */
2292 1.88.4.2 nathanw void
2293 1.88.4.2 nathanw fd_mountroot_hook(dev)
2294 1.88.4.2 nathanw struct device *dev;
2295 1.88.4.2 nathanw {
2296 1.88.4.2 nathanw int c;
2297 1.88.4.2 nathanw
2298 1.88.4.2 nathanw fd_do_eject((struct fd_softc *)dev);
2299 1.88.4.2 nathanw printf("Insert filesystem floppy and press return.");
2300 1.88.4.2 nathanw for (;;) {
2301 1.88.4.2 nathanw c = cngetc();
2302 1.88.4.2 nathanw if ((c == '\r') || (c == '\n')) {
2303 1.88.4.2 nathanw printf("\n");
2304 1.88.4.2 nathanw break;
2305 1.88.4.2 nathanw }
2306 1.88.4.2 nathanw }
2307 1.88.4.2 nathanw }
2308 1.88.4.2 nathanw
2309 1.88.4.2 nathanw #ifdef MEMORY_DISK_HOOKS
2310 1.88.4.2 nathanw
2311 1.88.4.2 nathanw #define FDMICROROOTSIZE ((2*18*80) << DEV_BSHIFT)
2312 1.88.4.2 nathanw
2313 1.88.4.2 nathanw int
2314 1.88.4.2 nathanw fd_read_md_image(sizep, addrp)
2315 1.88.4.2 nathanw size_t *sizep;
2316 1.88.4.2 nathanw caddr_t *addrp;
2317 1.88.4.2 nathanw {
2318 1.88.4.2 nathanw struct buf buf, *bp = &buf;
2319 1.88.4.2 nathanw dev_t dev;
2320 1.88.4.2 nathanw off_t offset;
2321 1.88.4.2 nathanw caddr_t addr;
2322 1.88.4.2 nathanw
2323 1.88.4.2 nathanw dev = makedev(54,0); /* XXX */
2324 1.88.4.2 nathanw
2325 1.88.4.2 nathanw MALLOC(addr, caddr_t, FDMICROROOTSIZE, M_DEVBUF, M_WAITOK);
2326 1.88.4.2 nathanw *addrp = addr;
2327 1.88.4.2 nathanw
2328 1.88.4.2 nathanw if (fdopen(dev, 0, S_IFCHR, NULL))
2329 1.88.4.2 nathanw panic("fd: mountroot: fdopen");
2330 1.88.4.2 nathanw
2331 1.88.4.2 nathanw offset = 0;
2332 1.88.4.2 nathanw
2333 1.88.4.2 nathanw for (;;) {
2334 1.88.4.2 nathanw bp->b_dev = dev;
2335 1.88.4.2 nathanw bp->b_error = 0;
2336 1.88.4.2 nathanw bp->b_resid = 0;
2337 1.88.4.2 nathanw bp->b_proc = NULL;
2338 1.88.4.2 nathanw bp->b_flags = B_BUSY | B_PHYS | B_RAW | B_READ;
2339 1.88.4.2 nathanw bp->b_blkno = btodb(offset);
2340 1.88.4.2 nathanw bp->b_bcount = DEV_BSIZE;
2341 1.88.4.2 nathanw bp->b_data = addr;
2342 1.88.4.2 nathanw fdstrategy(bp);
2343 1.88.4.2 nathanw while ((bp->b_flags & B_DONE) == 0) {
2344 1.88.4.2 nathanw tsleep((caddr_t)bp, PRIBIO + 1, "physio", 0);
2345 1.88.4.2 nathanw }
2346 1.88.4.2 nathanw if (bp->b_error)
2347 1.88.4.2 nathanw panic("fd: mountroot: fdread error %d", bp->b_error);
2348 1.88.4.2 nathanw
2349 1.88.4.2 nathanw if (bp->b_resid != 0)
2350 1.88.4.2 nathanw break;
2351 1.88.4.2 nathanw
2352 1.88.4.2 nathanw addr += DEV_BSIZE;
2353 1.88.4.2 nathanw offset += DEV_BSIZE;
2354 1.88.4.2 nathanw if (offset + DEV_BSIZE > FDMICROROOTSIZE)
2355 1.88.4.2 nathanw break;
2356 1.88.4.2 nathanw }
2357 1.88.4.2 nathanw (void)fdclose(dev, 0, S_IFCHR, NULL);
2358 1.88.4.2 nathanw *sizep = offset;
2359 1.88.4.2 nathanw fd_do_eject(fd_cd.cd_devs[FDUNIT(dev)]);
2360 1.88.4.2 nathanw return (0);
2361 1.88.4.2 nathanw }
2362 1.88.4.2 nathanw #endif
2363