fd.c revision 1.88.4.5 1 1.88.4.5 nathanw /* $NetBSD: fd.c,v 1.88.4.5 2002/10/18 02:39:54 nathanw Exp $ */
2 1.88.4.2 nathanw
3 1.88.4.2 nathanw /*-
4 1.88.4.2 nathanw * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.88.4.2 nathanw * All rights reserved.
6 1.88.4.2 nathanw *
7 1.88.4.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.88.4.2 nathanw * by Paul Kranenburg.
9 1.88.4.2 nathanw *
10 1.88.4.2 nathanw * Redistribution and use in source and binary forms, with or without
11 1.88.4.2 nathanw * modification, are permitted provided that the following conditions
12 1.88.4.2 nathanw * are met:
13 1.88.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
14 1.88.4.2 nathanw * notice, this list of conditions and the following disclaimer.
15 1.88.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
16 1.88.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
17 1.88.4.2 nathanw * documentation and/or other materials provided with the distribution.
18 1.88.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
19 1.88.4.2 nathanw * must display the following acknowledgement:
20 1.88.4.2 nathanw * This product includes software developed by the NetBSD
21 1.88.4.2 nathanw * Foundation, Inc. and its contributors.
22 1.88.4.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.88.4.2 nathanw * contributors may be used to endorse or promote products derived
24 1.88.4.2 nathanw * from this software without specific prior written permission.
25 1.88.4.2 nathanw *
26 1.88.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.88.4.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.88.4.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.88.4.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.88.4.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.88.4.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.88.4.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.88.4.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.88.4.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.88.4.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.88.4.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
37 1.88.4.2 nathanw */
38 1.88.4.2 nathanw
39 1.88.4.2 nathanw /*-
40 1.88.4.2 nathanw * Copyright (c) 1993, 1994, 1995 Charles M. Hannum.
41 1.88.4.2 nathanw * Copyright (c) 1995 Paul Kranenburg.
42 1.88.4.2 nathanw * Copyright (c) 1990 The Regents of the University of California.
43 1.88.4.2 nathanw * All rights reserved.
44 1.88.4.2 nathanw *
45 1.88.4.2 nathanw * This code is derived from software contributed to Berkeley by
46 1.88.4.2 nathanw * Don Ahn.
47 1.88.4.2 nathanw *
48 1.88.4.2 nathanw * Redistribution and use in source and binary forms, with or without
49 1.88.4.2 nathanw * modification, are permitted provided that the following conditions
50 1.88.4.2 nathanw * are met:
51 1.88.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
52 1.88.4.2 nathanw * notice, this list of conditions and the following disclaimer.
53 1.88.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
54 1.88.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
55 1.88.4.2 nathanw * documentation and/or other materials provided with the distribution.
56 1.88.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
57 1.88.4.2 nathanw * must display the following acknowledgement:
58 1.88.4.2 nathanw * This product includes software developed by the University of
59 1.88.4.2 nathanw * California, Berkeley and its contributors.
60 1.88.4.2 nathanw * 4. Neither the name of the University nor the names of its contributors
61 1.88.4.2 nathanw * may be used to endorse or promote products derived from this software
62 1.88.4.2 nathanw * without specific prior written permission.
63 1.88.4.2 nathanw *
64 1.88.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
65 1.88.4.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 1.88.4.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 1.88.4.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
68 1.88.4.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 1.88.4.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 1.88.4.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 1.88.4.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 1.88.4.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 1.88.4.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
74 1.88.4.2 nathanw * SUCH DAMAGE.
75 1.88.4.2 nathanw *
76 1.88.4.2 nathanw * @(#)fd.c 7.4 (Berkeley) 5/25/91
77 1.88.4.2 nathanw */
78 1.88.4.2 nathanw
79 1.88.4.2 nathanw #include "opt_ddb.h"
80 1.88.4.2 nathanw #include "opt_md.h"
81 1.88.4.2 nathanw
82 1.88.4.2 nathanw #include <sys/param.h>
83 1.88.4.2 nathanw #include <sys/systm.h>
84 1.88.4.2 nathanw #include <sys/callout.h>
85 1.88.4.2 nathanw #include <sys/kernel.h>
86 1.88.4.2 nathanw #include <sys/file.h>
87 1.88.4.2 nathanw #include <sys/ioctl.h>
88 1.88.4.2 nathanw #include <sys/device.h>
89 1.88.4.2 nathanw #include <sys/disklabel.h>
90 1.88.4.2 nathanw #include <sys/dkstat.h>
91 1.88.4.2 nathanw #include <sys/disk.h>
92 1.88.4.2 nathanw #include <sys/fdio.h>
93 1.88.4.2 nathanw #include <sys/buf.h>
94 1.88.4.2 nathanw #include <sys/malloc.h>
95 1.88.4.2 nathanw #include <sys/proc.h>
96 1.88.4.2 nathanw #include <sys/uio.h>
97 1.88.4.2 nathanw #include <sys/stat.h>
98 1.88.4.2 nathanw #include <sys/syslog.h>
99 1.88.4.2 nathanw #include <sys/queue.h>
100 1.88.4.2 nathanw #include <sys/conf.h>
101 1.88.4.2 nathanw
102 1.88.4.2 nathanw #include <dev/cons.h>
103 1.88.4.2 nathanw
104 1.88.4.2 nathanw #include <uvm/uvm_extern.h>
105 1.88.4.2 nathanw
106 1.88.4.2 nathanw #include <machine/autoconf.h>
107 1.88.4.2 nathanw #include <machine/intr.h>
108 1.88.4.2 nathanw
109 1.88.4.2 nathanw #include <sparc/sparc/auxreg.h>
110 1.88.4.2 nathanw #include <sparc/dev/fdreg.h>
111 1.88.4.2 nathanw #include <sparc/dev/fdvar.h>
112 1.88.4.2 nathanw
113 1.88.4.2 nathanw #define FDUNIT(dev) (minor(dev) / 8)
114 1.88.4.2 nathanw #define FDTYPE(dev) (minor(dev) % 8)
115 1.88.4.2 nathanw
116 1.88.4.2 nathanw /* XXX misuse a flag to identify format operation */
117 1.88.4.2 nathanw #define B_FORMAT B_XXX
118 1.88.4.2 nathanw
119 1.88.4.2 nathanw #define FD_DEBUG
120 1.88.4.2 nathanw #ifdef FD_DEBUG
121 1.88.4.2 nathanw int fdc_debug = 0;
122 1.88.4.2 nathanw #endif
123 1.88.4.2 nathanw
124 1.88.4.2 nathanw enum fdc_state {
125 1.88.4.2 nathanw DEVIDLE = 0,
126 1.88.4.2 nathanw MOTORWAIT, /* 1 */
127 1.88.4.2 nathanw DOSEEK, /* 2 */
128 1.88.4.2 nathanw SEEKWAIT, /* 3 */
129 1.88.4.2 nathanw SEEKTIMEDOUT, /* 4 */
130 1.88.4.2 nathanw SEEKCOMPLETE, /* 5 */
131 1.88.4.2 nathanw DOIO, /* 6 */
132 1.88.4.2 nathanw IOCOMPLETE, /* 7 */
133 1.88.4.2 nathanw IOTIMEDOUT, /* 8 */
134 1.88.4.2 nathanw IOCLEANUPWAIT, /* 9 */
135 1.88.4.2 nathanw IOCLEANUPTIMEDOUT,/*10 */
136 1.88.4.2 nathanw DORESET, /* 11 */
137 1.88.4.2 nathanw RESETCOMPLETE, /* 12 */
138 1.88.4.2 nathanw RESETTIMEDOUT, /* 13 */
139 1.88.4.2 nathanw DORECAL, /* 14 */
140 1.88.4.2 nathanw RECALWAIT, /* 15 */
141 1.88.4.2 nathanw RECALTIMEDOUT, /* 16 */
142 1.88.4.2 nathanw RECALCOMPLETE, /* 17 */
143 1.88.4.2 nathanw };
144 1.88.4.2 nathanw
145 1.88.4.2 nathanw /* software state, per controller */
146 1.88.4.2 nathanw struct fdc_softc {
147 1.88.4.2 nathanw struct device sc_dev; /* boilerplate */
148 1.88.4.2 nathanw bus_space_tag_t sc_bustag;
149 1.88.4.2 nathanw
150 1.88.4.2 nathanw struct callout sc_timo_ch; /* timeout callout */
151 1.88.4.2 nathanw struct callout sc_intr_ch; /* pseudo-intr callout */
152 1.88.4.2 nathanw
153 1.88.4.2 nathanw struct fd_softc *sc_fd[4]; /* pointers to children */
154 1.88.4.2 nathanw TAILQ_HEAD(drivehead, fd_softc) sc_drives;
155 1.88.4.2 nathanw enum fdc_state sc_state;
156 1.88.4.2 nathanw int sc_flags;
157 1.88.4.2 nathanw #define FDC_82077 0x01
158 1.88.4.2 nathanw #define FDC_NEEDHEADSETTLE 0x02
159 1.88.4.2 nathanw #define FDC_EIS 0x04
160 1.88.4.2 nathanw #define FDC_NEEDMOTORWAIT 0x08
161 1.88.4.2 nathanw int sc_errors; /* number of retries so far */
162 1.88.4.2 nathanw int sc_overruns; /* number of DMA overruns */
163 1.88.4.2 nathanw int sc_cfg; /* current configuration */
164 1.88.4.2 nathanw struct fdcio sc_io;
165 1.88.4.2 nathanw #define sc_handle sc_io.fdcio_handle
166 1.88.4.2 nathanw #define sc_reg_msr sc_io.fdcio_reg_msr
167 1.88.4.2 nathanw #define sc_reg_fifo sc_io.fdcio_reg_fifo
168 1.88.4.2 nathanw #define sc_reg_dor sc_io.fdcio_reg_dor
169 1.88.4.2 nathanw #define sc_reg_drs sc_io.fdcio_reg_msr
170 1.88.4.2 nathanw #define sc_itask sc_io.fdcio_itask
171 1.88.4.2 nathanw #define sc_istatus sc_io.fdcio_istatus
172 1.88.4.2 nathanw #define sc_data sc_io.fdcio_data
173 1.88.4.2 nathanw #define sc_tc sc_io.fdcio_tc
174 1.88.4.2 nathanw #define sc_nstat sc_io.fdcio_nstat
175 1.88.4.2 nathanw #define sc_status sc_io.fdcio_status
176 1.88.4.2 nathanw #define sc_intrcnt sc_io.fdcio_intrcnt
177 1.88.4.2 nathanw };
178 1.88.4.2 nathanw
179 1.88.4.2 nathanw extern struct fdcio *fdciop; /* I/O descriptor used in fdintr.s */
180 1.88.4.2 nathanw
181 1.88.4.2 nathanw /* controller driver configuration */
182 1.88.4.2 nathanw int fdcmatch_mainbus __P((struct device *, struct cfdata *, void *));
183 1.88.4.2 nathanw int fdcmatch_obio __P((struct device *, struct cfdata *, void *));
184 1.88.4.2 nathanw void fdcattach_mainbus __P((struct device *, struct device *, void *));
185 1.88.4.2 nathanw void fdcattach_obio __P((struct device *, struct device *, void *));
186 1.88.4.2 nathanw
187 1.88.4.2 nathanw int fdcattach __P((struct fdc_softc *, int));
188 1.88.4.2 nathanw
189 1.88.4.5 nathanw CFATTACH_DECL(fdc_mainbus, sizeof(struct fdc_softc),
190 1.88.4.5 nathanw fdcmatch_mainbus, fdcattach_mainbus, NULL, NULL);
191 1.88.4.5 nathanw
192 1.88.4.5 nathanw CFATTACH_DECL(fdc_obio, sizeof(struct fdc_softc),
193 1.88.4.5 nathanw fdcmatch_obio, fdcattach_obio, NULL, NULL);
194 1.88.4.2 nathanw
195 1.88.4.2 nathanw __inline struct fd_type *fd_dev_to_type __P((struct fd_softc *, dev_t));
196 1.88.4.2 nathanw
197 1.88.4.2 nathanw /*
198 1.88.4.2 nathanw * Floppies come in various flavors, e.g., 1.2MB vs 1.44MB; here is how
199 1.88.4.2 nathanw * we tell them apart.
200 1.88.4.2 nathanw */
201 1.88.4.2 nathanw struct fd_type {
202 1.88.4.2 nathanw int sectrac; /* sectors per track */
203 1.88.4.2 nathanw int heads; /* number of heads */
204 1.88.4.2 nathanw int seccyl; /* sectors per cylinder */
205 1.88.4.2 nathanw int secsize; /* size code for sectors */
206 1.88.4.2 nathanw int datalen; /* data len when secsize = 0 */
207 1.88.4.2 nathanw int steprate; /* step rate and head unload time */
208 1.88.4.2 nathanw int gap1; /* gap len between sectors */
209 1.88.4.2 nathanw int gap2; /* formatting gap */
210 1.88.4.2 nathanw int cylinders; /* total num of cylinders */
211 1.88.4.2 nathanw int size; /* size of disk in sectors */
212 1.88.4.2 nathanw int step; /* steps per cylinder */
213 1.88.4.2 nathanw int rate; /* transfer speed code */
214 1.88.4.2 nathanw int fillbyte; /* format fill byte */
215 1.88.4.2 nathanw int interleave; /* interleave factor (formatting) */
216 1.88.4.2 nathanw char *name;
217 1.88.4.2 nathanw };
218 1.88.4.2 nathanw
219 1.88.4.2 nathanw /* The order of entries in the following table is important -- BEWARE! */
220 1.88.4.2 nathanw struct fd_type fd_types[] = {
221 1.88.4.2 nathanw { 18,2,36,2,0xff,0xcf,0x1b,0x54,80,2880,1,FDC_500KBPS,0xf6,1, "1.44MB" }, /* 1.44MB diskette */
222 1.88.4.2 nathanw { 9,2,18,2,0xff,0xdf,0x2a,0x50,80,1440,1,FDC_250KBPS,0xf6,1, "720KB" }, /* 3.5" 720kB diskette */
223 1.88.4.2 nathanw { 9,2,18,2,0xff,0xdf,0x2a,0x50,40, 720,2,FDC_250KBPS,0xf6,1, "360KB/x" }, /* 360kB in 720kB drive */
224 1.88.4.2 nathanw { 8,2,16,3,0xff,0xdf,0x35,0x74,77,1232,1,FDC_500KBPS,0xf6,1, "1.2MB/NEC" } /* 1.2 MB japanese format */
225 1.88.4.2 nathanw };
226 1.88.4.2 nathanw
227 1.88.4.2 nathanw /* software state, per disk (with up to 4 disks per ctlr) */
228 1.88.4.2 nathanw struct fd_softc {
229 1.88.4.2 nathanw struct device sc_dv; /* generic device info */
230 1.88.4.2 nathanw struct disk sc_dk; /* generic disk info */
231 1.88.4.2 nathanw
232 1.88.4.2 nathanw struct fd_type *sc_deftype; /* default type descriptor */
233 1.88.4.2 nathanw struct fd_type *sc_type; /* current type descriptor */
234 1.88.4.2 nathanw
235 1.88.4.2 nathanw struct callout sc_motoron_ch;
236 1.88.4.2 nathanw struct callout sc_motoroff_ch;
237 1.88.4.2 nathanw
238 1.88.4.2 nathanw daddr_t sc_blkno; /* starting block number */
239 1.88.4.2 nathanw int sc_bcount; /* byte count left */
240 1.88.4.2 nathanw int sc_skip; /* bytes already transferred */
241 1.88.4.2 nathanw int sc_nblks; /* number of blocks currently transferring */
242 1.88.4.2 nathanw int sc_nbytes; /* number of bytes currently transferring */
243 1.88.4.2 nathanw
244 1.88.4.2 nathanw int sc_drive; /* physical unit number */
245 1.88.4.2 nathanw int sc_flags;
246 1.88.4.2 nathanw #define FD_OPEN 0x01 /* it's open */
247 1.88.4.2 nathanw #define FD_MOTOR 0x02 /* motor should be on */
248 1.88.4.2 nathanw #define FD_MOTOR_WAIT 0x04 /* motor coming up */
249 1.88.4.2 nathanw int sc_cylin; /* where we think the head is */
250 1.88.4.2 nathanw int sc_opts; /* user-set options */
251 1.88.4.2 nathanw
252 1.88.4.2 nathanw void *sc_sdhook; /* shutdownhook cookie */
253 1.88.4.2 nathanw
254 1.88.4.2 nathanw TAILQ_ENTRY(fd_softc) sc_drivechain;
255 1.88.4.2 nathanw int sc_ops; /* I/O ops since last switch */
256 1.88.4.3 nathanw struct bufq_state sc_q; /* pending I/O requests */
257 1.88.4.2 nathanw int sc_active; /* number of active I/O requests */
258 1.88.4.2 nathanw };
259 1.88.4.2 nathanw
260 1.88.4.2 nathanw /* floppy driver configuration */
261 1.88.4.2 nathanw int fdmatch __P((struct device *, struct cfdata *, void *));
262 1.88.4.2 nathanw void fdattach __P((struct device *, struct device *, void *));
263 1.88.4.2 nathanw
264 1.88.4.5 nathanw CFATTACH_DECL(fd, sizeof(struct fd_softc),
265 1.88.4.5 nathanw fdmatch, fdattach, NULL, NULL);
266 1.88.4.2 nathanw
267 1.88.4.2 nathanw extern struct cfdriver fd_cd;
268 1.88.4.2 nathanw
269 1.88.4.4 nathanw dev_type_open(fdopen);
270 1.88.4.4 nathanw dev_type_close(fdclose);
271 1.88.4.4 nathanw dev_type_read(fdread);
272 1.88.4.4 nathanw dev_type_write(fdwrite);
273 1.88.4.4 nathanw dev_type_ioctl(fdioctl);
274 1.88.4.4 nathanw dev_type_strategy(fdstrategy);
275 1.88.4.4 nathanw
276 1.88.4.4 nathanw const struct bdevsw fd_bdevsw = {
277 1.88.4.4 nathanw fdopen, fdclose, fdstrategy, fdioctl, nodump, nosize, D_DISK
278 1.88.4.4 nathanw };
279 1.88.4.4 nathanw
280 1.88.4.4 nathanw const struct cdevsw fd_cdevsw = {
281 1.88.4.4 nathanw fdopen, fdclose, fdread, fdwrite, fdioctl,
282 1.88.4.4 nathanw nostop, notty, nopoll, nommap, D_DISK
283 1.88.4.4 nathanw };
284 1.88.4.4 nathanw
285 1.88.4.2 nathanw void fdgetdisklabel __P((dev_t));
286 1.88.4.2 nathanw int fd_get_parms __P((struct fd_softc *));
287 1.88.4.2 nathanw void fdstart __P((struct fd_softc *));
288 1.88.4.2 nathanw int fdprint __P((void *, const char *));
289 1.88.4.2 nathanw
290 1.88.4.2 nathanw struct dkdriver fddkdriver = { fdstrategy };
291 1.88.4.2 nathanw
292 1.88.4.2 nathanw struct fd_type *fd_nvtotype __P((char *, int, int));
293 1.88.4.2 nathanw void fd_set_motor __P((struct fdc_softc *fdc));
294 1.88.4.2 nathanw void fd_motor_off __P((void *arg));
295 1.88.4.2 nathanw void fd_motor_on __P((void *arg));
296 1.88.4.2 nathanw int fdcresult __P((struct fdc_softc *fdc));
297 1.88.4.2 nathanw int fdc_wrfifo __P((struct fdc_softc *fdc, u_char x));
298 1.88.4.2 nathanw void fdcstart __P((struct fdc_softc *fdc));
299 1.88.4.2 nathanw void fdcstatus __P((struct fdc_softc *fdc, char *s));
300 1.88.4.2 nathanw void fdc_reset __P((struct fdc_softc *fdc));
301 1.88.4.2 nathanw void fdctimeout __P((void *arg));
302 1.88.4.2 nathanw void fdcpseudointr __P((void *arg));
303 1.88.4.2 nathanw int fdc_c_hwintr __P((void *));
304 1.88.4.2 nathanw void fdchwintr __P((void));
305 1.88.4.2 nathanw int fdcswintr __P((void *));
306 1.88.4.2 nathanw int fdcstate __P((struct fdc_softc *));
307 1.88.4.2 nathanw void fdcretry __P((struct fdc_softc *fdc));
308 1.88.4.2 nathanw void fdfinish __P((struct fd_softc *fd, struct buf *bp));
309 1.88.4.2 nathanw int fdformat __P((dev_t, struct ne7_fd_formb *, struct proc *));
310 1.88.4.2 nathanw void fd_do_eject __P((struct fd_softc *));
311 1.88.4.2 nathanw void fd_mountroot_hook __P((struct device *));
312 1.88.4.2 nathanw static int fdconf __P((struct fdc_softc *));
313 1.88.4.2 nathanw static void establish_chip_type __P((
314 1.88.4.2 nathanw struct fdc_softc *,
315 1.88.4.2 nathanw bus_space_tag_t,
316 1.88.4.2 nathanw bus_addr_t,
317 1.88.4.2 nathanw bus_size_t,
318 1.88.4.2 nathanw bus_space_handle_t));
319 1.88.4.2 nathanw
320 1.88.4.2 nathanw
321 1.88.4.2 nathanw #if PIL_FDSOFT == 4
322 1.88.4.2 nathanw #define IE_FDSOFT IE_L4
323 1.88.4.2 nathanw #else
324 1.88.4.2 nathanw #error 4
325 1.88.4.2 nathanw #endif
326 1.88.4.2 nathanw
327 1.88.4.2 nathanw #if defined(SUN4M)
328 1.88.4.2 nathanw #define FD_SET_SWINTR do { \
329 1.88.4.2 nathanw if (CPU_ISSUN4M) \
330 1.88.4.2 nathanw raise(0, PIL_FDSOFT); \
331 1.88.4.2 nathanw else \
332 1.88.4.2 nathanw ienab_bis(IE_L4); \
333 1.88.4.2 nathanw } while(0)
334 1.88.4.2 nathanw #else
335 1.88.4.2 nathanw #define FD_SET_SWINTR ienab_bis(IE_FDSOFT)
336 1.88.4.2 nathanw #endif /* defined(SUN4M) */
337 1.88.4.2 nathanw
338 1.88.4.2 nathanw #define OBP_FDNAME (CPU_ISSUN4M ? "SUNW,fdtwo" : "fd")
339 1.88.4.2 nathanw
340 1.88.4.2 nathanw int
341 1.88.4.2 nathanw fdcmatch_mainbus(parent, match, aux)
342 1.88.4.2 nathanw struct device *parent;
343 1.88.4.2 nathanw struct cfdata *match;
344 1.88.4.2 nathanw void *aux;
345 1.88.4.2 nathanw {
346 1.88.4.2 nathanw struct mainbus_attach_args *ma = aux;
347 1.88.4.2 nathanw
348 1.88.4.2 nathanw /*
349 1.88.4.2 nathanw * Floppy controller is on mainbus on sun4c.
350 1.88.4.2 nathanw */
351 1.88.4.2 nathanw if (!CPU_ISSUN4C)
352 1.88.4.2 nathanw return (0);
353 1.88.4.2 nathanw
354 1.88.4.2 nathanw /* sun4c PROMs call the controller "fd" */
355 1.88.4.2 nathanw if (strcmp("fd", ma->ma_name) != 0)
356 1.88.4.2 nathanw return (0);
357 1.88.4.2 nathanw
358 1.88.4.2 nathanw return (bus_space_probe(ma->ma_bustag,
359 1.88.4.2 nathanw ma->ma_paddr,
360 1.88.4.2 nathanw 1, /* probe size */
361 1.88.4.2 nathanw 0, /* offset */
362 1.88.4.2 nathanw 0, /* flags */
363 1.88.4.2 nathanw NULL, NULL));
364 1.88.4.2 nathanw }
365 1.88.4.2 nathanw
366 1.88.4.2 nathanw int
367 1.88.4.2 nathanw fdcmatch_obio(parent, match, aux)
368 1.88.4.2 nathanw struct device *parent;
369 1.88.4.2 nathanw struct cfdata *match;
370 1.88.4.2 nathanw void *aux;
371 1.88.4.2 nathanw {
372 1.88.4.2 nathanw union obio_attach_args *uoba = aux;
373 1.88.4.2 nathanw struct sbus_attach_args *sa;
374 1.88.4.2 nathanw
375 1.88.4.2 nathanw /*
376 1.88.4.2 nathanw * Floppy controller is on obio on sun4m.
377 1.88.4.2 nathanw */
378 1.88.4.2 nathanw if (uoba->uoba_isobio4 != 0)
379 1.88.4.2 nathanw return (0);
380 1.88.4.2 nathanw
381 1.88.4.2 nathanw sa = &uoba->uoba_sbus;
382 1.88.4.2 nathanw
383 1.88.4.2 nathanw /* sun4m PROMs call the controller "SUNW,fdtwo" */
384 1.88.4.2 nathanw if (strcmp("SUNW,fdtwo", sa->sa_name) != 0)
385 1.88.4.2 nathanw return (0);
386 1.88.4.2 nathanw
387 1.88.4.2 nathanw return (bus_space_probe(sa->sa_bustag,
388 1.88.4.2 nathanw sbus_bus_addr(sa->sa_bustag,
389 1.88.4.2 nathanw sa->sa_slot, sa->sa_offset),
390 1.88.4.2 nathanw 1, /* probe size */
391 1.88.4.2 nathanw 0, /* offset */
392 1.88.4.2 nathanw 0, /* flags */
393 1.88.4.2 nathanw NULL, NULL));
394 1.88.4.2 nathanw }
395 1.88.4.2 nathanw
396 1.88.4.2 nathanw static void
397 1.88.4.2 nathanw establish_chip_type(fdc, tag, addr, size, handle)
398 1.88.4.2 nathanw struct fdc_softc *fdc;
399 1.88.4.2 nathanw bus_space_tag_t tag;
400 1.88.4.2 nathanw bus_addr_t addr;
401 1.88.4.2 nathanw bus_size_t size;
402 1.88.4.2 nathanw bus_space_handle_t handle;
403 1.88.4.2 nathanw {
404 1.88.4.2 nathanw u_int8_t v;
405 1.88.4.2 nathanw
406 1.88.4.2 nathanw /*
407 1.88.4.2 nathanw * This hack from Chris Torek: apparently DOR really
408 1.88.4.2 nathanw * addresses MSR/DRS on a 82072.
409 1.88.4.2 nathanw * We used to rely on the VERSION command to tell the
410 1.88.4.2 nathanw * difference (which did not work).
411 1.88.4.2 nathanw */
412 1.88.4.2 nathanw
413 1.88.4.2 nathanw /* First, check the size of the register bank */
414 1.88.4.2 nathanw if (size < 8)
415 1.88.4.2 nathanw /* It isn't a 82077 */
416 1.88.4.2 nathanw return;
417 1.88.4.2 nathanw
418 1.88.4.2 nathanw /* Then probe the DOR register offset */
419 1.88.4.2 nathanw if (bus_space_probe(tag, addr,
420 1.88.4.2 nathanw 1, /* probe size */
421 1.88.4.2 nathanw FDREG77_DOR, /* offset */
422 1.88.4.2 nathanw 0, /* flags */
423 1.88.4.2 nathanw NULL, NULL) == 0) {
424 1.88.4.2 nathanw
425 1.88.4.2 nathanw /* It isn't a 82077 */
426 1.88.4.2 nathanw return;
427 1.88.4.2 nathanw }
428 1.88.4.2 nathanw
429 1.88.4.2 nathanw v = bus_space_read_1(tag, handle, FDREG77_DOR);
430 1.88.4.2 nathanw if (v == NE7_RQM) {
431 1.88.4.2 nathanw /*
432 1.88.4.2 nathanw * Value in DOR looks like it's really MSR
433 1.88.4.2 nathanw */
434 1.88.4.2 nathanw bus_space_write_1(tag, handle, FDREG77_DOR, FDC_250KBPS);
435 1.88.4.2 nathanw v = bus_space_read_1(tag, handle, FDREG77_DOR);
436 1.88.4.2 nathanw if (v == NE7_RQM) {
437 1.88.4.2 nathanw /*
438 1.88.4.2 nathanw * The value in the DOR didn't stick;
439 1.88.4.2 nathanw * it isn't a 82077
440 1.88.4.2 nathanw */
441 1.88.4.2 nathanw return;
442 1.88.4.2 nathanw }
443 1.88.4.2 nathanw }
444 1.88.4.2 nathanw
445 1.88.4.2 nathanw fdc->sc_flags |= FDC_82077;
446 1.88.4.2 nathanw }
447 1.88.4.2 nathanw
448 1.88.4.2 nathanw /*
449 1.88.4.2 nathanw * Arguments passed between fdcattach and fdprobe.
450 1.88.4.2 nathanw */
451 1.88.4.2 nathanw struct fdc_attach_args {
452 1.88.4.2 nathanw int fa_drive;
453 1.88.4.2 nathanw struct fd_type *fa_deftype;
454 1.88.4.2 nathanw };
455 1.88.4.2 nathanw
456 1.88.4.2 nathanw /*
457 1.88.4.2 nathanw * Print the location of a disk drive (called just before attaching the
458 1.88.4.2 nathanw * the drive). If `fdc' is not NULL, the drive was found but was not
459 1.88.4.2 nathanw * in the system config file; print the drive name as well.
460 1.88.4.2 nathanw * Return QUIET (config_find ignores this if the device was configured) to
461 1.88.4.2 nathanw * avoid printing `fdN not configured' messages.
462 1.88.4.2 nathanw */
463 1.88.4.2 nathanw int
464 1.88.4.2 nathanw fdprint(aux, fdc)
465 1.88.4.2 nathanw void *aux;
466 1.88.4.2 nathanw const char *fdc;
467 1.88.4.2 nathanw {
468 1.88.4.2 nathanw register struct fdc_attach_args *fa = aux;
469 1.88.4.2 nathanw
470 1.88.4.2 nathanw if (!fdc)
471 1.88.4.2 nathanw printf(" drive %d", fa->fa_drive);
472 1.88.4.2 nathanw return (QUIET);
473 1.88.4.2 nathanw }
474 1.88.4.2 nathanw
475 1.88.4.2 nathanw /*
476 1.88.4.2 nathanw * Configure several parameters and features on the FDC.
477 1.88.4.2 nathanw * Return 0 on success.
478 1.88.4.2 nathanw */
479 1.88.4.2 nathanw static int
480 1.88.4.2 nathanw fdconf(fdc)
481 1.88.4.2 nathanw struct fdc_softc *fdc;
482 1.88.4.2 nathanw {
483 1.88.4.2 nathanw int vroom;
484 1.88.4.2 nathanw
485 1.88.4.2 nathanw if (fdc_wrfifo(fdc, NE7CMD_DUMPREG) || fdcresult(fdc) != 10)
486 1.88.4.2 nathanw return (-1);
487 1.88.4.2 nathanw
488 1.88.4.2 nathanw /*
489 1.88.4.2 nathanw * dumpreg[7] seems to be a motor-off timeout; set it to whatever
490 1.88.4.2 nathanw * the PROM thinks is appropriate.
491 1.88.4.2 nathanw */
492 1.88.4.2 nathanw if ((vroom = fdc->sc_status[7]) == 0)
493 1.88.4.2 nathanw vroom = 0x64;
494 1.88.4.2 nathanw
495 1.88.4.2 nathanw /* Configure controller to use FIFO and Implied Seek */
496 1.88.4.2 nathanw if (fdc_wrfifo(fdc, NE7CMD_CFG) != 0)
497 1.88.4.2 nathanw return (-1);
498 1.88.4.2 nathanw if (fdc_wrfifo(fdc, vroom) != 0)
499 1.88.4.2 nathanw return (-1);
500 1.88.4.2 nathanw if (fdc_wrfifo(fdc, fdc->sc_cfg) != 0)
501 1.88.4.2 nathanw return (-1);
502 1.88.4.2 nathanw if (fdc_wrfifo(fdc, 0) != 0) /* PRETRK */
503 1.88.4.2 nathanw return (-1);
504 1.88.4.2 nathanw /* No result phase for the NE7CMD_CFG command */
505 1.88.4.2 nathanw
506 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
507 1.88.4.2 nathanw /* Lock configuration across soft resets. */
508 1.88.4.2 nathanw if (fdc_wrfifo(fdc, NE7CMD_LOCK | CFG_LOCK) != 0 ||
509 1.88.4.2 nathanw fdcresult(fdc) != 1) {
510 1.88.4.2 nathanw #ifdef DEBUG
511 1.88.4.2 nathanw printf("fdconf: CFGLOCK failed");
512 1.88.4.2 nathanw #endif
513 1.88.4.2 nathanw return (-1);
514 1.88.4.2 nathanw }
515 1.88.4.2 nathanw }
516 1.88.4.2 nathanw
517 1.88.4.2 nathanw return (0);
518 1.88.4.2 nathanw #if 0
519 1.88.4.2 nathanw if (fdc_wrfifo(fdc, NE7CMD_VERSION) == 0 &&
520 1.88.4.2 nathanw fdcresult(fdc) == 1 && fdc->sc_status[0] == 0x90) {
521 1.88.4.2 nathanw if (fdc_debug)
522 1.88.4.2 nathanw printf("[version cmd]");
523 1.88.4.2 nathanw }
524 1.88.4.2 nathanw #endif
525 1.88.4.2 nathanw }
526 1.88.4.2 nathanw
527 1.88.4.2 nathanw void
528 1.88.4.2 nathanw fdcattach_mainbus(parent, self, aux)
529 1.88.4.2 nathanw struct device *parent, *self;
530 1.88.4.2 nathanw void *aux;
531 1.88.4.2 nathanw {
532 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)self;
533 1.88.4.2 nathanw struct mainbus_attach_args *ma = aux;
534 1.88.4.2 nathanw
535 1.88.4.2 nathanw fdc->sc_bustag = ma->ma_bustag;
536 1.88.4.2 nathanw
537 1.88.4.2 nathanw if (bus_space_map(
538 1.88.4.2 nathanw ma->ma_bustag,
539 1.88.4.2 nathanw ma->ma_paddr,
540 1.88.4.2 nathanw ma->ma_size,
541 1.88.4.2 nathanw BUS_SPACE_MAP_LINEAR,
542 1.88.4.2 nathanw &fdc->sc_handle) != 0) {
543 1.88.4.2 nathanw printf("%s: cannot map registers\n", self->dv_xname);
544 1.88.4.2 nathanw return;
545 1.88.4.2 nathanw }
546 1.88.4.2 nathanw
547 1.88.4.2 nathanw establish_chip_type(fdc,
548 1.88.4.2 nathanw ma->ma_bustag,
549 1.88.4.2 nathanw ma->ma_paddr,
550 1.88.4.2 nathanw ma->ma_size,
551 1.88.4.2 nathanw fdc->sc_handle);
552 1.88.4.2 nathanw
553 1.88.4.2 nathanw if (fdcattach(fdc, ma->ma_pri) != 0)
554 1.88.4.2 nathanw bus_space_unmap(ma->ma_bustag, fdc->sc_handle, ma->ma_size);
555 1.88.4.2 nathanw }
556 1.88.4.2 nathanw
557 1.88.4.2 nathanw void
558 1.88.4.2 nathanw fdcattach_obio(parent, self, aux)
559 1.88.4.2 nathanw struct device *parent, *self;
560 1.88.4.2 nathanw void *aux;
561 1.88.4.2 nathanw {
562 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)self;
563 1.88.4.2 nathanw union obio_attach_args *uoba = aux;
564 1.88.4.2 nathanw struct sbus_attach_args *sa = &uoba->uoba_sbus;
565 1.88.4.2 nathanw
566 1.88.4.2 nathanw if (sa->sa_nintr == 0) {
567 1.88.4.2 nathanw printf(": no interrupt line configured\n");
568 1.88.4.2 nathanw return;
569 1.88.4.2 nathanw }
570 1.88.4.2 nathanw
571 1.88.4.2 nathanw fdc->sc_bustag = sa->sa_bustag;
572 1.88.4.2 nathanw
573 1.88.4.2 nathanw if (sbus_bus_map(sa->sa_bustag,
574 1.88.4.2 nathanw sa->sa_slot, sa->sa_offset, sa->sa_size,
575 1.88.4.2 nathanw BUS_SPACE_MAP_LINEAR, &fdc->sc_handle) != 0) {
576 1.88.4.2 nathanw printf("%s: cannot map control registers\n",
577 1.88.4.2 nathanw self->dv_xname);
578 1.88.4.2 nathanw return;
579 1.88.4.2 nathanw }
580 1.88.4.2 nathanw
581 1.88.4.2 nathanw establish_chip_type(fdc,
582 1.88.4.2 nathanw sa->sa_bustag,
583 1.88.4.2 nathanw sbus_bus_addr(sa->sa_bustag, sa->sa_slot, sa->sa_offset),
584 1.88.4.2 nathanw sa->sa_size,
585 1.88.4.2 nathanw fdc->sc_handle);
586 1.88.4.2 nathanw
587 1.88.4.2 nathanw if (strcmp(PROM_getpropstring(sa->sa_node, "status"), "disabled") == 0) {
588 1.88.4.2 nathanw printf(": no drives attached\n");
589 1.88.4.2 nathanw return;
590 1.88.4.2 nathanw }
591 1.88.4.2 nathanw
592 1.88.4.2 nathanw if (fdcattach(fdc, sa->sa_pri) != 0)
593 1.88.4.2 nathanw bus_space_unmap(sa->sa_bustag, fdc->sc_handle, sa->sa_size);
594 1.88.4.2 nathanw }
595 1.88.4.2 nathanw
596 1.88.4.2 nathanw int
597 1.88.4.2 nathanw fdcattach(fdc, pri)
598 1.88.4.2 nathanw struct fdc_softc *fdc;
599 1.88.4.2 nathanw int pri;
600 1.88.4.2 nathanw {
601 1.88.4.2 nathanw struct fdc_attach_args fa;
602 1.88.4.2 nathanw int drive_attached;
603 1.88.4.2 nathanw char code;
604 1.88.4.2 nathanw
605 1.88.4.2 nathanw callout_init(&fdc->sc_timo_ch);
606 1.88.4.2 nathanw callout_init(&fdc->sc_intr_ch);
607 1.88.4.2 nathanw
608 1.88.4.2 nathanw fdc->sc_state = DEVIDLE;
609 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_NONE;
610 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_NONE;
611 1.88.4.2 nathanw fdc->sc_flags |= FDC_EIS;
612 1.88.4.2 nathanw TAILQ_INIT(&fdc->sc_drives);
613 1.88.4.2 nathanw
614 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
615 1.88.4.2 nathanw fdc->sc_reg_msr = FDREG77_MSR;
616 1.88.4.2 nathanw fdc->sc_reg_fifo = FDREG77_FIFO;
617 1.88.4.2 nathanw fdc->sc_reg_dor = FDREG77_DOR;
618 1.88.4.2 nathanw code = '7';
619 1.88.4.2 nathanw fdc->sc_flags |= FDC_NEEDMOTORWAIT;
620 1.88.4.2 nathanw } else {
621 1.88.4.2 nathanw fdc->sc_reg_msr = FDREG72_MSR;
622 1.88.4.2 nathanw fdc->sc_reg_fifo = FDREG72_FIFO;
623 1.88.4.2 nathanw fdc->sc_reg_dor = 0;
624 1.88.4.2 nathanw code = '2';
625 1.88.4.2 nathanw }
626 1.88.4.2 nathanw
627 1.88.4.2 nathanw printf(" softpri %d: chip 8207%c\n", PIL_FDSOFT, code);
628 1.88.4.2 nathanw
629 1.88.4.2 nathanw /*
630 1.88.4.2 nathanw * Configure controller; enable FIFO, Implied seek, no POLL mode?.
631 1.88.4.2 nathanw * Note: CFG_EFIFO is active-low, initial threshold value: 8
632 1.88.4.2 nathanw */
633 1.88.4.2 nathanw fdc->sc_cfg = CFG_EIS|/*CFG_EFIFO|*/CFG_POLL|(8 & CFG_THRHLD_MASK);
634 1.88.4.2 nathanw if (fdconf(fdc) != 0) {
635 1.88.4.2 nathanw printf("%s: no drives attached\n", fdc->sc_dev.dv_xname);
636 1.88.4.2 nathanw return (-1);
637 1.88.4.2 nathanw }
638 1.88.4.2 nathanw
639 1.88.4.2 nathanw fdciop = &fdc->sc_io;
640 1.88.4.2 nathanw if (bus_intr_establish(fdc->sc_bustag, pri, IPL_BIO,
641 1.88.4.2 nathanw BUS_INTR_ESTABLISH_FASTTRAP,
642 1.88.4.2 nathanw (int (*) __P((void *)))fdchwintr, NULL) == NULL) {
643 1.88.4.2 nathanw
644 1.88.4.2 nathanw printf("%s: notice: no fast trap handler slot available\n",
645 1.88.4.2 nathanw fdc->sc_dev.dv_xname);
646 1.88.4.2 nathanw if (bus_intr_establish(fdc->sc_bustag, pri, IPL_BIO, 0,
647 1.88.4.2 nathanw fdc_c_hwintr, fdc) == NULL) {
648 1.88.4.2 nathanw printf("%s: cannot register interrupt handler\n",
649 1.88.4.2 nathanw fdc->sc_dev.dv_xname);
650 1.88.4.2 nathanw return (-1);
651 1.88.4.2 nathanw }
652 1.88.4.2 nathanw }
653 1.88.4.2 nathanw
654 1.88.4.2 nathanw if (bus_intr_establish(fdc->sc_bustag, PIL_FDSOFT, IPL_BIO,
655 1.88.4.2 nathanw BUS_INTR_ESTABLISH_SOFTINTR,
656 1.88.4.2 nathanw fdcswintr, fdc) == NULL) {
657 1.88.4.2 nathanw printf("%s: cannot register interrupt handler\n",
658 1.88.4.2 nathanw fdc->sc_dev.dv_xname);
659 1.88.4.2 nathanw return (-1);
660 1.88.4.2 nathanw }
661 1.88.4.2 nathanw
662 1.88.4.2 nathanw evcnt_attach_dynamic(&fdc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
663 1.88.4.2 nathanw fdc->sc_dev.dv_xname, "intr");
664 1.88.4.2 nathanw
665 1.88.4.2 nathanw /* physical limit: four drives per controller. */
666 1.88.4.2 nathanw drive_attached = 0;
667 1.88.4.2 nathanw for (fa.fa_drive = 0; fa.fa_drive < 4; fa.fa_drive++) {
668 1.88.4.2 nathanw fa.fa_deftype = NULL; /* unknown */
669 1.88.4.2 nathanw fa.fa_deftype = &fd_types[0]; /* XXX */
670 1.88.4.2 nathanw if (config_found(&fdc->sc_dev, (void *)&fa, fdprint) != NULL)
671 1.88.4.2 nathanw drive_attached = 1;
672 1.88.4.2 nathanw }
673 1.88.4.2 nathanw
674 1.88.4.2 nathanw if (drive_attached == 0) {
675 1.88.4.2 nathanw /* XXX - dis-establish interrupts here */
676 1.88.4.2 nathanw /* return (-1); */
677 1.88.4.2 nathanw }
678 1.88.4.2 nathanw
679 1.88.4.2 nathanw return (0);
680 1.88.4.2 nathanw }
681 1.88.4.2 nathanw
682 1.88.4.2 nathanw int
683 1.88.4.2 nathanw fdmatch(parent, match, aux)
684 1.88.4.2 nathanw struct device *parent;
685 1.88.4.2 nathanw struct cfdata *match;
686 1.88.4.2 nathanw void *aux;
687 1.88.4.2 nathanw {
688 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)parent;
689 1.88.4.2 nathanw bus_space_tag_t t = fdc->sc_bustag;
690 1.88.4.2 nathanw bus_space_handle_t h = fdc->sc_handle;
691 1.88.4.2 nathanw struct fdc_attach_args *fa = aux;
692 1.88.4.2 nathanw int drive = fa->fa_drive;
693 1.88.4.2 nathanw int n, ok;
694 1.88.4.2 nathanw
695 1.88.4.2 nathanw if (drive > 0)
696 1.88.4.2 nathanw /* XXX - for now, punt on more than one drive */
697 1.88.4.2 nathanw return (0);
698 1.88.4.2 nathanw
699 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
700 1.88.4.2 nathanw /* select drive and turn on motor */
701 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_dor,
702 1.88.4.2 nathanw drive | FDO_FRST | FDO_MOEN(drive));
703 1.88.4.2 nathanw /* wait for motor to spin up */
704 1.88.4.2 nathanw delay(250000);
705 1.88.4.2 nathanw } else {
706 1.88.4.2 nathanw auxregbisc(AUXIO4C_FDS, 0);
707 1.88.4.2 nathanw }
708 1.88.4.2 nathanw fdc->sc_nstat = 0;
709 1.88.4.2 nathanw fdc_wrfifo(fdc, NE7CMD_RECAL);
710 1.88.4.2 nathanw fdc_wrfifo(fdc, drive);
711 1.88.4.2 nathanw
712 1.88.4.2 nathanw /* Wait for recalibration to complete */
713 1.88.4.2 nathanw for (n = 0; n < 10000; n++) {
714 1.88.4.2 nathanw u_int8_t v;
715 1.88.4.2 nathanw
716 1.88.4.2 nathanw delay(1000);
717 1.88.4.2 nathanw v = bus_space_read_1(t, h, fdc->sc_reg_msr);
718 1.88.4.2 nathanw if ((v & (NE7_RQM|NE7_DIO|NE7_CB)) == NE7_RQM) {
719 1.88.4.2 nathanw /* wait a bit longer till device *really* is ready */
720 1.88.4.2 nathanw delay(100000);
721 1.88.4.2 nathanw if (fdc_wrfifo(fdc, NE7CMD_SENSEI))
722 1.88.4.2 nathanw break;
723 1.88.4.2 nathanw if (fdcresult(fdc) == 1 && fdc->sc_status[0] == 0x80)
724 1.88.4.2 nathanw /*
725 1.88.4.2 nathanw * Got `invalid command'; we interpret it
726 1.88.4.2 nathanw * to mean that the re-calibrate hasn't in
727 1.88.4.2 nathanw * fact finished yet
728 1.88.4.2 nathanw */
729 1.88.4.2 nathanw continue;
730 1.88.4.2 nathanw break;
731 1.88.4.2 nathanw }
732 1.88.4.2 nathanw }
733 1.88.4.2 nathanw n = fdc->sc_nstat;
734 1.88.4.2 nathanw #ifdef FD_DEBUG
735 1.88.4.2 nathanw if (fdc_debug) {
736 1.88.4.2 nathanw int i;
737 1.88.4.2 nathanw printf("fdprobe: %d stati:", n);
738 1.88.4.2 nathanw for (i = 0; i < n; i++)
739 1.88.4.2 nathanw printf(" 0x%x", fdc->sc_status[i]);
740 1.88.4.2 nathanw printf("\n");
741 1.88.4.2 nathanw }
742 1.88.4.2 nathanw #endif
743 1.88.4.2 nathanw ok = (n == 2 && (fdc->sc_status[0] & 0xf8) == 0x20) ? 1 : 0;
744 1.88.4.2 nathanw
745 1.88.4.2 nathanw /* turn off motor */
746 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
747 1.88.4.2 nathanw /* deselect drive and turn motor off */
748 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_dor, FDO_FRST | FDO_DS);
749 1.88.4.2 nathanw } else {
750 1.88.4.2 nathanw auxregbisc(0, AUXIO4C_FDS);
751 1.88.4.2 nathanw }
752 1.88.4.2 nathanw
753 1.88.4.2 nathanw return (ok);
754 1.88.4.2 nathanw }
755 1.88.4.2 nathanw
756 1.88.4.2 nathanw /*
757 1.88.4.2 nathanw * Controller is working, and drive responded. Attach it.
758 1.88.4.2 nathanw */
759 1.88.4.2 nathanw void
760 1.88.4.2 nathanw fdattach(parent, self, aux)
761 1.88.4.2 nathanw struct device *parent, *self;
762 1.88.4.2 nathanw void *aux;
763 1.88.4.2 nathanw {
764 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)parent;
765 1.88.4.2 nathanw struct fd_softc *fd = (void *)self;
766 1.88.4.2 nathanw struct fdc_attach_args *fa = aux;
767 1.88.4.2 nathanw struct fd_type *type = fa->fa_deftype;
768 1.88.4.2 nathanw int drive = fa->fa_drive;
769 1.88.4.2 nathanw
770 1.88.4.2 nathanw callout_init(&fd->sc_motoron_ch);
771 1.88.4.2 nathanw callout_init(&fd->sc_motoroff_ch);
772 1.88.4.2 nathanw
773 1.88.4.2 nathanw /* XXX Allow `flags' to override device type? */
774 1.88.4.2 nathanw
775 1.88.4.2 nathanw if (type)
776 1.88.4.2 nathanw printf(": %s %d cyl, %d head, %d sec\n", type->name,
777 1.88.4.2 nathanw type->cylinders, type->heads, type->sectrac);
778 1.88.4.2 nathanw else
779 1.88.4.2 nathanw printf(": density unknown\n");
780 1.88.4.2 nathanw
781 1.88.4.3 nathanw bufq_alloc(&fd->sc_q, BUFQ_DISKSORT|BUFQ_SORT_CYLINDER);
782 1.88.4.2 nathanw fd->sc_cylin = -1;
783 1.88.4.2 nathanw fd->sc_drive = drive;
784 1.88.4.2 nathanw fd->sc_deftype = type;
785 1.88.4.2 nathanw fdc->sc_fd[drive] = fd;
786 1.88.4.2 nathanw
787 1.88.4.2 nathanw fdc_wrfifo(fdc, NE7CMD_SPECIFY);
788 1.88.4.2 nathanw fdc_wrfifo(fdc, type->steprate);
789 1.88.4.2 nathanw /* XXX head load time == 6ms */
790 1.88.4.2 nathanw fdc_wrfifo(fdc, 6 | NE7_SPECIFY_NODMA);
791 1.88.4.2 nathanw
792 1.88.4.2 nathanw /*
793 1.88.4.2 nathanw * Initialize and attach the disk structure.
794 1.88.4.2 nathanw */
795 1.88.4.2 nathanw fd->sc_dk.dk_name = fd->sc_dv.dv_xname;
796 1.88.4.2 nathanw fd->sc_dk.dk_driver = &fddkdriver;
797 1.88.4.2 nathanw disk_attach(&fd->sc_dk);
798 1.88.4.2 nathanw
799 1.88.4.2 nathanw /*
800 1.88.4.2 nathanw * Establish a mountroot_hook anyway in case we booted
801 1.88.4.2 nathanw * with RB_ASKNAME and get selected as the boot device.
802 1.88.4.2 nathanw */
803 1.88.4.2 nathanw mountroothook_establish(fd_mountroot_hook, &fd->sc_dv);
804 1.88.4.2 nathanw
805 1.88.4.2 nathanw /* Make sure the drive motor gets turned off at shutdown time. */
806 1.88.4.2 nathanw fd->sc_sdhook = shutdownhook_establish(fd_motor_off, fd);
807 1.88.4.2 nathanw }
808 1.88.4.2 nathanw
809 1.88.4.2 nathanw __inline struct fd_type *
810 1.88.4.2 nathanw fd_dev_to_type(fd, dev)
811 1.88.4.2 nathanw struct fd_softc *fd;
812 1.88.4.2 nathanw dev_t dev;
813 1.88.4.2 nathanw {
814 1.88.4.2 nathanw int type = FDTYPE(dev);
815 1.88.4.2 nathanw
816 1.88.4.2 nathanw if (type > (sizeof(fd_types) / sizeof(fd_types[0])))
817 1.88.4.2 nathanw return (NULL);
818 1.88.4.2 nathanw return (type ? &fd_types[type - 1] : fd->sc_deftype);
819 1.88.4.2 nathanw }
820 1.88.4.2 nathanw
821 1.88.4.2 nathanw void
822 1.88.4.2 nathanw fdstrategy(bp)
823 1.88.4.2 nathanw register struct buf *bp; /* IO operation to perform */
824 1.88.4.2 nathanw {
825 1.88.4.2 nathanw struct fd_softc *fd;
826 1.88.4.2 nathanw int unit = FDUNIT(bp->b_dev);
827 1.88.4.2 nathanw int sz;
828 1.88.4.2 nathanw int s;
829 1.88.4.2 nathanw
830 1.88.4.2 nathanw /* Valid unit, controller, and request? */
831 1.88.4.2 nathanw if (unit >= fd_cd.cd_ndevs ||
832 1.88.4.2 nathanw (fd = fd_cd.cd_devs[unit]) == 0 ||
833 1.88.4.2 nathanw bp->b_blkno < 0 ||
834 1.88.4.2 nathanw (((bp->b_bcount % FD_BSIZE(fd)) != 0 ||
835 1.88.4.2 nathanw (bp->b_blkno * DEV_BSIZE) % FD_BSIZE(fd) != 0) &&
836 1.88.4.2 nathanw (bp->b_flags & B_FORMAT) == 0)) {
837 1.88.4.2 nathanw bp->b_error = EINVAL;
838 1.88.4.2 nathanw goto bad;
839 1.88.4.2 nathanw }
840 1.88.4.2 nathanw
841 1.88.4.2 nathanw /* If it's a null transfer, return immediately. */
842 1.88.4.2 nathanw if (bp->b_bcount == 0)
843 1.88.4.2 nathanw goto done;
844 1.88.4.2 nathanw
845 1.88.4.2 nathanw sz = howmany(bp->b_bcount, DEV_BSIZE);
846 1.88.4.2 nathanw
847 1.88.4.2 nathanw if (bp->b_blkno + sz > (fd->sc_type->size * DEV_BSIZE) / FD_BSIZE(fd)) {
848 1.88.4.2 nathanw sz = (fd->sc_type->size * DEV_BSIZE) / FD_BSIZE(fd)
849 1.88.4.2 nathanw - bp->b_blkno;
850 1.88.4.2 nathanw if (sz == 0) {
851 1.88.4.2 nathanw /* If exactly at end of disk, return EOF. */
852 1.88.4.2 nathanw bp->b_resid = bp->b_bcount;
853 1.88.4.2 nathanw goto done;
854 1.88.4.2 nathanw }
855 1.88.4.2 nathanw if (sz < 0) {
856 1.88.4.2 nathanw /* If past end of disk, return EINVAL. */
857 1.88.4.2 nathanw bp->b_error = EINVAL;
858 1.88.4.2 nathanw goto bad;
859 1.88.4.2 nathanw }
860 1.88.4.2 nathanw /* Otherwise, truncate request. */
861 1.88.4.2 nathanw bp->b_bcount = sz << DEV_BSHIFT;
862 1.88.4.2 nathanw }
863 1.88.4.2 nathanw
864 1.88.4.2 nathanw bp->b_rawblkno = bp->b_blkno;
865 1.88.4.2 nathanw bp->b_cylinder = (bp->b_blkno * DEV_BSIZE) /
866 1.88.4.2 nathanw (FD_BSIZE(fd) * fd->sc_type->seccyl);
867 1.88.4.2 nathanw
868 1.88.4.2 nathanw #ifdef FD_DEBUG
869 1.88.4.2 nathanw if (fdc_debug > 1)
870 1.88.4.2 nathanw printf("fdstrategy: b_blkno %d b_bcount %ld blkno %d cylin %ld\n",
871 1.88.4.2 nathanw bp->b_blkno, bp->b_bcount, fd->sc_blkno, bp->b_cylinder);
872 1.88.4.2 nathanw #endif
873 1.88.4.2 nathanw
874 1.88.4.2 nathanw /* Queue transfer on drive, activate drive and controller if idle. */
875 1.88.4.2 nathanw s = splbio();
876 1.88.4.3 nathanw BUFQ_PUT(&fd->sc_q, bp);
877 1.88.4.2 nathanw callout_stop(&fd->sc_motoroff_ch); /* a good idea */
878 1.88.4.2 nathanw if (fd->sc_active == 0)
879 1.88.4.2 nathanw fdstart(fd);
880 1.88.4.2 nathanw #ifdef DIAGNOSTIC
881 1.88.4.2 nathanw else {
882 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
883 1.88.4.2 nathanw if (fdc->sc_state == DEVIDLE) {
884 1.88.4.2 nathanw printf("fdstrategy: controller inactive\n");
885 1.88.4.2 nathanw fdcstart(fdc);
886 1.88.4.2 nathanw }
887 1.88.4.2 nathanw }
888 1.88.4.2 nathanw #endif
889 1.88.4.2 nathanw splx(s);
890 1.88.4.2 nathanw return;
891 1.88.4.2 nathanw
892 1.88.4.2 nathanw bad:
893 1.88.4.2 nathanw bp->b_flags |= B_ERROR;
894 1.88.4.2 nathanw done:
895 1.88.4.2 nathanw /* Toss transfer; we're done early. */
896 1.88.4.2 nathanw biodone(bp);
897 1.88.4.2 nathanw }
898 1.88.4.2 nathanw
899 1.88.4.2 nathanw void
900 1.88.4.2 nathanw fdstart(fd)
901 1.88.4.2 nathanw struct fd_softc *fd;
902 1.88.4.2 nathanw {
903 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
904 1.88.4.2 nathanw int active = fdc->sc_drives.tqh_first != 0;
905 1.88.4.2 nathanw
906 1.88.4.2 nathanw /* Link into controller queue. */
907 1.88.4.2 nathanw fd->sc_active = 1;
908 1.88.4.2 nathanw TAILQ_INSERT_TAIL(&fdc->sc_drives, fd, sc_drivechain);
909 1.88.4.2 nathanw
910 1.88.4.2 nathanw /* If controller not already active, start it. */
911 1.88.4.2 nathanw if (!active)
912 1.88.4.2 nathanw fdcstart(fdc);
913 1.88.4.2 nathanw }
914 1.88.4.2 nathanw
915 1.88.4.2 nathanw void
916 1.88.4.2 nathanw fdfinish(fd, bp)
917 1.88.4.2 nathanw struct fd_softc *fd;
918 1.88.4.2 nathanw struct buf *bp;
919 1.88.4.2 nathanw {
920 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
921 1.88.4.2 nathanw
922 1.88.4.2 nathanw /*
923 1.88.4.2 nathanw * Move this drive to the end of the queue to give others a `fair'
924 1.88.4.2 nathanw * chance. We only force a switch if N operations are completed while
925 1.88.4.2 nathanw * another drive is waiting to be serviced, since there is a long motor
926 1.88.4.2 nathanw * startup delay whenever we switch.
927 1.88.4.2 nathanw */
928 1.88.4.3 nathanw (void)BUFQ_GET(&fd->sc_q);
929 1.88.4.2 nathanw if (fd->sc_drivechain.tqe_next && ++fd->sc_ops >= 8) {
930 1.88.4.2 nathanw fd->sc_ops = 0;
931 1.88.4.2 nathanw TAILQ_REMOVE(&fdc->sc_drives, fd, sc_drivechain);
932 1.88.4.3 nathanw if (BUFQ_PEEK(&fd->sc_q) != NULL) {
933 1.88.4.2 nathanw TAILQ_INSERT_TAIL(&fdc->sc_drives, fd, sc_drivechain);
934 1.88.4.2 nathanw } else
935 1.88.4.2 nathanw fd->sc_active = 0;
936 1.88.4.2 nathanw }
937 1.88.4.2 nathanw bp->b_resid = fd->sc_bcount;
938 1.88.4.2 nathanw fd->sc_skip = 0;
939 1.88.4.2 nathanw
940 1.88.4.2 nathanw biodone(bp);
941 1.88.4.2 nathanw /* turn off motor 5s from now */
942 1.88.4.2 nathanw callout_reset(&fd->sc_motoroff_ch, 5 * hz, fd_motor_off, fd);
943 1.88.4.2 nathanw fdc->sc_state = DEVIDLE;
944 1.88.4.2 nathanw }
945 1.88.4.2 nathanw
946 1.88.4.2 nathanw void
947 1.88.4.2 nathanw fdc_reset(fdc)
948 1.88.4.2 nathanw struct fdc_softc *fdc;
949 1.88.4.2 nathanw {
950 1.88.4.2 nathanw bus_space_tag_t t = fdc->sc_bustag;
951 1.88.4.2 nathanw bus_space_handle_t h = fdc->sc_handle;
952 1.88.4.2 nathanw
953 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
954 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_dor,
955 1.88.4.2 nathanw FDO_FDMAEN | FDO_MOEN(0));
956 1.88.4.2 nathanw }
957 1.88.4.2 nathanw
958 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_drs, DRS_RESET);
959 1.88.4.2 nathanw delay(10);
960 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_drs, 0);
961 1.88.4.2 nathanw
962 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
963 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_dor,
964 1.88.4.2 nathanw FDO_FRST | FDO_FDMAEN | FDO_DS);
965 1.88.4.2 nathanw }
966 1.88.4.2 nathanw #ifdef FD_DEBUG
967 1.88.4.2 nathanw if (fdc_debug)
968 1.88.4.2 nathanw printf("fdc reset\n");
969 1.88.4.2 nathanw #endif
970 1.88.4.2 nathanw }
971 1.88.4.2 nathanw
972 1.88.4.2 nathanw void
973 1.88.4.2 nathanw fd_set_motor(fdc)
974 1.88.4.2 nathanw struct fdc_softc *fdc;
975 1.88.4.2 nathanw {
976 1.88.4.2 nathanw struct fd_softc *fd;
977 1.88.4.2 nathanw u_char status;
978 1.88.4.2 nathanw int n;
979 1.88.4.2 nathanw
980 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_82077) != 0) {
981 1.88.4.2 nathanw status = FDO_FRST | FDO_FDMAEN;
982 1.88.4.2 nathanw if ((fd = fdc->sc_drives.tqh_first) != NULL)
983 1.88.4.2 nathanw status |= fd->sc_drive;
984 1.88.4.2 nathanw
985 1.88.4.2 nathanw for (n = 0; n < 4; n++)
986 1.88.4.2 nathanw if ((fd = fdc->sc_fd[n]) && (fd->sc_flags & FD_MOTOR))
987 1.88.4.2 nathanw status |= FDO_MOEN(n);
988 1.88.4.2 nathanw bus_space_write_1(fdc->sc_bustag, fdc->sc_handle,
989 1.88.4.2 nathanw fdc->sc_reg_dor, status);
990 1.88.4.2 nathanw } else {
991 1.88.4.2 nathanw
992 1.88.4.2 nathanw for (n = 0; n < 4; n++) {
993 1.88.4.2 nathanw if ((fd = fdc->sc_fd[n]) != NULL &&
994 1.88.4.2 nathanw (fd->sc_flags & FD_MOTOR) != 0) {
995 1.88.4.2 nathanw auxregbisc(AUXIO4C_FDS, 0);
996 1.88.4.2 nathanw return;
997 1.88.4.2 nathanw }
998 1.88.4.2 nathanw }
999 1.88.4.2 nathanw auxregbisc(0, AUXIO4C_FDS);
1000 1.88.4.2 nathanw }
1001 1.88.4.2 nathanw }
1002 1.88.4.2 nathanw
1003 1.88.4.2 nathanw void
1004 1.88.4.2 nathanw fd_motor_off(arg)
1005 1.88.4.2 nathanw void *arg;
1006 1.88.4.2 nathanw {
1007 1.88.4.2 nathanw struct fd_softc *fd = arg;
1008 1.88.4.2 nathanw int s;
1009 1.88.4.2 nathanw
1010 1.88.4.2 nathanw s = splbio();
1011 1.88.4.2 nathanw fd->sc_flags &= ~(FD_MOTOR | FD_MOTOR_WAIT);
1012 1.88.4.2 nathanw fd_set_motor((struct fdc_softc *)fd->sc_dv.dv_parent);
1013 1.88.4.2 nathanw splx(s);
1014 1.88.4.2 nathanw }
1015 1.88.4.2 nathanw
1016 1.88.4.2 nathanw void
1017 1.88.4.2 nathanw fd_motor_on(arg)
1018 1.88.4.2 nathanw void *arg;
1019 1.88.4.2 nathanw {
1020 1.88.4.2 nathanw struct fd_softc *fd = arg;
1021 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
1022 1.88.4.2 nathanw int s;
1023 1.88.4.2 nathanw
1024 1.88.4.2 nathanw s = splbio();
1025 1.88.4.2 nathanw fd->sc_flags &= ~FD_MOTOR_WAIT;
1026 1.88.4.2 nathanw if ((fdc->sc_drives.tqh_first == fd) && (fdc->sc_state == MOTORWAIT))
1027 1.88.4.2 nathanw (void) fdcstate(fdc);
1028 1.88.4.2 nathanw splx(s);
1029 1.88.4.2 nathanw }
1030 1.88.4.2 nathanw
1031 1.88.4.2 nathanw /*
1032 1.88.4.2 nathanw * Get status bytes off the FDC after a command has finished
1033 1.88.4.2 nathanw * Returns the number of status bytes read; -1 on error.
1034 1.88.4.2 nathanw * The return value is also stored in `sc_nstat'.
1035 1.88.4.2 nathanw */
1036 1.88.4.2 nathanw int
1037 1.88.4.2 nathanw fdcresult(fdc)
1038 1.88.4.2 nathanw struct fdc_softc *fdc;
1039 1.88.4.2 nathanw {
1040 1.88.4.2 nathanw bus_space_tag_t t = fdc->sc_bustag;
1041 1.88.4.2 nathanw bus_space_handle_t h = fdc->sc_handle;
1042 1.88.4.2 nathanw int j, n = 0;
1043 1.88.4.2 nathanw
1044 1.88.4.2 nathanw for (j = 10000; j; j--) {
1045 1.88.4.2 nathanw u_int8_t v = bus_space_read_1(t, h, fdc->sc_reg_msr);
1046 1.88.4.2 nathanw v &= (NE7_DIO | NE7_RQM | NE7_CB);
1047 1.88.4.2 nathanw if (v == NE7_RQM)
1048 1.88.4.2 nathanw return (fdc->sc_nstat = n);
1049 1.88.4.2 nathanw if (v == (NE7_DIO | NE7_RQM | NE7_CB)) {
1050 1.88.4.2 nathanw if (n >= sizeof(fdc->sc_status)) {
1051 1.88.4.2 nathanw log(LOG_ERR, "fdcresult: overrun\n");
1052 1.88.4.2 nathanw return (-1);
1053 1.88.4.2 nathanw }
1054 1.88.4.2 nathanw fdc->sc_status[n++] =
1055 1.88.4.2 nathanw bus_space_read_1(t, h, fdc->sc_reg_fifo);
1056 1.88.4.2 nathanw } else
1057 1.88.4.2 nathanw delay(1);
1058 1.88.4.2 nathanw }
1059 1.88.4.2 nathanw
1060 1.88.4.2 nathanw log(LOG_ERR, "fdcresult: timeout\n");
1061 1.88.4.2 nathanw return (fdc->sc_nstat = -1);
1062 1.88.4.2 nathanw }
1063 1.88.4.2 nathanw
1064 1.88.4.2 nathanw /*
1065 1.88.4.2 nathanw * Write a command byte to the FDC.
1066 1.88.4.2 nathanw * Returns 0 on success; -1 on failure (i.e. timeout)
1067 1.88.4.2 nathanw */
1068 1.88.4.2 nathanw int
1069 1.88.4.2 nathanw fdc_wrfifo(fdc, x)
1070 1.88.4.2 nathanw struct fdc_softc *fdc;
1071 1.88.4.2 nathanw u_int8_t x;
1072 1.88.4.2 nathanw {
1073 1.88.4.2 nathanw bus_space_tag_t t = fdc->sc_bustag;
1074 1.88.4.2 nathanw bus_space_handle_t h = fdc->sc_handle;
1075 1.88.4.2 nathanw int i;
1076 1.88.4.2 nathanw
1077 1.88.4.2 nathanw for (i = 100000; i-- > 0;) {
1078 1.88.4.2 nathanw u_int8_t v = bus_space_read_1(t, h, fdc->sc_reg_msr);
1079 1.88.4.2 nathanw if ((v & (NE7_DIO|NE7_RQM)) == NE7_RQM) {
1080 1.88.4.2 nathanw /* The chip is ready */
1081 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_fifo, x);
1082 1.88.4.2 nathanw return (0);
1083 1.88.4.2 nathanw }
1084 1.88.4.2 nathanw delay(1);
1085 1.88.4.2 nathanw }
1086 1.88.4.2 nathanw return (-1);
1087 1.88.4.2 nathanw }
1088 1.88.4.2 nathanw
1089 1.88.4.2 nathanw int
1090 1.88.4.2 nathanw fdopen(dev, flags, fmt, p)
1091 1.88.4.2 nathanw dev_t dev;
1092 1.88.4.2 nathanw int flags, fmt;
1093 1.88.4.2 nathanw struct proc *p;
1094 1.88.4.2 nathanw {
1095 1.88.4.2 nathanw int unit, pmask;
1096 1.88.4.2 nathanw struct fd_softc *fd;
1097 1.88.4.2 nathanw struct fd_type *type;
1098 1.88.4.2 nathanw
1099 1.88.4.2 nathanw unit = FDUNIT(dev);
1100 1.88.4.2 nathanw if (unit >= fd_cd.cd_ndevs)
1101 1.88.4.2 nathanw return (ENXIO);
1102 1.88.4.2 nathanw fd = fd_cd.cd_devs[unit];
1103 1.88.4.2 nathanw if (fd == NULL)
1104 1.88.4.2 nathanw return (ENXIO);
1105 1.88.4.2 nathanw type = fd_dev_to_type(fd, dev);
1106 1.88.4.2 nathanw if (type == NULL)
1107 1.88.4.2 nathanw return (ENXIO);
1108 1.88.4.2 nathanw
1109 1.88.4.2 nathanw if ((fd->sc_flags & FD_OPEN) != 0 &&
1110 1.88.4.2 nathanw fd->sc_type != type)
1111 1.88.4.2 nathanw return (EBUSY);
1112 1.88.4.2 nathanw
1113 1.88.4.2 nathanw fd->sc_type = type;
1114 1.88.4.2 nathanw fd->sc_cylin = -1;
1115 1.88.4.2 nathanw fd->sc_flags |= FD_OPEN;
1116 1.88.4.2 nathanw
1117 1.88.4.2 nathanw /*
1118 1.88.4.2 nathanw * Only update the disklabel if we're not open anywhere else.
1119 1.88.4.2 nathanw */
1120 1.88.4.2 nathanw if (fd->sc_dk.dk_openmask == 0)
1121 1.88.4.2 nathanw fdgetdisklabel(dev);
1122 1.88.4.2 nathanw
1123 1.88.4.2 nathanw pmask = (1 << DISKPART(dev));
1124 1.88.4.2 nathanw
1125 1.88.4.2 nathanw switch (fmt) {
1126 1.88.4.2 nathanw case S_IFCHR:
1127 1.88.4.2 nathanw fd->sc_dk.dk_copenmask |= pmask;
1128 1.88.4.2 nathanw break;
1129 1.88.4.2 nathanw
1130 1.88.4.2 nathanw case S_IFBLK:
1131 1.88.4.2 nathanw fd->sc_dk.dk_bopenmask |= pmask;
1132 1.88.4.2 nathanw break;
1133 1.88.4.2 nathanw }
1134 1.88.4.2 nathanw fd->sc_dk.dk_openmask =
1135 1.88.4.2 nathanw fd->sc_dk.dk_copenmask | fd->sc_dk.dk_bopenmask;
1136 1.88.4.2 nathanw
1137 1.88.4.2 nathanw return (0);
1138 1.88.4.2 nathanw }
1139 1.88.4.2 nathanw
1140 1.88.4.2 nathanw int
1141 1.88.4.2 nathanw fdclose(dev, flags, fmt, p)
1142 1.88.4.2 nathanw dev_t dev;
1143 1.88.4.2 nathanw int flags, fmt;
1144 1.88.4.2 nathanw struct proc *p;
1145 1.88.4.2 nathanw {
1146 1.88.4.2 nathanw struct fd_softc *fd = fd_cd.cd_devs[FDUNIT(dev)];
1147 1.88.4.2 nathanw int pmask = (1 << DISKPART(dev));
1148 1.88.4.2 nathanw
1149 1.88.4.2 nathanw fd->sc_flags &= ~FD_OPEN;
1150 1.88.4.2 nathanw fd->sc_opts &= ~(FDOPT_NORETRY|FDOPT_SILENT);
1151 1.88.4.2 nathanw
1152 1.88.4.2 nathanw switch (fmt) {
1153 1.88.4.2 nathanw case S_IFCHR:
1154 1.88.4.2 nathanw fd->sc_dk.dk_copenmask &= ~pmask;
1155 1.88.4.2 nathanw break;
1156 1.88.4.2 nathanw
1157 1.88.4.2 nathanw case S_IFBLK:
1158 1.88.4.2 nathanw fd->sc_dk.dk_bopenmask &= ~pmask;
1159 1.88.4.2 nathanw break;
1160 1.88.4.2 nathanw }
1161 1.88.4.2 nathanw fd->sc_dk.dk_openmask =
1162 1.88.4.2 nathanw fd->sc_dk.dk_copenmask | fd->sc_dk.dk_bopenmask;
1163 1.88.4.2 nathanw
1164 1.88.4.2 nathanw return (0);
1165 1.88.4.2 nathanw }
1166 1.88.4.2 nathanw
1167 1.88.4.2 nathanw int
1168 1.88.4.2 nathanw fdread(dev, uio, flag)
1169 1.88.4.2 nathanw dev_t dev;
1170 1.88.4.2 nathanw struct uio *uio;
1171 1.88.4.2 nathanw int flag;
1172 1.88.4.2 nathanw {
1173 1.88.4.2 nathanw
1174 1.88.4.2 nathanw return (physio(fdstrategy, NULL, dev, B_READ, minphys, uio));
1175 1.88.4.2 nathanw }
1176 1.88.4.2 nathanw
1177 1.88.4.2 nathanw int
1178 1.88.4.2 nathanw fdwrite(dev, uio, flag)
1179 1.88.4.2 nathanw dev_t dev;
1180 1.88.4.2 nathanw struct uio *uio;
1181 1.88.4.2 nathanw int flag;
1182 1.88.4.2 nathanw {
1183 1.88.4.2 nathanw
1184 1.88.4.2 nathanw return (physio(fdstrategy, NULL, dev, B_WRITE, minphys, uio));
1185 1.88.4.2 nathanw }
1186 1.88.4.2 nathanw
1187 1.88.4.2 nathanw void
1188 1.88.4.2 nathanw fdcstart(fdc)
1189 1.88.4.2 nathanw struct fdc_softc *fdc;
1190 1.88.4.2 nathanw {
1191 1.88.4.2 nathanw
1192 1.88.4.2 nathanw #ifdef DIAGNOSTIC
1193 1.88.4.2 nathanw /* only got here if controller's drive queue was inactive; should
1194 1.88.4.2 nathanw be in idle state */
1195 1.88.4.2 nathanw if (fdc->sc_state != DEVIDLE) {
1196 1.88.4.2 nathanw printf("fdcstart: not idle\n");
1197 1.88.4.2 nathanw return;
1198 1.88.4.2 nathanw }
1199 1.88.4.2 nathanw #endif
1200 1.88.4.2 nathanw (void) fdcstate(fdc);
1201 1.88.4.2 nathanw }
1202 1.88.4.2 nathanw
1203 1.88.4.2 nathanw void
1204 1.88.4.2 nathanw fdcstatus(fdc, s)
1205 1.88.4.2 nathanw struct fdc_softc *fdc;
1206 1.88.4.2 nathanw char *s;
1207 1.88.4.2 nathanw {
1208 1.88.4.2 nathanw struct fd_softc *fd = fdc->sc_drives.tqh_first;
1209 1.88.4.2 nathanw int n;
1210 1.88.4.2 nathanw char bits[64];
1211 1.88.4.2 nathanw
1212 1.88.4.2 nathanw /* Just print last status */
1213 1.88.4.2 nathanw n = fdc->sc_nstat;
1214 1.88.4.2 nathanw
1215 1.88.4.2 nathanw #if 0
1216 1.88.4.2 nathanw /*
1217 1.88.4.2 nathanw * A 82072 seems to return <invalid command> on
1218 1.88.4.2 nathanw * gratuitous Sense Interrupt commands.
1219 1.88.4.2 nathanw */
1220 1.88.4.2 nathanw if (n == 0 && (fdc->sc_flags & FDC_82077) != 0) {
1221 1.88.4.2 nathanw fdc_wrfifo(fdc, NE7CMD_SENSEI);
1222 1.88.4.2 nathanw (void) fdcresult(fdc);
1223 1.88.4.2 nathanw n = 2;
1224 1.88.4.2 nathanw }
1225 1.88.4.2 nathanw #endif
1226 1.88.4.2 nathanw
1227 1.88.4.2 nathanw printf("%s: %s: state %d",
1228 1.88.4.2 nathanw fd ? fd->sc_dv.dv_xname : "fdc", s, fdc->sc_state);
1229 1.88.4.2 nathanw
1230 1.88.4.2 nathanw switch (n) {
1231 1.88.4.2 nathanw case 0:
1232 1.88.4.2 nathanw printf("\n");
1233 1.88.4.2 nathanw break;
1234 1.88.4.2 nathanw case 2:
1235 1.88.4.2 nathanw printf(" (st0 %s cyl %d)\n",
1236 1.88.4.2 nathanw bitmask_snprintf(fdc->sc_status[0], NE7_ST0BITS,
1237 1.88.4.2 nathanw bits, sizeof(bits)), fdc->sc_status[1]);
1238 1.88.4.2 nathanw break;
1239 1.88.4.2 nathanw case 7:
1240 1.88.4.2 nathanw printf(" (st0 %s", bitmask_snprintf(fdc->sc_status[0],
1241 1.88.4.2 nathanw NE7_ST0BITS, bits, sizeof(bits)));
1242 1.88.4.2 nathanw printf(" st1 %s", bitmask_snprintf(fdc->sc_status[1],
1243 1.88.4.2 nathanw NE7_ST1BITS, bits, sizeof(bits)));
1244 1.88.4.2 nathanw printf(" st2 %s", bitmask_snprintf(fdc->sc_status[2],
1245 1.88.4.2 nathanw NE7_ST2BITS, bits, sizeof(bits)));
1246 1.88.4.2 nathanw printf(" cyl %d head %d sec %d)\n",
1247 1.88.4.2 nathanw fdc->sc_status[3], fdc->sc_status[4], fdc->sc_status[5]);
1248 1.88.4.2 nathanw break;
1249 1.88.4.2 nathanw #ifdef DIAGNOSTIC
1250 1.88.4.2 nathanw default:
1251 1.88.4.2 nathanw printf(" fdcstatus: weird size: %d\n", n);
1252 1.88.4.2 nathanw break;
1253 1.88.4.2 nathanw #endif
1254 1.88.4.2 nathanw }
1255 1.88.4.2 nathanw }
1256 1.88.4.2 nathanw
1257 1.88.4.2 nathanw void
1258 1.88.4.2 nathanw fdctimeout(arg)
1259 1.88.4.2 nathanw void *arg;
1260 1.88.4.2 nathanw {
1261 1.88.4.2 nathanw struct fdc_softc *fdc = arg;
1262 1.88.4.2 nathanw struct fd_softc *fd;
1263 1.88.4.2 nathanw int s;
1264 1.88.4.2 nathanw
1265 1.88.4.2 nathanw s = splbio();
1266 1.88.4.2 nathanw fd = fdc->sc_drives.tqh_first;
1267 1.88.4.2 nathanw if (fd == NULL) {
1268 1.88.4.2 nathanw printf("%s: timeout but no I/O pending: state %d, istatus=%d\n",
1269 1.88.4.2 nathanw fdc->sc_dev.dv_xname,
1270 1.88.4.2 nathanw fdc->sc_state, fdc->sc_istatus);
1271 1.88.4.2 nathanw fdc->sc_state = DEVIDLE;
1272 1.88.4.2 nathanw goto out;
1273 1.88.4.2 nathanw }
1274 1.88.4.2 nathanw
1275 1.88.4.3 nathanw if (BUFQ_PEEK(&fd->sc_q) != NULL)
1276 1.88.4.2 nathanw fdc->sc_state++;
1277 1.88.4.2 nathanw else
1278 1.88.4.2 nathanw fdc->sc_state = DEVIDLE;
1279 1.88.4.2 nathanw
1280 1.88.4.2 nathanw (void) fdcstate(fdc);
1281 1.88.4.2 nathanw out:
1282 1.88.4.2 nathanw splx(s);
1283 1.88.4.2 nathanw
1284 1.88.4.2 nathanw }
1285 1.88.4.2 nathanw
1286 1.88.4.2 nathanw void
1287 1.88.4.2 nathanw fdcpseudointr(arg)
1288 1.88.4.2 nathanw void *arg;
1289 1.88.4.2 nathanw {
1290 1.88.4.2 nathanw struct fdc_softc *fdc = arg;
1291 1.88.4.2 nathanw int s;
1292 1.88.4.2 nathanw
1293 1.88.4.2 nathanw /* Just ensure it has the right spl. */
1294 1.88.4.2 nathanw s = splbio();
1295 1.88.4.2 nathanw (void) fdcstate(fdc);
1296 1.88.4.2 nathanw splx(s);
1297 1.88.4.2 nathanw }
1298 1.88.4.2 nathanw
1299 1.88.4.2 nathanw
1300 1.88.4.2 nathanw /*
1301 1.88.4.2 nathanw * hardware interrupt entry point: used only if no `fast trap' * (in-window)
1302 1.88.4.2 nathanw * handler is available. Unfortunately, we have no reliable way to
1303 1.88.4.2 nathanw * determine that the interrupt really came from the floppy controller;
1304 1.88.4.2 nathanw * just hope that the other devices that share this interrupt level
1305 1.88.4.2 nathanw * can do better..
1306 1.88.4.2 nathanw */
1307 1.88.4.2 nathanw int
1308 1.88.4.2 nathanw fdc_c_hwintr(arg)
1309 1.88.4.2 nathanw void *arg;
1310 1.88.4.2 nathanw {
1311 1.88.4.2 nathanw struct fdc_softc *fdc = arg;
1312 1.88.4.2 nathanw bus_space_tag_t t = fdc->sc_bustag;
1313 1.88.4.2 nathanw bus_space_handle_t h = fdc->sc_handle;
1314 1.88.4.2 nathanw
1315 1.88.4.2 nathanw switch (fdc->sc_itask) {
1316 1.88.4.2 nathanw case FDC_ITASK_NONE:
1317 1.88.4.2 nathanw return (0);
1318 1.88.4.2 nathanw case FDC_ITASK_SENSEI:
1319 1.88.4.2 nathanw if (fdc_wrfifo(fdc, NE7CMD_SENSEI) != 0 || fdcresult(fdc) == -1)
1320 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_ERROR;
1321 1.88.4.2 nathanw else
1322 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_DONE;
1323 1.88.4.2 nathanw FD_SET_SWINTR;
1324 1.88.4.2 nathanw return (1);
1325 1.88.4.2 nathanw case FDC_ITASK_DMA:
1326 1.88.4.2 nathanw /* Proceed with pseudo-dma below */
1327 1.88.4.2 nathanw break;
1328 1.88.4.2 nathanw default:
1329 1.88.4.2 nathanw printf("fdc: stray hard interrupt: itask=%d\n", fdc->sc_itask);
1330 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_SPURIOUS;
1331 1.88.4.2 nathanw FD_SET_SWINTR;
1332 1.88.4.2 nathanw return (1);
1333 1.88.4.2 nathanw }
1334 1.88.4.2 nathanw
1335 1.88.4.2 nathanw /*
1336 1.88.4.2 nathanw * Pseudo DMA in progress
1337 1.88.4.2 nathanw */
1338 1.88.4.2 nathanw for (;;) {
1339 1.88.4.2 nathanw u_int8_t msr;
1340 1.88.4.2 nathanw
1341 1.88.4.2 nathanw msr = bus_space_read_1(t, h, fdc->sc_reg_msr);
1342 1.88.4.2 nathanw
1343 1.88.4.2 nathanw if ((msr & NE7_RQM) == 0)
1344 1.88.4.2 nathanw /* That's all this round */
1345 1.88.4.2 nathanw break;
1346 1.88.4.2 nathanw
1347 1.88.4.2 nathanw if ((msr & NE7_NDM) == 0) {
1348 1.88.4.2 nathanw fdcresult(fdc);
1349 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_DONE;
1350 1.88.4.2 nathanw FD_SET_SWINTR;
1351 1.88.4.2 nathanw #ifdef FD_DEBUG
1352 1.88.4.2 nathanw if (fdc_debug > 1)
1353 1.88.4.2 nathanw printf("fdc: overrun: tc = %d\n", fdc->sc_tc);
1354 1.88.4.2 nathanw #endif
1355 1.88.4.2 nathanw break;
1356 1.88.4.2 nathanw }
1357 1.88.4.2 nathanw
1358 1.88.4.2 nathanw /* Another byte can be transferred */
1359 1.88.4.2 nathanw if ((msr & NE7_DIO) != 0)
1360 1.88.4.2 nathanw *fdc->sc_data =
1361 1.88.4.2 nathanw bus_space_read_1(t, h, fdc->sc_reg_fifo);
1362 1.88.4.2 nathanw else
1363 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_fifo,
1364 1.88.4.2 nathanw *fdc->sc_data);
1365 1.88.4.2 nathanw
1366 1.88.4.2 nathanw fdc->sc_data++;
1367 1.88.4.2 nathanw if (--fdc->sc_tc == 0) {
1368 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_DONE;
1369 1.88.4.2 nathanw FTC_FLIP;
1370 1.88.4.2 nathanw fdcresult(fdc);
1371 1.88.4.2 nathanw FD_SET_SWINTR;
1372 1.88.4.2 nathanw break;
1373 1.88.4.2 nathanw }
1374 1.88.4.2 nathanw }
1375 1.88.4.2 nathanw return (1);
1376 1.88.4.2 nathanw }
1377 1.88.4.2 nathanw
1378 1.88.4.2 nathanw int
1379 1.88.4.2 nathanw fdcswintr(arg)
1380 1.88.4.2 nathanw void *arg;
1381 1.88.4.2 nathanw {
1382 1.88.4.2 nathanw struct fdc_softc *fdc = arg;
1383 1.88.4.2 nathanw int s;
1384 1.88.4.2 nathanw
1385 1.88.4.2 nathanw if (fdc->sc_istatus == FDC_ISTATUS_NONE)
1386 1.88.4.2 nathanw /* This (software) interrupt is not for us */
1387 1.88.4.2 nathanw return (0);
1388 1.88.4.2 nathanw
1389 1.88.4.2 nathanw switch (fdc->sc_istatus) {
1390 1.88.4.2 nathanw case FDC_ISTATUS_ERROR:
1391 1.88.4.2 nathanw printf("fdc: ierror status: state %d\n", fdc->sc_state);
1392 1.88.4.2 nathanw break;
1393 1.88.4.2 nathanw case FDC_ISTATUS_SPURIOUS:
1394 1.88.4.2 nathanw printf("fdc: spurious interrupt: state %d\n", fdc->sc_state);
1395 1.88.4.2 nathanw break;
1396 1.88.4.2 nathanw }
1397 1.88.4.2 nathanw
1398 1.88.4.2 nathanw s = splbio();
1399 1.88.4.2 nathanw fdcstate(fdc);
1400 1.88.4.2 nathanw splx(s);
1401 1.88.4.2 nathanw return (1);
1402 1.88.4.2 nathanw }
1403 1.88.4.2 nathanw
1404 1.88.4.2 nathanw int
1405 1.88.4.2 nathanw fdcstate(fdc)
1406 1.88.4.2 nathanw struct fdc_softc *fdc;
1407 1.88.4.2 nathanw {
1408 1.88.4.2 nathanw #define st0 fdc->sc_status[0]
1409 1.88.4.2 nathanw #define st1 fdc->sc_status[1]
1410 1.88.4.2 nathanw #define cyl fdc->sc_status[1]
1411 1.88.4.2 nathanw #define FDC_WRFIFO(fdc, c) do { \
1412 1.88.4.2 nathanw if (fdc_wrfifo(fdc, (c))) { \
1413 1.88.4.2 nathanw goto xxx; \
1414 1.88.4.2 nathanw } \
1415 1.88.4.2 nathanw } while(0)
1416 1.88.4.2 nathanw
1417 1.88.4.2 nathanw struct fd_softc *fd;
1418 1.88.4.2 nathanw struct buf *bp;
1419 1.88.4.2 nathanw int read, head, sec, nblks;
1420 1.88.4.2 nathanw struct fd_type *type;
1421 1.88.4.2 nathanw struct ne7_fd_formb *finfo = NULL;
1422 1.88.4.2 nathanw
1423 1.88.4.2 nathanw if (fdc->sc_istatus == FDC_ISTATUS_ERROR) {
1424 1.88.4.2 nathanw /* Prevent loop if the reset sequence produces errors */
1425 1.88.4.2 nathanw if (fdc->sc_state != RESETCOMPLETE &&
1426 1.88.4.2 nathanw fdc->sc_state != RECALWAIT &&
1427 1.88.4.2 nathanw fdc->sc_state != RECALCOMPLETE)
1428 1.88.4.2 nathanw fdc->sc_state = DORESET;
1429 1.88.4.2 nathanw }
1430 1.88.4.2 nathanw
1431 1.88.4.2 nathanw /* Clear I task/status field */
1432 1.88.4.2 nathanw fdc->sc_istatus = FDC_ISTATUS_NONE;
1433 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_NONE;
1434 1.88.4.2 nathanw
1435 1.88.4.2 nathanw loop:
1436 1.88.4.2 nathanw /* Is there a drive for the controller to do a transfer with? */
1437 1.88.4.2 nathanw fd = fdc->sc_drives.tqh_first;
1438 1.88.4.2 nathanw if (fd == NULL) {
1439 1.88.4.2 nathanw fdc->sc_state = DEVIDLE;
1440 1.88.4.2 nathanw return (0);
1441 1.88.4.2 nathanw }
1442 1.88.4.2 nathanw
1443 1.88.4.2 nathanw /* Is there a transfer to this drive? If not, deactivate drive. */
1444 1.88.4.3 nathanw bp = BUFQ_PEEK(&fd->sc_q);
1445 1.88.4.2 nathanw if (bp == NULL) {
1446 1.88.4.2 nathanw fd->sc_ops = 0;
1447 1.88.4.2 nathanw TAILQ_REMOVE(&fdc->sc_drives, fd, sc_drivechain);
1448 1.88.4.2 nathanw fd->sc_active = 0;
1449 1.88.4.2 nathanw goto loop;
1450 1.88.4.2 nathanw }
1451 1.88.4.2 nathanw
1452 1.88.4.2 nathanw if (bp->b_flags & B_FORMAT)
1453 1.88.4.2 nathanw finfo = (struct ne7_fd_formb *)bp->b_data;
1454 1.88.4.2 nathanw
1455 1.88.4.2 nathanw switch (fdc->sc_state) {
1456 1.88.4.2 nathanw case DEVIDLE:
1457 1.88.4.2 nathanw fdc->sc_errors = 0;
1458 1.88.4.2 nathanw fd->sc_skip = 0;
1459 1.88.4.2 nathanw fd->sc_bcount = bp->b_bcount;
1460 1.88.4.2 nathanw fd->sc_blkno = (bp->b_blkno * DEV_BSIZE) / FD_BSIZE(fd);
1461 1.88.4.2 nathanw callout_stop(&fd->sc_motoroff_ch);
1462 1.88.4.2 nathanw if ((fd->sc_flags & FD_MOTOR_WAIT) != 0) {
1463 1.88.4.2 nathanw fdc->sc_state = MOTORWAIT;
1464 1.88.4.2 nathanw return (1);
1465 1.88.4.2 nathanw }
1466 1.88.4.2 nathanw if ((fd->sc_flags & FD_MOTOR) == 0) {
1467 1.88.4.2 nathanw /* Turn on the motor, being careful about pairing. */
1468 1.88.4.2 nathanw struct fd_softc *ofd = fdc->sc_fd[fd->sc_drive ^ 1];
1469 1.88.4.2 nathanw if (ofd && ofd->sc_flags & FD_MOTOR) {
1470 1.88.4.2 nathanw callout_stop(&ofd->sc_motoroff_ch);
1471 1.88.4.2 nathanw ofd->sc_flags &= ~(FD_MOTOR | FD_MOTOR_WAIT);
1472 1.88.4.2 nathanw }
1473 1.88.4.2 nathanw fd->sc_flags |= FD_MOTOR | FD_MOTOR_WAIT;
1474 1.88.4.2 nathanw fd_set_motor(fdc);
1475 1.88.4.2 nathanw fdc->sc_state = MOTORWAIT;
1476 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_NEEDMOTORWAIT) != 0) { /*XXX*/
1477 1.88.4.2 nathanw /* Allow .25s for motor to stabilize. */
1478 1.88.4.2 nathanw callout_reset(&fd->sc_motoron_ch, hz / 4,
1479 1.88.4.2 nathanw fd_motor_on, fd);
1480 1.88.4.2 nathanw } else {
1481 1.88.4.2 nathanw fd->sc_flags &= ~FD_MOTOR_WAIT;
1482 1.88.4.2 nathanw goto loop;
1483 1.88.4.2 nathanw }
1484 1.88.4.2 nathanw return (1);
1485 1.88.4.2 nathanw }
1486 1.88.4.2 nathanw /* Make sure the right drive is selected. */
1487 1.88.4.2 nathanw fd_set_motor(fdc);
1488 1.88.4.2 nathanw
1489 1.88.4.2 nathanw /*FALLTHROUGH*/
1490 1.88.4.2 nathanw case DOSEEK:
1491 1.88.4.2 nathanw doseek:
1492 1.88.4.2 nathanw if ((fdc->sc_flags & FDC_EIS) &&
1493 1.88.4.2 nathanw (bp->b_flags & B_FORMAT) == 0) {
1494 1.88.4.2 nathanw fd->sc_cylin = bp->b_cylinder;
1495 1.88.4.2 nathanw /* We use implied seek */
1496 1.88.4.2 nathanw goto doio;
1497 1.88.4.2 nathanw }
1498 1.88.4.2 nathanw
1499 1.88.4.2 nathanw if (fd->sc_cylin == bp->b_cylinder)
1500 1.88.4.2 nathanw goto doio;
1501 1.88.4.2 nathanw
1502 1.88.4.2 nathanw fd->sc_cylin = -1;
1503 1.88.4.2 nathanw fdc->sc_state = SEEKWAIT;
1504 1.88.4.2 nathanw fdc->sc_nstat = 0;
1505 1.88.4.2 nathanw
1506 1.88.4.2 nathanw fd->sc_dk.dk_seek++;
1507 1.88.4.2 nathanw
1508 1.88.4.2 nathanw disk_busy(&fd->sc_dk);
1509 1.88.4.2 nathanw callout_reset(&fdc->sc_timo_ch, 4 * hz, fdctimeout, fdc);
1510 1.88.4.2 nathanw
1511 1.88.4.2 nathanw /* specify command */
1512 1.88.4.2 nathanw FDC_WRFIFO(fdc, NE7CMD_SPECIFY);
1513 1.88.4.2 nathanw FDC_WRFIFO(fdc, fd->sc_type->steprate);
1514 1.88.4.2 nathanw /* XXX head load time == 6ms */
1515 1.88.4.2 nathanw FDC_WRFIFO(fdc, 6 | NE7_SPECIFY_NODMA);
1516 1.88.4.2 nathanw
1517 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_SENSEI;
1518 1.88.4.2 nathanw /* seek function */
1519 1.88.4.2 nathanw FDC_WRFIFO(fdc, NE7CMD_SEEK);
1520 1.88.4.2 nathanw FDC_WRFIFO(fdc, fd->sc_drive); /* drive number */
1521 1.88.4.2 nathanw FDC_WRFIFO(fdc, bp->b_cylinder * fd->sc_type->step);
1522 1.88.4.2 nathanw return (1);
1523 1.88.4.2 nathanw
1524 1.88.4.2 nathanw case DOIO:
1525 1.88.4.2 nathanw doio:
1526 1.88.4.2 nathanw if (finfo != NULL)
1527 1.88.4.2 nathanw fd->sc_skip = (char *)&(finfo->fd_formb_cylno(0)) -
1528 1.88.4.2 nathanw (char *)finfo;
1529 1.88.4.2 nathanw type = fd->sc_type;
1530 1.88.4.2 nathanw sec = fd->sc_blkno % type->seccyl;
1531 1.88.4.2 nathanw nblks = type->seccyl - sec;
1532 1.88.4.2 nathanw nblks = min(nblks, fd->sc_bcount / FD_BSIZE(fd));
1533 1.88.4.2 nathanw nblks = min(nblks, FDC_MAXIOSIZE / FD_BSIZE(fd));
1534 1.88.4.2 nathanw fd->sc_nblks = nblks;
1535 1.88.4.2 nathanw fd->sc_nbytes = finfo ? bp->b_bcount : nblks * FD_BSIZE(fd);
1536 1.88.4.2 nathanw head = sec / type->sectrac;
1537 1.88.4.2 nathanw sec -= head * type->sectrac;
1538 1.88.4.2 nathanw #ifdef DIAGNOSTIC
1539 1.88.4.2 nathanw {int block;
1540 1.88.4.2 nathanw block = (fd->sc_cylin * type->heads + head) * type->sectrac + sec;
1541 1.88.4.2 nathanw if (block != fd->sc_blkno) {
1542 1.88.4.2 nathanw printf("fdcintr: block %d != blkno %d\n", block, fd->sc_blkno);
1543 1.88.4.2 nathanw #ifdef DDB
1544 1.88.4.2 nathanw Debugger();
1545 1.88.4.2 nathanw #endif
1546 1.88.4.2 nathanw }}
1547 1.88.4.2 nathanw #endif
1548 1.88.4.2 nathanw read = bp->b_flags & B_READ;
1549 1.88.4.2 nathanw
1550 1.88.4.2 nathanw /* Setup for pseudo DMA */
1551 1.88.4.2 nathanw fdc->sc_data = bp->b_data + fd->sc_skip;
1552 1.88.4.2 nathanw fdc->sc_tc = fd->sc_nbytes;
1553 1.88.4.2 nathanw
1554 1.88.4.2 nathanw bus_space_write_1(fdc->sc_bustag, fdc->sc_handle,
1555 1.88.4.2 nathanw fdc->sc_reg_drs, type->rate);
1556 1.88.4.2 nathanw #ifdef FD_DEBUG
1557 1.88.4.2 nathanw if (fdc_debug > 1)
1558 1.88.4.2 nathanw printf("fdcstate: doio: %s drive %d "
1559 1.88.4.2 nathanw "track %d head %d sec %d nblks %d\n",
1560 1.88.4.2 nathanw finfo ? "format" :
1561 1.88.4.2 nathanw (read ? "read" : "write"),
1562 1.88.4.2 nathanw fd->sc_drive, fd->sc_cylin, head, sec, nblks);
1563 1.88.4.2 nathanw #endif
1564 1.88.4.2 nathanw fdc->sc_state = IOCOMPLETE;
1565 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_DMA;
1566 1.88.4.2 nathanw fdc->sc_nstat = 0;
1567 1.88.4.2 nathanw
1568 1.88.4.2 nathanw disk_busy(&fd->sc_dk);
1569 1.88.4.2 nathanw
1570 1.88.4.2 nathanw /* allow 3 seconds for operation */
1571 1.88.4.2 nathanw callout_reset(&fdc->sc_timo_ch, 3 * hz, fdctimeout, fdc);
1572 1.88.4.2 nathanw
1573 1.88.4.2 nathanw if (finfo != NULL) {
1574 1.88.4.2 nathanw /* formatting */
1575 1.88.4.2 nathanw FDC_WRFIFO(fdc, NE7CMD_FORMAT);
1576 1.88.4.2 nathanw FDC_WRFIFO(fdc, (head << 2) | fd->sc_drive);
1577 1.88.4.2 nathanw FDC_WRFIFO(fdc, finfo->fd_formb_secshift);
1578 1.88.4.2 nathanw FDC_WRFIFO(fdc, finfo->fd_formb_nsecs);
1579 1.88.4.2 nathanw FDC_WRFIFO(fdc, finfo->fd_formb_gaplen);
1580 1.88.4.2 nathanw FDC_WRFIFO(fdc, finfo->fd_formb_fillbyte);
1581 1.88.4.2 nathanw } else {
1582 1.88.4.2 nathanw if (read)
1583 1.88.4.2 nathanw FDC_WRFIFO(fdc, NE7CMD_READ);
1584 1.88.4.2 nathanw else
1585 1.88.4.2 nathanw FDC_WRFIFO(fdc, NE7CMD_WRITE);
1586 1.88.4.2 nathanw FDC_WRFIFO(fdc, (head << 2) | fd->sc_drive);
1587 1.88.4.2 nathanw FDC_WRFIFO(fdc, fd->sc_cylin); /*track*/
1588 1.88.4.2 nathanw FDC_WRFIFO(fdc, head);
1589 1.88.4.2 nathanw FDC_WRFIFO(fdc, sec + 1); /*sector+1*/
1590 1.88.4.2 nathanw FDC_WRFIFO(fdc, type->secsize);/*sector size*/
1591 1.88.4.2 nathanw FDC_WRFIFO(fdc, type->sectrac);/*secs/track*/
1592 1.88.4.2 nathanw FDC_WRFIFO(fdc, type->gap1); /*gap1 size*/
1593 1.88.4.2 nathanw FDC_WRFIFO(fdc, type->datalen);/*data length*/
1594 1.88.4.2 nathanw }
1595 1.88.4.2 nathanw
1596 1.88.4.2 nathanw return (1); /* will return later */
1597 1.88.4.2 nathanw
1598 1.88.4.2 nathanw case SEEKWAIT:
1599 1.88.4.2 nathanw callout_stop(&fdc->sc_timo_ch);
1600 1.88.4.2 nathanw fdc->sc_state = SEEKCOMPLETE;
1601 1.88.4.2 nathanw if (fdc->sc_flags & FDC_NEEDHEADSETTLE) {
1602 1.88.4.2 nathanw /* allow 1/50 second for heads to settle */
1603 1.88.4.2 nathanw callout_reset(&fdc->sc_intr_ch, hz / 50,
1604 1.88.4.2 nathanw fdcpseudointr, fdc);
1605 1.88.4.2 nathanw return (1); /* will return later */
1606 1.88.4.2 nathanw }
1607 1.88.4.2 nathanw /*FALLTHROUGH*/
1608 1.88.4.2 nathanw case SEEKCOMPLETE:
1609 1.88.4.2 nathanw disk_unbusy(&fd->sc_dk, 0); /* no data on seek */
1610 1.88.4.2 nathanw
1611 1.88.4.2 nathanw /* Make sure seek really happened. */
1612 1.88.4.2 nathanw if (fdc->sc_nstat != 2 || (st0 & 0xf8) != 0x20 ||
1613 1.88.4.2 nathanw cyl != bp->b_cylinder * fd->sc_type->step) {
1614 1.88.4.2 nathanw #ifdef FD_DEBUG
1615 1.88.4.2 nathanw if (fdc_debug)
1616 1.88.4.2 nathanw fdcstatus(fdc, "seek failed");
1617 1.88.4.2 nathanw #endif
1618 1.88.4.2 nathanw fdcretry(fdc);
1619 1.88.4.2 nathanw goto loop;
1620 1.88.4.2 nathanw }
1621 1.88.4.2 nathanw fd->sc_cylin = bp->b_cylinder;
1622 1.88.4.2 nathanw goto doio;
1623 1.88.4.2 nathanw
1624 1.88.4.2 nathanw case IOTIMEDOUT:
1625 1.88.4.2 nathanw /*
1626 1.88.4.2 nathanw * Try to abort the I/O operation without resetting
1627 1.88.4.2 nathanw * the chip first. Poke TC and arrange to pick up
1628 1.88.4.2 nathanw * the timed out I/O command's status.
1629 1.88.4.2 nathanw */
1630 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_RESULT;
1631 1.88.4.2 nathanw fdc->sc_state = IOCLEANUPWAIT;
1632 1.88.4.2 nathanw fdc->sc_nstat = 0;
1633 1.88.4.2 nathanw /* 1/10 second should be enough */
1634 1.88.4.2 nathanw callout_reset(&fdc->sc_timo_ch, hz / 10, fdctimeout, fdc);
1635 1.88.4.2 nathanw FTC_FLIP;
1636 1.88.4.2 nathanw return (1);
1637 1.88.4.2 nathanw
1638 1.88.4.2 nathanw case IOCLEANUPTIMEDOUT:
1639 1.88.4.2 nathanw case SEEKTIMEDOUT:
1640 1.88.4.2 nathanw case RECALTIMEDOUT:
1641 1.88.4.2 nathanw case RESETTIMEDOUT:
1642 1.88.4.2 nathanw fdcstatus(fdc, "timeout");
1643 1.88.4.2 nathanw
1644 1.88.4.2 nathanw /* All other timeouts always roll through to a chip reset */
1645 1.88.4.2 nathanw fdcretry(fdc);
1646 1.88.4.2 nathanw
1647 1.88.4.2 nathanw /* Force reset, no matter what fdcretry() says */
1648 1.88.4.2 nathanw fdc->sc_state = DORESET;
1649 1.88.4.2 nathanw goto loop;
1650 1.88.4.2 nathanw
1651 1.88.4.2 nathanw case IOCLEANUPWAIT: /* IO FAILED, cleanup succeeded */
1652 1.88.4.2 nathanw callout_stop(&fdc->sc_timo_ch);
1653 1.88.4.2 nathanw disk_unbusy(&fd->sc_dk, (bp->b_bcount - bp->b_resid));
1654 1.88.4.2 nathanw fdcretry(fdc);
1655 1.88.4.2 nathanw goto loop;
1656 1.88.4.2 nathanw
1657 1.88.4.2 nathanw case IOCOMPLETE: /* IO DONE, post-analyze */
1658 1.88.4.2 nathanw callout_stop(&fdc->sc_timo_ch);
1659 1.88.4.2 nathanw
1660 1.88.4.2 nathanw disk_unbusy(&fd->sc_dk, (bp->b_bcount - bp->b_resid));
1661 1.88.4.2 nathanw
1662 1.88.4.2 nathanw if (fdc->sc_nstat != 7 || st1 != 0 ||
1663 1.88.4.2 nathanw ((st0 & 0xf8) != 0 &&
1664 1.88.4.2 nathanw ((st0 & 0xf8) != 0x20 || (fdc->sc_cfg & CFG_EIS) == 0))) {
1665 1.88.4.2 nathanw #ifdef FD_DEBUG
1666 1.88.4.2 nathanw if (fdc_debug) {
1667 1.88.4.2 nathanw fdcstatus(fdc,
1668 1.88.4.2 nathanw bp->b_flags & B_READ
1669 1.88.4.2 nathanw ? "read failed" : "write failed");
1670 1.88.4.2 nathanw printf("blkno %d nblks %d nstat %d tc %d\n",
1671 1.88.4.2 nathanw fd->sc_blkno, fd->sc_nblks,
1672 1.88.4.2 nathanw fdc->sc_nstat, fdc->sc_tc);
1673 1.88.4.2 nathanw }
1674 1.88.4.2 nathanw #endif
1675 1.88.4.2 nathanw if (fdc->sc_nstat == 7 &&
1676 1.88.4.2 nathanw (st1 & ST1_OVERRUN) == ST1_OVERRUN) {
1677 1.88.4.2 nathanw
1678 1.88.4.2 nathanw /*
1679 1.88.4.2 nathanw * Silently retry overruns if no other
1680 1.88.4.2 nathanw * error bit is set. Adjust threshold.
1681 1.88.4.2 nathanw */
1682 1.88.4.2 nathanw int thr = fdc->sc_cfg & CFG_THRHLD_MASK;
1683 1.88.4.2 nathanw if (thr < 15) {
1684 1.88.4.2 nathanw thr++;
1685 1.88.4.2 nathanw fdc->sc_cfg &= ~CFG_THRHLD_MASK;
1686 1.88.4.2 nathanw fdc->sc_cfg |= (thr & CFG_THRHLD_MASK);
1687 1.88.4.2 nathanw #ifdef FD_DEBUG
1688 1.88.4.2 nathanw if (fdc_debug)
1689 1.88.4.2 nathanw printf("fdc: %d -> threshold\n", thr);
1690 1.88.4.2 nathanw #endif
1691 1.88.4.2 nathanw fdconf(fdc);
1692 1.88.4.2 nathanw fdc->sc_overruns = 0;
1693 1.88.4.2 nathanw }
1694 1.88.4.2 nathanw if (++fdc->sc_overruns < 3) {
1695 1.88.4.2 nathanw fdc->sc_state = DOIO;
1696 1.88.4.2 nathanw goto loop;
1697 1.88.4.2 nathanw }
1698 1.88.4.2 nathanw }
1699 1.88.4.2 nathanw fdcretry(fdc);
1700 1.88.4.2 nathanw goto loop;
1701 1.88.4.2 nathanw }
1702 1.88.4.2 nathanw if (fdc->sc_errors) {
1703 1.88.4.2 nathanw diskerr(bp, "fd", "soft error", LOG_PRINTF,
1704 1.88.4.2 nathanw fd->sc_skip / FD_BSIZE(fd),
1705 1.88.4.2 nathanw (struct disklabel *)NULL);
1706 1.88.4.2 nathanw printf("\n");
1707 1.88.4.2 nathanw fdc->sc_errors = 0;
1708 1.88.4.2 nathanw } else {
1709 1.88.4.2 nathanw if (--fdc->sc_overruns < -20) {
1710 1.88.4.2 nathanw int thr = fdc->sc_cfg & CFG_THRHLD_MASK;
1711 1.88.4.2 nathanw if (thr > 0) {
1712 1.88.4.2 nathanw thr--;
1713 1.88.4.2 nathanw fdc->sc_cfg &= ~CFG_THRHLD_MASK;
1714 1.88.4.2 nathanw fdc->sc_cfg |= (thr & CFG_THRHLD_MASK);
1715 1.88.4.2 nathanw #ifdef FD_DEBUG
1716 1.88.4.2 nathanw if (fdc_debug)
1717 1.88.4.2 nathanw printf("fdc: %d -> threshold\n", thr);
1718 1.88.4.2 nathanw #endif
1719 1.88.4.2 nathanw fdconf(fdc);
1720 1.88.4.2 nathanw }
1721 1.88.4.2 nathanw fdc->sc_overruns = 0;
1722 1.88.4.2 nathanw }
1723 1.88.4.2 nathanw }
1724 1.88.4.2 nathanw fd->sc_blkno += fd->sc_nblks;
1725 1.88.4.2 nathanw fd->sc_skip += fd->sc_nbytes;
1726 1.88.4.2 nathanw fd->sc_bcount -= fd->sc_nbytes;
1727 1.88.4.2 nathanw if (finfo == NULL && fd->sc_bcount > 0) {
1728 1.88.4.2 nathanw bp->b_cylinder = fd->sc_blkno / fd->sc_type->seccyl;
1729 1.88.4.2 nathanw goto doseek;
1730 1.88.4.2 nathanw }
1731 1.88.4.2 nathanw fdfinish(fd, bp);
1732 1.88.4.2 nathanw goto loop;
1733 1.88.4.2 nathanw
1734 1.88.4.2 nathanw case DORESET:
1735 1.88.4.2 nathanw /* try a reset, keep motor on */
1736 1.88.4.2 nathanw fd_set_motor(fdc);
1737 1.88.4.2 nathanw delay(100);
1738 1.88.4.2 nathanw fdc->sc_nstat = 0;
1739 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_SENSEI;
1740 1.88.4.2 nathanw fdc->sc_state = RESETCOMPLETE;
1741 1.88.4.2 nathanw callout_reset(&fdc->sc_timo_ch, hz / 2, fdctimeout, fdc);
1742 1.88.4.2 nathanw fdc_reset(fdc);
1743 1.88.4.2 nathanw return (1); /* will return later */
1744 1.88.4.2 nathanw
1745 1.88.4.2 nathanw case RESETCOMPLETE:
1746 1.88.4.2 nathanw callout_stop(&fdc->sc_timo_ch);
1747 1.88.4.2 nathanw fdconf(fdc);
1748 1.88.4.2 nathanw
1749 1.88.4.2 nathanw /* FALLTHROUGH */
1750 1.88.4.2 nathanw case DORECAL:
1751 1.88.4.2 nathanw fdc->sc_state = RECALWAIT;
1752 1.88.4.2 nathanw fdc->sc_itask = FDC_ITASK_SENSEI;
1753 1.88.4.2 nathanw fdc->sc_nstat = 0;
1754 1.88.4.2 nathanw callout_reset(&fdc->sc_timo_ch, 5 * hz, fdctimeout, fdc);
1755 1.88.4.2 nathanw /* recalibrate function */
1756 1.88.4.2 nathanw FDC_WRFIFO(fdc, NE7CMD_RECAL);
1757 1.88.4.2 nathanw FDC_WRFIFO(fdc, fd->sc_drive);
1758 1.88.4.2 nathanw return (1); /* will return later */
1759 1.88.4.2 nathanw
1760 1.88.4.2 nathanw case RECALWAIT:
1761 1.88.4.2 nathanw callout_stop(&fdc->sc_timo_ch);
1762 1.88.4.2 nathanw fdc->sc_state = RECALCOMPLETE;
1763 1.88.4.2 nathanw if (fdc->sc_flags & FDC_NEEDHEADSETTLE) {
1764 1.88.4.2 nathanw /* allow 1/30 second for heads to settle */
1765 1.88.4.2 nathanw callout_reset(&fdc->sc_intr_ch, hz / 30,
1766 1.88.4.2 nathanw fdcpseudointr, fdc);
1767 1.88.4.2 nathanw return (1); /* will return later */
1768 1.88.4.2 nathanw }
1769 1.88.4.2 nathanw
1770 1.88.4.2 nathanw case RECALCOMPLETE:
1771 1.88.4.2 nathanw if (fdc->sc_nstat != 2 || (st0 & 0xf8) != 0x20 || cyl != 0) {
1772 1.88.4.2 nathanw #ifdef FD_DEBUG
1773 1.88.4.2 nathanw if (fdc_debug)
1774 1.88.4.2 nathanw fdcstatus(fdc, "recalibrate failed");
1775 1.88.4.2 nathanw #endif
1776 1.88.4.2 nathanw fdcretry(fdc);
1777 1.88.4.2 nathanw goto loop;
1778 1.88.4.2 nathanw }
1779 1.88.4.2 nathanw fd->sc_cylin = 0;
1780 1.88.4.2 nathanw goto doseek;
1781 1.88.4.2 nathanw
1782 1.88.4.2 nathanw case MOTORWAIT:
1783 1.88.4.2 nathanw if (fd->sc_flags & FD_MOTOR_WAIT)
1784 1.88.4.2 nathanw return (1); /* time's not up yet */
1785 1.88.4.2 nathanw goto doseek;
1786 1.88.4.2 nathanw
1787 1.88.4.2 nathanw default:
1788 1.88.4.2 nathanw fdcstatus(fdc, "stray interrupt");
1789 1.88.4.2 nathanw return (1);
1790 1.88.4.2 nathanw }
1791 1.88.4.2 nathanw #ifdef DIAGNOSTIC
1792 1.88.4.2 nathanw panic("fdcintr: impossible");
1793 1.88.4.2 nathanw #endif
1794 1.88.4.2 nathanw
1795 1.88.4.2 nathanw xxx:
1796 1.88.4.2 nathanw /*
1797 1.88.4.2 nathanw * We get here if the chip locks up in FDC_WRFIFO()
1798 1.88.4.2 nathanw * Cancel any operation and schedule a reset
1799 1.88.4.2 nathanw */
1800 1.88.4.2 nathanw callout_stop(&fdc->sc_timo_ch);
1801 1.88.4.2 nathanw fdcretry(fdc);
1802 1.88.4.2 nathanw (fdc)->sc_state = DORESET;
1803 1.88.4.2 nathanw goto loop;
1804 1.88.4.2 nathanw
1805 1.88.4.2 nathanw #undef st0
1806 1.88.4.2 nathanw #undef st1
1807 1.88.4.2 nathanw #undef cyl
1808 1.88.4.2 nathanw }
1809 1.88.4.2 nathanw
1810 1.88.4.2 nathanw void
1811 1.88.4.2 nathanw fdcretry(fdc)
1812 1.88.4.2 nathanw struct fdc_softc *fdc;
1813 1.88.4.2 nathanw {
1814 1.88.4.2 nathanw struct fd_softc *fd;
1815 1.88.4.2 nathanw struct buf *bp;
1816 1.88.4.2 nathanw int error = EIO;
1817 1.88.4.2 nathanw
1818 1.88.4.2 nathanw fd = fdc->sc_drives.tqh_first;
1819 1.88.4.3 nathanw bp = BUFQ_PEEK(&fd->sc_q);
1820 1.88.4.2 nathanw
1821 1.88.4.2 nathanw fdc->sc_overruns = 0;
1822 1.88.4.2 nathanw if (fd->sc_opts & FDOPT_NORETRY)
1823 1.88.4.2 nathanw goto fail;
1824 1.88.4.2 nathanw
1825 1.88.4.2 nathanw switch (fdc->sc_errors) {
1826 1.88.4.2 nathanw case 0:
1827 1.88.4.2 nathanw if (fdc->sc_nstat == 7 &&
1828 1.88.4.2 nathanw (fdc->sc_status[0] & 0xd8) == 0x40 &&
1829 1.88.4.2 nathanw (fdc->sc_status[1] & 0x2) == 0x2) {
1830 1.88.4.2 nathanw printf("%s: read-only medium\n", fd->sc_dv.dv_xname);
1831 1.88.4.2 nathanw error = EROFS;
1832 1.88.4.2 nathanw goto failsilent;
1833 1.88.4.2 nathanw }
1834 1.88.4.2 nathanw /* try again */
1835 1.88.4.2 nathanw fdc->sc_state =
1836 1.88.4.2 nathanw (fdc->sc_flags & FDC_EIS) ? DOIO : DOSEEK;
1837 1.88.4.2 nathanw break;
1838 1.88.4.2 nathanw
1839 1.88.4.2 nathanw case 1: case 2: case 3:
1840 1.88.4.2 nathanw /* didn't work; try recalibrating */
1841 1.88.4.2 nathanw fdc->sc_state = DORECAL;
1842 1.88.4.2 nathanw break;
1843 1.88.4.2 nathanw
1844 1.88.4.2 nathanw case 4:
1845 1.88.4.2 nathanw if (fdc->sc_nstat == 7 &&
1846 1.88.4.2 nathanw fdc->sc_status[0] == 0 &&
1847 1.88.4.2 nathanw fdc->sc_status[1] == 0 &&
1848 1.88.4.2 nathanw fdc->sc_status[2] == 0) {
1849 1.88.4.2 nathanw /*
1850 1.88.4.2 nathanw * We've retried a few times and we've got
1851 1.88.4.2 nathanw * valid status and all three status bytes
1852 1.88.4.2 nathanw * are zero. Assume this condition is the
1853 1.88.4.2 nathanw * result of no disk loaded into the drive.
1854 1.88.4.2 nathanw */
1855 1.88.4.2 nathanw printf("%s: no medium?\n", fd->sc_dv.dv_xname);
1856 1.88.4.2 nathanw error = ENODEV;
1857 1.88.4.2 nathanw goto failsilent;
1858 1.88.4.2 nathanw }
1859 1.88.4.2 nathanw
1860 1.88.4.2 nathanw /* still no go; reset the bastard */
1861 1.88.4.2 nathanw fdc->sc_state = DORESET;
1862 1.88.4.2 nathanw break;
1863 1.88.4.2 nathanw
1864 1.88.4.2 nathanw default:
1865 1.88.4.2 nathanw fail:
1866 1.88.4.2 nathanw if ((fd->sc_opts & FDOPT_SILENT) == 0) {
1867 1.88.4.2 nathanw diskerr(bp, "fd", "hard error", LOG_PRINTF,
1868 1.88.4.2 nathanw fd->sc_skip / FD_BSIZE(fd),
1869 1.88.4.2 nathanw (struct disklabel *)NULL);
1870 1.88.4.2 nathanw printf("\n");
1871 1.88.4.2 nathanw fdcstatus(fdc, "controller status");
1872 1.88.4.2 nathanw }
1873 1.88.4.2 nathanw
1874 1.88.4.2 nathanw failsilent:
1875 1.88.4.2 nathanw bp->b_flags |= B_ERROR;
1876 1.88.4.2 nathanw bp->b_error = error;
1877 1.88.4.2 nathanw fdfinish(fd, bp);
1878 1.88.4.2 nathanw }
1879 1.88.4.2 nathanw fdc->sc_errors++;
1880 1.88.4.2 nathanw }
1881 1.88.4.2 nathanw
1882 1.88.4.2 nathanw int
1883 1.88.4.2 nathanw fdioctl(dev, cmd, addr, flag, p)
1884 1.88.4.2 nathanw dev_t dev;
1885 1.88.4.2 nathanw u_long cmd;
1886 1.88.4.2 nathanw caddr_t addr;
1887 1.88.4.2 nathanw int flag;
1888 1.88.4.2 nathanw struct proc *p;
1889 1.88.4.2 nathanw {
1890 1.88.4.2 nathanw struct fd_softc *fd;
1891 1.88.4.2 nathanw struct fdc_softc *fdc;
1892 1.88.4.2 nathanw struct fdformat_parms *form_parms;
1893 1.88.4.2 nathanw struct fdformat_cmd *form_cmd;
1894 1.88.4.2 nathanw struct ne7_fd_formb *fd_formb;
1895 1.88.4.2 nathanw int il[FD_MAX_NSEC + 1];
1896 1.88.4.2 nathanw int unit;
1897 1.88.4.2 nathanw int i, j;
1898 1.88.4.2 nathanw int error;
1899 1.88.4.2 nathanw
1900 1.88.4.2 nathanw unit = FDUNIT(dev);
1901 1.88.4.2 nathanw if (unit >= fd_cd.cd_ndevs)
1902 1.88.4.2 nathanw return (ENXIO);
1903 1.88.4.2 nathanw
1904 1.88.4.2 nathanw fd = fd_cd.cd_devs[FDUNIT(dev)];
1905 1.88.4.2 nathanw fdc = (struct fdc_softc *)fd->sc_dv.dv_parent;
1906 1.88.4.2 nathanw
1907 1.88.4.2 nathanw switch (cmd) {
1908 1.88.4.2 nathanw case DIOCGDINFO:
1909 1.88.4.2 nathanw *(struct disklabel *)addr = *(fd->sc_dk.dk_label);
1910 1.88.4.2 nathanw return 0;
1911 1.88.4.2 nathanw
1912 1.88.4.2 nathanw case DIOCWLABEL:
1913 1.88.4.2 nathanw if ((flag & FWRITE) == 0)
1914 1.88.4.2 nathanw return EBADF;
1915 1.88.4.2 nathanw /* XXX do something */
1916 1.88.4.2 nathanw return (0);
1917 1.88.4.2 nathanw
1918 1.88.4.2 nathanw case DIOCWDINFO:
1919 1.88.4.2 nathanw if ((flag & FWRITE) == 0)
1920 1.88.4.2 nathanw return (EBADF);
1921 1.88.4.2 nathanw
1922 1.88.4.2 nathanw error = setdisklabel(fd->sc_dk.dk_label,
1923 1.88.4.2 nathanw (struct disklabel *)addr, 0,
1924 1.88.4.2 nathanw fd->sc_dk.dk_cpulabel);
1925 1.88.4.2 nathanw if (error)
1926 1.88.4.2 nathanw return (error);
1927 1.88.4.2 nathanw
1928 1.88.4.2 nathanw error = writedisklabel(dev, fdstrategy,
1929 1.88.4.2 nathanw fd->sc_dk.dk_label,
1930 1.88.4.2 nathanw fd->sc_dk.dk_cpulabel);
1931 1.88.4.2 nathanw return (error);
1932 1.88.4.2 nathanw
1933 1.88.4.2 nathanw case DIOCLOCK:
1934 1.88.4.2 nathanw /*
1935 1.88.4.2 nathanw * Nothing to do here, really.
1936 1.88.4.2 nathanw */
1937 1.88.4.2 nathanw return (0);
1938 1.88.4.2 nathanw
1939 1.88.4.2 nathanw case DIOCEJECT:
1940 1.88.4.2 nathanw if (*(int *)addr == 0) {
1941 1.88.4.2 nathanw int part = DISKPART(dev);
1942 1.88.4.2 nathanw /*
1943 1.88.4.2 nathanw * Don't force eject: check that we are the only
1944 1.88.4.2 nathanw * partition open. If so, unlock it.
1945 1.88.4.2 nathanw */
1946 1.88.4.2 nathanw if ((fd->sc_dk.dk_openmask & ~(1 << part)) != 0 ||
1947 1.88.4.2 nathanw fd->sc_dk.dk_bopenmask + fd->sc_dk.dk_copenmask !=
1948 1.88.4.2 nathanw fd->sc_dk.dk_openmask) {
1949 1.88.4.2 nathanw return (EBUSY);
1950 1.88.4.2 nathanw }
1951 1.88.4.2 nathanw }
1952 1.88.4.2 nathanw /* FALLTHROUGH */
1953 1.88.4.2 nathanw case ODIOCEJECT:
1954 1.88.4.2 nathanw fd_do_eject(fd);
1955 1.88.4.2 nathanw return (0);
1956 1.88.4.2 nathanw
1957 1.88.4.2 nathanw case FDIOCGETFORMAT:
1958 1.88.4.2 nathanw form_parms = (struct fdformat_parms *)addr;
1959 1.88.4.2 nathanw form_parms->fdformat_version = FDFORMAT_VERSION;
1960 1.88.4.2 nathanw form_parms->nbps = 128 * (1 << fd->sc_type->secsize);
1961 1.88.4.2 nathanw form_parms->ncyl = fd->sc_type->cylinders;
1962 1.88.4.2 nathanw form_parms->nspt = fd->sc_type->sectrac;
1963 1.88.4.2 nathanw form_parms->ntrk = fd->sc_type->heads;
1964 1.88.4.2 nathanw form_parms->stepspercyl = fd->sc_type->step;
1965 1.88.4.2 nathanw form_parms->gaplen = fd->sc_type->gap2;
1966 1.88.4.2 nathanw form_parms->fillbyte = fd->sc_type->fillbyte;
1967 1.88.4.2 nathanw form_parms->interleave = fd->sc_type->interleave;
1968 1.88.4.2 nathanw switch (fd->sc_type->rate) {
1969 1.88.4.2 nathanw case FDC_500KBPS:
1970 1.88.4.2 nathanw form_parms->xfer_rate = 500 * 1024;
1971 1.88.4.2 nathanw break;
1972 1.88.4.2 nathanw case FDC_300KBPS:
1973 1.88.4.2 nathanw form_parms->xfer_rate = 300 * 1024;
1974 1.88.4.2 nathanw break;
1975 1.88.4.2 nathanw case FDC_250KBPS:
1976 1.88.4.2 nathanw form_parms->xfer_rate = 250 * 1024;
1977 1.88.4.2 nathanw break;
1978 1.88.4.2 nathanw default:
1979 1.88.4.2 nathanw return (EINVAL);
1980 1.88.4.2 nathanw }
1981 1.88.4.2 nathanw return (0);
1982 1.88.4.2 nathanw
1983 1.88.4.2 nathanw case FDIOCSETFORMAT:
1984 1.88.4.2 nathanw if ((flag & FWRITE) == 0)
1985 1.88.4.2 nathanw return (EBADF); /* must be opened for writing */
1986 1.88.4.2 nathanw
1987 1.88.4.2 nathanw form_parms = (struct fdformat_parms *)addr;
1988 1.88.4.2 nathanw if (form_parms->fdformat_version != FDFORMAT_VERSION)
1989 1.88.4.2 nathanw return (EINVAL);/* wrong version of formatting prog */
1990 1.88.4.2 nathanw
1991 1.88.4.2 nathanw i = form_parms->nbps >> 7;
1992 1.88.4.2 nathanw if ((form_parms->nbps & 0x7f) || ffs(i) == 0 ||
1993 1.88.4.2 nathanw i & ~(1 << (ffs(i)-1)))
1994 1.88.4.2 nathanw /* not a power-of-two multiple of 128 */
1995 1.88.4.2 nathanw return (EINVAL);
1996 1.88.4.2 nathanw
1997 1.88.4.2 nathanw switch (form_parms->xfer_rate) {
1998 1.88.4.2 nathanw case 500 * 1024:
1999 1.88.4.2 nathanw fd->sc_type->rate = FDC_500KBPS;
2000 1.88.4.2 nathanw break;
2001 1.88.4.2 nathanw case 300 * 1024:
2002 1.88.4.2 nathanw fd->sc_type->rate = FDC_300KBPS;
2003 1.88.4.2 nathanw break;
2004 1.88.4.2 nathanw case 250 * 1024:
2005 1.88.4.2 nathanw fd->sc_type->rate = FDC_250KBPS;
2006 1.88.4.2 nathanw break;
2007 1.88.4.2 nathanw default:
2008 1.88.4.2 nathanw return (EINVAL);
2009 1.88.4.2 nathanw }
2010 1.88.4.2 nathanw
2011 1.88.4.2 nathanw if (form_parms->nspt > FD_MAX_NSEC ||
2012 1.88.4.2 nathanw form_parms->fillbyte > 0xff ||
2013 1.88.4.2 nathanw form_parms->interleave > 0xff)
2014 1.88.4.2 nathanw return EINVAL;
2015 1.88.4.2 nathanw fd->sc_type->sectrac = form_parms->nspt;
2016 1.88.4.2 nathanw if (form_parms->ntrk != 2 && form_parms->ntrk != 1)
2017 1.88.4.2 nathanw return EINVAL;
2018 1.88.4.2 nathanw fd->sc_type->heads = form_parms->ntrk;
2019 1.88.4.2 nathanw fd->sc_type->seccyl = form_parms->nspt * form_parms->ntrk;
2020 1.88.4.2 nathanw fd->sc_type->secsize = ffs(i)-1;
2021 1.88.4.2 nathanw fd->sc_type->gap2 = form_parms->gaplen;
2022 1.88.4.2 nathanw fd->sc_type->cylinders = form_parms->ncyl;
2023 1.88.4.2 nathanw fd->sc_type->size = fd->sc_type->seccyl * form_parms->ncyl *
2024 1.88.4.2 nathanw form_parms->nbps / DEV_BSIZE;
2025 1.88.4.2 nathanw fd->sc_type->step = form_parms->stepspercyl;
2026 1.88.4.2 nathanw fd->sc_type->fillbyte = form_parms->fillbyte;
2027 1.88.4.2 nathanw fd->sc_type->interleave = form_parms->interleave;
2028 1.88.4.2 nathanw return (0);
2029 1.88.4.2 nathanw
2030 1.88.4.2 nathanw case FDIOCFORMAT_TRACK:
2031 1.88.4.2 nathanw if((flag & FWRITE) == 0)
2032 1.88.4.2 nathanw /* must be opened for writing */
2033 1.88.4.2 nathanw return (EBADF);
2034 1.88.4.2 nathanw form_cmd = (struct fdformat_cmd *)addr;
2035 1.88.4.2 nathanw if (form_cmd->formatcmd_version != FDFORMAT_VERSION)
2036 1.88.4.2 nathanw /* wrong version of formatting prog */
2037 1.88.4.2 nathanw return (EINVAL);
2038 1.88.4.2 nathanw
2039 1.88.4.2 nathanw if (form_cmd->head >= fd->sc_type->heads ||
2040 1.88.4.2 nathanw form_cmd->cylinder >= fd->sc_type->cylinders) {
2041 1.88.4.2 nathanw return (EINVAL);
2042 1.88.4.2 nathanw }
2043 1.88.4.2 nathanw
2044 1.88.4.2 nathanw fd_formb = malloc(sizeof(struct ne7_fd_formb),
2045 1.88.4.2 nathanw M_TEMP, M_NOWAIT);
2046 1.88.4.2 nathanw if (fd_formb == 0)
2047 1.88.4.2 nathanw return (ENOMEM);
2048 1.88.4.2 nathanw
2049 1.88.4.2 nathanw fd_formb->head = form_cmd->head;
2050 1.88.4.2 nathanw fd_formb->cyl = form_cmd->cylinder;
2051 1.88.4.2 nathanw fd_formb->transfer_rate = fd->sc_type->rate;
2052 1.88.4.2 nathanw fd_formb->fd_formb_secshift = fd->sc_type->secsize;
2053 1.88.4.2 nathanw fd_formb->fd_formb_nsecs = fd->sc_type->sectrac;
2054 1.88.4.2 nathanw fd_formb->fd_formb_gaplen = fd->sc_type->gap2;
2055 1.88.4.2 nathanw fd_formb->fd_formb_fillbyte = fd->sc_type->fillbyte;
2056 1.88.4.2 nathanw
2057 1.88.4.2 nathanw bzero(il, sizeof il);
2058 1.88.4.2 nathanw for (j = 0, i = 1; i <= fd_formb->fd_formb_nsecs; i++) {
2059 1.88.4.2 nathanw while (il[(j%fd_formb->fd_formb_nsecs) + 1])
2060 1.88.4.2 nathanw j++;
2061 1.88.4.2 nathanw il[(j%fd_formb->fd_formb_nsecs) + 1] = i;
2062 1.88.4.2 nathanw j += fd->sc_type->interleave;
2063 1.88.4.2 nathanw }
2064 1.88.4.2 nathanw for (i = 0; i < fd_formb->fd_formb_nsecs; i++) {
2065 1.88.4.2 nathanw fd_formb->fd_formb_cylno(i) = form_cmd->cylinder;
2066 1.88.4.2 nathanw fd_formb->fd_formb_headno(i) = form_cmd->head;
2067 1.88.4.2 nathanw fd_formb->fd_formb_secno(i) = il[i+1];
2068 1.88.4.2 nathanw fd_formb->fd_formb_secsize(i) = fd->sc_type->secsize;
2069 1.88.4.2 nathanw }
2070 1.88.4.2 nathanw
2071 1.88.4.2 nathanw error = fdformat(dev, fd_formb, p);
2072 1.88.4.2 nathanw free(fd_formb, M_TEMP);
2073 1.88.4.2 nathanw return error;
2074 1.88.4.2 nathanw
2075 1.88.4.2 nathanw case FDIOCGETOPTS: /* get drive options */
2076 1.88.4.2 nathanw *(int *)addr = fd->sc_opts;
2077 1.88.4.2 nathanw return (0);
2078 1.88.4.2 nathanw
2079 1.88.4.2 nathanw case FDIOCSETOPTS: /* set drive options */
2080 1.88.4.2 nathanw fd->sc_opts = *(int *)addr;
2081 1.88.4.2 nathanw return (0);
2082 1.88.4.2 nathanw
2083 1.88.4.2 nathanw #ifdef FD_DEBUG
2084 1.88.4.2 nathanw case _IO('f', 100):
2085 1.88.4.2 nathanw fdc_wrfifo(fdc, NE7CMD_DUMPREG);
2086 1.88.4.2 nathanw fdcresult(fdc);
2087 1.88.4.2 nathanw printf("fdc: dumpreg(%d regs): <", fdc->sc_nstat);
2088 1.88.4.2 nathanw for (i = 0; i < fdc->sc_nstat; i++)
2089 1.88.4.2 nathanw printf(" 0x%x", fdc->sc_status[i]);
2090 1.88.4.2 nathanw printf(">\n");
2091 1.88.4.2 nathanw return (0);
2092 1.88.4.2 nathanw
2093 1.88.4.2 nathanw case _IOW('f', 101, int):
2094 1.88.4.2 nathanw fdc->sc_cfg &= ~CFG_THRHLD_MASK;
2095 1.88.4.2 nathanw fdc->sc_cfg |= (*(int *)addr & CFG_THRHLD_MASK);
2096 1.88.4.2 nathanw fdconf(fdc);
2097 1.88.4.2 nathanw return (0);
2098 1.88.4.2 nathanw
2099 1.88.4.2 nathanw case _IO('f', 102):
2100 1.88.4.2 nathanw fdc_wrfifo(fdc, NE7CMD_SENSEI);
2101 1.88.4.2 nathanw fdcresult(fdc);
2102 1.88.4.2 nathanw printf("fdc: sensei(%d regs): <", fdc->sc_nstat);
2103 1.88.4.2 nathanw for (i=0; i< fdc->sc_nstat; i++)
2104 1.88.4.2 nathanw printf(" 0x%x", fdc->sc_status[i]);
2105 1.88.4.2 nathanw printf(">\n");
2106 1.88.4.2 nathanw return (0);
2107 1.88.4.2 nathanw #endif
2108 1.88.4.2 nathanw default:
2109 1.88.4.2 nathanw return (ENOTTY);
2110 1.88.4.2 nathanw }
2111 1.88.4.2 nathanw
2112 1.88.4.2 nathanw #ifdef DIAGNOSTIC
2113 1.88.4.2 nathanw panic("fdioctl: impossible");
2114 1.88.4.2 nathanw #endif
2115 1.88.4.2 nathanw }
2116 1.88.4.2 nathanw
2117 1.88.4.2 nathanw int
2118 1.88.4.2 nathanw fdformat(dev, finfo, p)
2119 1.88.4.2 nathanw dev_t dev;
2120 1.88.4.2 nathanw struct ne7_fd_formb *finfo;
2121 1.88.4.2 nathanw struct proc *p;
2122 1.88.4.2 nathanw {
2123 1.88.4.2 nathanw int rv = 0, s;
2124 1.88.4.2 nathanw struct fd_softc *fd = fd_cd.cd_devs[FDUNIT(dev)];
2125 1.88.4.2 nathanw struct fd_type *type = fd->sc_type;
2126 1.88.4.2 nathanw struct buf *bp;
2127 1.88.4.2 nathanw
2128 1.88.4.2 nathanw /* set up a buffer header for fdstrategy() */
2129 1.88.4.2 nathanw bp = (struct buf *)malloc(sizeof(struct buf), M_TEMP, M_NOWAIT);
2130 1.88.4.2 nathanw if (bp == 0)
2131 1.88.4.2 nathanw return (ENOBUFS);
2132 1.88.4.2 nathanw
2133 1.88.4.2 nathanw memset((void *)bp, 0, sizeof(struct buf));
2134 1.88.4.2 nathanw bp->b_flags = B_BUSY | B_PHYS | B_FORMAT;
2135 1.88.4.2 nathanw bp->b_proc = p;
2136 1.88.4.2 nathanw bp->b_dev = dev;
2137 1.88.4.2 nathanw
2138 1.88.4.2 nathanw /*
2139 1.88.4.2 nathanw * Calculate a fake blkno, so fdstrategy() would initiate a
2140 1.88.4.2 nathanw * seek to the requested cylinder.
2141 1.88.4.2 nathanw */
2142 1.88.4.2 nathanw bp->b_blkno = ((finfo->cyl * (type->sectrac * type->heads)
2143 1.88.4.2 nathanw + finfo->head * type->sectrac) * FD_BSIZE(fd))
2144 1.88.4.2 nathanw / DEV_BSIZE;
2145 1.88.4.2 nathanw
2146 1.88.4.2 nathanw bp->b_bcount = sizeof(struct fd_idfield_data) * finfo->fd_formb_nsecs;
2147 1.88.4.2 nathanw bp->b_data = (caddr_t)finfo;
2148 1.88.4.2 nathanw
2149 1.88.4.2 nathanw #ifdef FD_DEBUG
2150 1.88.4.2 nathanw if (fdc_debug) {
2151 1.88.4.2 nathanw int i;
2152 1.88.4.2 nathanw
2153 1.88.4.2 nathanw printf("fdformat: blkno 0x%x count %ld\n",
2154 1.88.4.2 nathanw bp->b_blkno, bp->b_bcount);
2155 1.88.4.2 nathanw
2156 1.88.4.2 nathanw printf("\tcyl:\t%d\n", finfo->cyl);
2157 1.88.4.2 nathanw printf("\thead:\t%d\n", finfo->head);
2158 1.88.4.2 nathanw printf("\tnsecs:\t%d\n", finfo->fd_formb_nsecs);
2159 1.88.4.2 nathanw printf("\tsshft:\t%d\n", finfo->fd_formb_secshift);
2160 1.88.4.2 nathanw printf("\tgaplen:\t%d\n", finfo->fd_formb_gaplen);
2161 1.88.4.2 nathanw printf("\ttrack data:");
2162 1.88.4.2 nathanw for (i = 0; i < finfo->fd_formb_nsecs; i++) {
2163 1.88.4.2 nathanw printf(" [c%d h%d s%d]",
2164 1.88.4.2 nathanw finfo->fd_formb_cylno(i),
2165 1.88.4.2 nathanw finfo->fd_formb_headno(i),
2166 1.88.4.2 nathanw finfo->fd_formb_secno(i) );
2167 1.88.4.2 nathanw if (finfo->fd_formb_secsize(i) != 2)
2168 1.88.4.2 nathanw printf("<sz:%d>", finfo->fd_formb_secsize(i));
2169 1.88.4.2 nathanw }
2170 1.88.4.2 nathanw printf("\n");
2171 1.88.4.2 nathanw }
2172 1.88.4.2 nathanw #endif
2173 1.88.4.2 nathanw
2174 1.88.4.2 nathanw /* now do the format */
2175 1.88.4.2 nathanw fdstrategy(bp);
2176 1.88.4.2 nathanw
2177 1.88.4.2 nathanw /* ...and wait for it to complete */
2178 1.88.4.2 nathanw s = splbio();
2179 1.88.4.2 nathanw while (!(bp->b_flags & B_DONE)) {
2180 1.88.4.2 nathanw rv = tsleep((caddr_t)bp, PRIBIO, "fdform", 20 * hz);
2181 1.88.4.2 nathanw if (rv == EWOULDBLOCK)
2182 1.88.4.2 nathanw break;
2183 1.88.4.2 nathanw }
2184 1.88.4.2 nathanw splx(s);
2185 1.88.4.2 nathanw
2186 1.88.4.2 nathanw if (rv == EWOULDBLOCK) {
2187 1.88.4.2 nathanw /* timed out */
2188 1.88.4.2 nathanw rv = EIO;
2189 1.88.4.2 nathanw biodone(bp);
2190 1.88.4.2 nathanw }
2191 1.88.4.2 nathanw if (bp->b_flags & B_ERROR) {
2192 1.88.4.2 nathanw rv = bp->b_error;
2193 1.88.4.2 nathanw }
2194 1.88.4.2 nathanw free(bp, M_TEMP);
2195 1.88.4.2 nathanw return (rv);
2196 1.88.4.2 nathanw }
2197 1.88.4.2 nathanw
2198 1.88.4.2 nathanw void
2199 1.88.4.2 nathanw fdgetdisklabel(dev)
2200 1.88.4.2 nathanw dev_t dev;
2201 1.88.4.2 nathanw {
2202 1.88.4.2 nathanw int unit = FDUNIT(dev), i;
2203 1.88.4.2 nathanw struct fd_softc *fd = fd_cd.cd_devs[unit];
2204 1.88.4.2 nathanw struct disklabel *lp = fd->sc_dk.dk_label;
2205 1.88.4.2 nathanw struct cpu_disklabel *clp = fd->sc_dk.dk_cpulabel;
2206 1.88.4.2 nathanw
2207 1.88.4.2 nathanw bzero(lp, sizeof(struct disklabel));
2208 1.88.4.2 nathanw bzero(lp, sizeof(struct cpu_disklabel));
2209 1.88.4.2 nathanw
2210 1.88.4.2 nathanw lp->d_type = DTYPE_FLOPPY;
2211 1.88.4.2 nathanw lp->d_secsize = FD_BSIZE(fd);
2212 1.88.4.2 nathanw lp->d_secpercyl = fd->sc_type->seccyl;
2213 1.88.4.2 nathanw lp->d_nsectors = fd->sc_type->sectrac;
2214 1.88.4.2 nathanw lp->d_ncylinders = fd->sc_type->cylinders;
2215 1.88.4.2 nathanw lp->d_ntracks = fd->sc_type->heads; /* Go figure... */
2216 1.88.4.2 nathanw lp->d_secperunit = lp->d_secpercyl * lp->d_ncylinders;
2217 1.88.4.2 nathanw lp->d_rpm = 3600; /* XXX like it matters... */
2218 1.88.4.2 nathanw
2219 1.88.4.2 nathanw strncpy(lp->d_typename, "floppy", sizeof(lp->d_typename));
2220 1.88.4.2 nathanw strncpy(lp->d_packname, "fictitious", sizeof(lp->d_packname));
2221 1.88.4.2 nathanw lp->d_interleave = 1;
2222 1.88.4.2 nathanw
2223 1.88.4.2 nathanw lp->d_partitions[RAW_PART].p_offset = 0;
2224 1.88.4.2 nathanw lp->d_partitions[RAW_PART].p_size = lp->d_secpercyl * lp->d_ncylinders;
2225 1.88.4.2 nathanw lp->d_partitions[RAW_PART].p_fstype = FS_UNUSED;
2226 1.88.4.2 nathanw lp->d_npartitions = RAW_PART + 1;
2227 1.88.4.2 nathanw
2228 1.88.4.2 nathanw lp->d_magic = DISKMAGIC;
2229 1.88.4.2 nathanw lp->d_magic2 = DISKMAGIC;
2230 1.88.4.2 nathanw lp->d_checksum = dkcksum(lp);
2231 1.88.4.2 nathanw
2232 1.88.4.2 nathanw /*
2233 1.88.4.2 nathanw * Call the generic disklabel extraction routine. If there's
2234 1.88.4.2 nathanw * not a label there, fake it.
2235 1.88.4.2 nathanw */
2236 1.88.4.2 nathanw if (readdisklabel(dev, fdstrategy, lp, clp) != NULL) {
2237 1.88.4.2 nathanw strncpy(lp->d_packname, "default label",
2238 1.88.4.2 nathanw sizeof(lp->d_packname));
2239 1.88.4.2 nathanw /*
2240 1.88.4.2 nathanw * Reset the partition info; it might have gotten
2241 1.88.4.2 nathanw * trashed in readdisklabel().
2242 1.88.4.2 nathanw *
2243 1.88.4.2 nathanw * XXX Why do we have to do this? readdisklabel()
2244 1.88.4.2 nathanw * should be safe...
2245 1.88.4.2 nathanw */
2246 1.88.4.2 nathanw for (i = 0; i < MAXPARTITIONS; ++i) {
2247 1.88.4.2 nathanw lp->d_partitions[i].p_offset = 0;
2248 1.88.4.2 nathanw if (i == RAW_PART) {
2249 1.88.4.2 nathanw lp->d_partitions[i].p_size =
2250 1.88.4.2 nathanw lp->d_secpercyl * lp->d_ncylinders;
2251 1.88.4.2 nathanw lp->d_partitions[i].p_fstype = FS_BSDFFS;
2252 1.88.4.2 nathanw } else {
2253 1.88.4.2 nathanw lp->d_partitions[i].p_size = 0;
2254 1.88.4.2 nathanw lp->d_partitions[i].p_fstype = FS_UNUSED;
2255 1.88.4.2 nathanw }
2256 1.88.4.2 nathanw }
2257 1.88.4.2 nathanw lp->d_npartitions = RAW_PART + 1;
2258 1.88.4.2 nathanw }
2259 1.88.4.2 nathanw }
2260 1.88.4.2 nathanw
2261 1.88.4.2 nathanw void
2262 1.88.4.2 nathanw fd_do_eject(fd)
2263 1.88.4.2 nathanw struct fd_softc *fd;
2264 1.88.4.2 nathanw {
2265 1.88.4.2 nathanw struct fdc_softc *fdc = (void *)fd->sc_dv.dv_parent;
2266 1.88.4.2 nathanw
2267 1.88.4.2 nathanw if (CPU_ISSUN4C) {
2268 1.88.4.2 nathanw auxregbisc(AUXIO4C_FDS, AUXIO4C_FEJ);
2269 1.88.4.2 nathanw delay(10);
2270 1.88.4.2 nathanw auxregbisc(AUXIO4C_FEJ, AUXIO4C_FDS);
2271 1.88.4.2 nathanw return;
2272 1.88.4.2 nathanw }
2273 1.88.4.2 nathanw if (CPU_ISSUN4M && (fdc->sc_flags & FDC_82077) != 0) {
2274 1.88.4.2 nathanw bus_space_tag_t t = fdc->sc_bustag;
2275 1.88.4.2 nathanw bus_space_handle_t h = fdc->sc_handle;
2276 1.88.4.2 nathanw u_int8_t dor = FDO_FRST | FDO_FDMAEN | FDO_MOEN(0);
2277 1.88.4.2 nathanw
2278 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_dor, dor | FDO_EJ);
2279 1.88.4.2 nathanw delay(10);
2280 1.88.4.2 nathanw bus_space_write_1(t, h, fdc->sc_reg_dor, FDO_FRST | FDO_DS);
2281 1.88.4.2 nathanw return;
2282 1.88.4.2 nathanw }
2283 1.88.4.2 nathanw }
2284 1.88.4.2 nathanw
2285 1.88.4.2 nathanw #ifdef MEMORY_DISK_HOOKS
2286 1.88.4.2 nathanw int fd_read_md_image __P((size_t *, caddr_t *));
2287 1.88.4.2 nathanw #endif
2288 1.88.4.2 nathanw
2289 1.88.4.2 nathanw /* ARGSUSED */
2290 1.88.4.2 nathanw void
2291 1.88.4.2 nathanw fd_mountroot_hook(dev)
2292 1.88.4.2 nathanw struct device *dev;
2293 1.88.4.2 nathanw {
2294 1.88.4.2 nathanw int c;
2295 1.88.4.2 nathanw
2296 1.88.4.2 nathanw fd_do_eject((struct fd_softc *)dev);
2297 1.88.4.2 nathanw printf("Insert filesystem floppy and press return.");
2298 1.88.4.2 nathanw for (;;) {
2299 1.88.4.2 nathanw c = cngetc();
2300 1.88.4.2 nathanw if ((c == '\r') || (c == '\n')) {
2301 1.88.4.2 nathanw printf("\n");
2302 1.88.4.2 nathanw break;
2303 1.88.4.2 nathanw }
2304 1.88.4.2 nathanw }
2305 1.88.4.2 nathanw }
2306 1.88.4.2 nathanw
2307 1.88.4.2 nathanw #ifdef MEMORY_DISK_HOOKS
2308 1.88.4.2 nathanw
2309 1.88.4.2 nathanw #define FDMICROROOTSIZE ((2*18*80) << DEV_BSHIFT)
2310 1.88.4.2 nathanw
2311 1.88.4.2 nathanw int
2312 1.88.4.2 nathanw fd_read_md_image(sizep, addrp)
2313 1.88.4.2 nathanw size_t *sizep;
2314 1.88.4.2 nathanw caddr_t *addrp;
2315 1.88.4.2 nathanw {
2316 1.88.4.2 nathanw struct buf buf, *bp = &buf;
2317 1.88.4.2 nathanw dev_t dev;
2318 1.88.4.2 nathanw off_t offset;
2319 1.88.4.2 nathanw caddr_t addr;
2320 1.88.4.2 nathanw
2321 1.88.4.2 nathanw dev = makedev(54,0); /* XXX */
2322 1.88.4.2 nathanw
2323 1.88.4.2 nathanw MALLOC(addr, caddr_t, FDMICROROOTSIZE, M_DEVBUF, M_WAITOK);
2324 1.88.4.2 nathanw *addrp = addr;
2325 1.88.4.2 nathanw
2326 1.88.4.2 nathanw if (fdopen(dev, 0, S_IFCHR, NULL))
2327 1.88.4.2 nathanw panic("fd: mountroot: fdopen");
2328 1.88.4.2 nathanw
2329 1.88.4.2 nathanw offset = 0;
2330 1.88.4.2 nathanw
2331 1.88.4.2 nathanw for (;;) {
2332 1.88.4.2 nathanw bp->b_dev = dev;
2333 1.88.4.2 nathanw bp->b_error = 0;
2334 1.88.4.2 nathanw bp->b_resid = 0;
2335 1.88.4.2 nathanw bp->b_proc = NULL;
2336 1.88.4.2 nathanw bp->b_flags = B_BUSY | B_PHYS | B_RAW | B_READ;
2337 1.88.4.2 nathanw bp->b_blkno = btodb(offset);
2338 1.88.4.2 nathanw bp->b_bcount = DEV_BSIZE;
2339 1.88.4.2 nathanw bp->b_data = addr;
2340 1.88.4.2 nathanw fdstrategy(bp);
2341 1.88.4.2 nathanw while ((bp->b_flags & B_DONE) == 0) {
2342 1.88.4.2 nathanw tsleep((caddr_t)bp, PRIBIO + 1, "physio", 0);
2343 1.88.4.2 nathanw }
2344 1.88.4.2 nathanw if (bp->b_error)
2345 1.88.4.2 nathanw panic("fd: mountroot: fdread error %d", bp->b_error);
2346 1.88.4.2 nathanw
2347 1.88.4.2 nathanw if (bp->b_resid != 0)
2348 1.88.4.2 nathanw break;
2349 1.88.4.2 nathanw
2350 1.88.4.2 nathanw addr += DEV_BSIZE;
2351 1.88.4.2 nathanw offset += DEV_BSIZE;
2352 1.88.4.2 nathanw if (offset + DEV_BSIZE > FDMICROROOTSIZE)
2353 1.88.4.2 nathanw break;
2354 1.88.4.2 nathanw }
2355 1.88.4.2 nathanw (void)fdclose(dev, 0, S_IFCHR, NULL);
2356 1.88.4.2 nathanw *sizep = offset;
2357 1.88.4.2 nathanw fd_do_eject(fd_cd.cd_devs[FDUNIT(dev)]);
2358 1.88.4.2 nathanw return (0);
2359 1.88.4.2 nathanw }
2360 1.88.4.2 nathanw #endif
2361