sbus.c revision 1.26 1 /* $NetBSD: sbus.c,v 1.26 1998/07/29 18:42:32 pk Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Paul Kranenburg.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1992, 1993
41 * The Regents of the University of California. All rights reserved.
42 *
43 * This software was developed by the Computer Systems Engineering group
44 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
45 * contributed to Berkeley.
46 *
47 * All advertising materials mentioning features or use of this software
48 * must display the following acknowledgement:
49 * This product includes software developed by the University of
50 * California, Lawrence Berkeley Laboratory.
51 *
52 * Redistribution and use in source and binary forms, with or without
53 * modification, are permitted provided that the following conditions
54 * are met:
55 * 1. Redistributions of source code must retain the above copyright
56 * notice, this list of conditions and the following disclaimer.
57 * 2. Redistributions in binary form must reproduce the above copyright
58 * notice, this list of conditions and the following disclaimer in the
59 * documentation and/or other materials provided with the distribution.
60 * 3. All advertising materials mentioning features or use of this software
61 * must display the following acknowledgement:
62 * This product includes software developed by the University of
63 * California, Berkeley and its contributors.
64 * 4. Neither the name of the University nor the names of its contributors
65 * may be used to endorse or promote products derived from this software
66 * without specific prior written permission.
67 *
68 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
69 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
70 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
71 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
72 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
73 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
74 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
75 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
76 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
77 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
78 * SUCH DAMAGE.
79 *
80 * @(#)sbus.c 8.1 (Berkeley) 6/11/93
81 */
82
83 /*
84 * Sbus stuff.
85 */
86
87 #include <sys/param.h>
88 #include <sys/malloc.h>
89 #include <sys/systm.h>
90 #include <sys/device.h>
91 #include <vm/vm.h>
92
93 #include <machine/bus.h>
94 #include <sparc/dev/sbusreg.h>
95 #include <dev/sbus/sbusvar.h>
96 #include <dev/sbus/xboxvar.h>
97
98 #include <sparc/sparc/iommuvar.h>
99 #include <machine/autoconf.h>
100
101
102 void sbusreset __P((int));
103
104 static bus_space_tag_t sbus_alloc_bustag __P((struct sbus_softc *));
105 static int sbus_get_intr __P((struct sbus_softc *, int,
106 struct sbus_intr **, int *));
107 static int sbus_bus_mmap __P((bus_space_tag_t, bus_type_t, bus_addr_t,
108 int, bus_space_handle_t *));
109 static int _sbus_bus_map __P((
110 bus_space_tag_t,
111 bus_type_t, /*slot*/
112 bus_addr_t, /*offset*/
113 bus_size_t, /*size*/
114 int, /*flags*/
115 vm_offset_t, /*preferred virtual address */
116 bus_space_handle_t *));
117 static void *sbus_intr_establish __P((
118 bus_space_tag_t,
119 int, /*level*/
120 int, /*flags*/
121 int (*) __P((void *)), /*handler*/
122 void *)); /*handler arg*/
123
124
125 /* autoconfiguration driver */
126 int sbus_match_mainbus __P((struct device *, struct cfdata *, void *));
127 int sbus_match_iommu __P((struct device *, struct cfdata *, void *));
128 int sbus_match_xbox __P((struct device *, struct cfdata *, void *));
129 void sbus_attach_mainbus __P((struct device *, struct device *, void *));
130 void sbus_attach_iommu __P((struct device *, struct device *, void *));
131 void sbus_attach_xbox __P((struct device *, struct device *, void *));
132
133 struct cfattach sbus_mainbus_ca = {
134 sizeof(struct sbus_softc), sbus_match_mainbus, sbus_attach_mainbus
135 };
136 struct cfattach sbus_iommu_ca = {
137 sizeof(struct sbus_softc), sbus_match_iommu, sbus_attach_iommu
138 };
139 struct cfattach sbus_xbox_ca = {
140 sizeof(struct sbus_softc), sbus_match_xbox, sbus_attach_xbox
141 };
142
143 extern struct cfdriver sbus_cd;
144
145 /* If the PROM does not provide the `ranges' property, we make up our own */
146 struct sbus_range sbus_translations[] = {
147 /* Assume a maximum of 4 Sbus slots, all mapped to on-board io space */
148 { 0, 0, PMAP_OBIO, SBUS_ADDR(0,0), 1 << 25 },
149 { 1, 0, PMAP_OBIO, SBUS_ADDR(1,0), 1 << 25 },
150 { 2, 0, PMAP_OBIO, SBUS_ADDR(2,0), 1 << 25 },
151 { 3, 0, PMAP_OBIO, SBUS_ADDR(3,0), 1 << 25 }
152 };
153
154 /*
155 * Child devices receive the Sbus interrupt level in their attach
156 * arguments. We translate these to CPU IPLs using the following
157 * tables. Note: obio bus interrupt levels are identical to the
158 * processor IPL.
159 *
160 * The second set of tables is used when the Sbus interrupt level
161 * cannot be had from the PROM as an `interrupt' property. We then
162 * fall back on the `intr' property which contains the CPU IPL.
163 */
164
165 /* Translate Sbus interrupt level to processor IPL */
166 static int intr_sbus2ipl_4c[] = {
167 0, 1, 2, 3, 5, 7, 8, 9
168 };
169 static int intr_sbus2ipl_4m[] = {
170 0, 2, 3, 5, 7, 9, 11, 13
171 };
172
173 /*
174 * This value is or'ed into the attach args' interrupt level cookie
175 * if the interrupt level comes from an `intr' property, i.e. it is
176 * not an Sbus interrupt level.
177 */
178 #define SBUS_INTR_COMPAT 0x80000000
179
180
181 /*
182 * Print the location of some sbus-attached device (called just
183 * before attaching that device). If `sbus' is not NULL, the
184 * device was found but not configured; print the sbus as well.
185 * Return UNCONF (config_find ignores this if the device was configured).
186 */
187 int
188 sbus_print(args, busname)
189 void *args;
190 const char *busname;
191 {
192 struct sbus_attach_args *sa = args;
193 int i;
194
195 if (busname)
196 printf("%s at %s", sa->sa_name, busname);
197 printf(" slot %d offset 0x%x", sa->sa_slot, sa->sa_offset);
198 for (i = 0; i < sa->sa_nintr; i++) {
199 u_int32_t level = sa->sa_intr[i].sbi_pri;
200 struct sbus_softc *sc =
201 (struct sbus_softc *) sa->sa_bustag->cookie;
202
203 printf(" level %d", level & ~SBUS_INTR_COMPAT);
204 if ((level & SBUS_INTR_COMPAT) == 0) {
205 int ipl = sc->sc_intr2ipl[level];
206 if (ipl != level)
207 printf(" (ipl %d)", ipl);
208 }
209 }
210 return (UNCONF);
211 }
212
213 int
214 sbus_match_mainbus(parent, cf, aux)
215 struct device *parent;
216 struct cfdata *cf;
217 void *aux;
218 {
219 struct mainbus_attach_args *ma = aux;
220
221 if (CPU_ISSUN4)
222 return (0);
223
224 return (strcmp(cf->cf_driver->cd_name, ma->ma_name) == 0);
225 }
226
227 int
228 sbus_match_iommu(parent, cf, aux)
229 struct device *parent;
230 struct cfdata *cf;
231 void *aux;
232 {
233 struct iommu_attach_args *ia = aux;
234
235 if (CPU_ISSUN4)
236 return (0);
237
238 return (strcmp(cf->cf_driver->cd_name, ia->iom_name) == 0);
239 }
240
241 int
242 sbus_match_xbox(parent, cf, aux)
243 struct device *parent;
244 struct cfdata *cf;
245 void *aux;
246 {
247 struct xbox_attach_args *xa = aux;
248
249 if (CPU_ISSUN4)
250 return (0);
251
252 return (strcmp(cf->cf_driver->cd_name, xa->xa_name) == 0);
253 }
254
255 /*
256 * Attach an Sbus.
257 */
258 void
259 sbus_attach_mainbus(parent, self, aux)
260 struct device *parent;
261 struct device *self;
262 void *aux;
263 {
264 struct sbus_softc *sc = (struct sbus_softc *)self;
265 struct mainbus_attach_args *ma = aux;
266 int node = ma->ma_node;
267
268 /*
269 * XXX there is only one Sbus, for now -- do not know how to
270 * address children on others
271 */
272 if (sc->sc_dev.dv_unit > 0) {
273 printf(" unsupported\n");
274 return;
275 }
276
277 sc->sc_bustag = ma->ma_bustag;
278 sc->sc_dmatag = ma->ma_dmatag;
279
280 /* Setup interrupt translation tables */
281 sc->sc_intr2ipl = CPU_ISSUN4C
282 ? intr_sbus2ipl_4c
283 : intr_sbus2ipl_4m;
284
285 /*
286 * Record clock frequency for synchronous SCSI.
287 * IS THIS THE CORRECT DEFAULT??
288 */
289 sc->sc_clockfreq = getpropint(node, "clock-frequency", 25*1000*1000);
290 printf(": clock = %s MHz\n", clockfreq(sc->sc_clockfreq));
291
292 sbus_attach(sc, "sbus", node, ma->ma_bp, NULL);
293 }
294
295 void
296 sbus_attach_iommu(parent, self, aux)
297 struct device *parent;
298 struct device *self;
299 void *aux;
300 {
301 struct sbus_softc *sc = (struct sbus_softc *)self;
302 struct iommu_attach_args *ia = aux;
303 int node = ia->iom_node;
304
305 sc->sc_bustag = ia->iom_bustag;
306 sc->sc_dmatag = ia->iom_dmatag;
307
308 /* Setup interrupt translation tables */
309 sc->sc_intr2ipl = CPU_ISSUN4C ? intr_sbus2ipl_4c : intr_sbus2ipl_4m;
310
311 /*
312 * Record clock frequency for synchronous SCSI.
313 * IS THIS THE CORRECT DEFAULT??
314 */
315 sc->sc_clockfreq = getpropint(node, "clock-frequency", 25*1000*1000);
316 printf(": clock = %s MHz\n", clockfreq(sc->sc_clockfreq));
317
318 sbus_attach(sc, "sbus", node, ia->iom_bp, NULL);
319 }
320
321 void
322 sbus_attach_xbox(parent, self, aux)
323 struct device *parent;
324 struct device *self;
325 void *aux;
326 {
327 struct sbus_softc *sc = (struct sbus_softc *)self;
328 struct xbox_attach_args *xa = aux;
329 int node = xa->xa_node;
330
331 sc->sc_bustag = xa->xa_bustag;
332 sc->sc_dmatag = xa->xa_dmatag;
333
334 /* Setup interrupt translation tables */
335 sc->sc_intr2ipl = CPU_ISSUN4C ? intr_sbus2ipl_4c : intr_sbus2ipl_4m;
336
337 /*
338 * Record clock frequency for synchronous SCSI.
339 * IS THIS THE CORRECT DEFAULT??
340 */
341 sc->sc_clockfreq = getpropint(node, "clock-frequency", 25*1000*1000);
342 printf(": clock = %s MHz\n", clockfreq(sc->sc_clockfreq));
343
344 sbus_attach(sc, "sbus", node, xa->xa_bp, NULL);
345 }
346
347 void
348 sbus_attach(sc, busname, busnode, bp, specials)
349 struct sbus_softc *sc;
350 char *busname;
351 int busnode;
352 struct bootpath *bp;
353 const char * const *specials;
354 {
355 int node0, node, error;
356 const char *sp;
357 const char *const *ssp;
358 bus_space_tag_t sbt;
359 struct sbus_attach_args sa;
360
361 sbt = sbus_alloc_bustag(sc);
362
363 /*
364 * Get the SBus burst transfer size if burst transfers are supported
365 */
366 sc->sc_burst = getpropint(busnode, "burst-sizes", 0);
367
368 /* Propagate bootpath */
369 if (bp != NULL && strcmp(bp->name, busname) == 0)
370 bp++;
371 else
372 bp = NULL;
373
374 /*
375 * Collect address translations from the OBP.
376 */
377 error = getpropA(busnode, "ranges", sizeof(struct rom_range),
378 &sc->sc_nrange, (void **)&sc->sc_range);
379 switch (error) {
380 case 0:
381 break;
382 case ENOENT:
383 /* Fall back to our own `range' construction */
384 sc->sc_range = sbus_translations;
385 sc->sc_nrange =
386 sizeof(sbus_translations)/sizeof(sbus_translations[0]);
387 break;
388 default:
389 panic("%s: error getting ranges property", sc->sc_dev.dv_xname);
390 }
391
392 /*
393 * Loop through ROM children, fixing any relative addresses
394 * and then configuring each device.
395 * `specials' is an array of device names that are treated
396 * specially:
397 */
398 node0 = firstchild(busnode);
399 for (ssp = specials ; ssp != NULL && *(sp = *ssp) != 0; ssp++) {
400 if ((node = findnode(node0, sp)) == 0) {
401 panic("could not find %s amongst %s devices",
402 sp, busname);
403 }
404
405 if (sbus_setup_attach_args(sc, sbt, sc->sc_dmatag,
406 node, bp, &sa) != 0) {
407 panic("sbus_attach: %s: incomplete", sp);
408 }
409 (void) config_found(&sc->sc_dev, (void *)&sa, sbus_print);
410 sbus_destroy_attach_args(&sa);
411 }
412
413 for (node = node0; node; node = nextsibling(node)) {
414 char *name = getpropstring(node, "name");
415 for (ssp = specials, sp = NULL;
416 ssp != NULL && (sp = *ssp) != NULL;
417 ssp++)
418 if (strcmp(name, sp) == 0)
419 break;
420
421 if (sp != NULL)
422 /* Already configured as an "early" device */
423 continue;
424
425 if (sbus_setup_attach_args(sc, sbt, sc->sc_dmatag,
426 node, bp, &sa) != 0) {
427 printf("sbus_attach: %s: incomplete\n", name);
428 continue;
429 }
430 (void) config_found(&sc->sc_dev, (void *)&sa, sbus_print);
431 sbus_destroy_attach_args(&sa);
432 }
433 }
434
435 int
436 sbus_setup_attach_args(sc, bustag, dmatag, node, bp, sa)
437 struct sbus_softc *sc;
438 bus_space_tag_t bustag;
439 bus_dma_tag_t dmatag;
440 int node;
441 struct bootpath *bp;
442 struct sbus_attach_args *sa;
443 {
444 /*struct rom_reg romreg;*/
445 /*int base;*/
446 int error;
447 int n;
448
449 bzero(sa, sizeof(struct sbus_attach_args));
450 error = getpropA(node, "name", 1, &n, (void **)&sa->sa_name);
451 if (error != 0)
452 return (error);
453 sa->sa_name[n] = '\0';
454
455 sa->sa_bustag = bustag;
456 sa->sa_dmatag = dmatag;
457 sa->sa_node = node;
458 sa->sa_bp = bp;
459
460 error = getpropA(node, "reg", sizeof(struct sbus_reg),
461 &sa->sa_nreg, (void **)&sa->sa_reg);
462 if (error != 0) {
463 char buf[32];
464 if (error != ENOENT ||
465 !node_has_property(node, "device_type") ||
466 strcmp(getpropstringA(node, "device_type", buf),
467 "hierarchical") != 0)
468 return (error);
469 }
470 for (n = 0; n < sa->sa_nreg; n++) {
471 /* Convert to relative addressing, if necessary */
472 u_int32_t base = sa->sa_reg[n].sbr_offset;
473 if (SBUS_ABS(base)) {
474 sa->sa_reg[n].sbr_slot = SBUS_ABS_TO_SLOT(base);
475 sa->sa_reg[n].sbr_offset = SBUS_ABS_TO_OFFSET(base);
476 }
477 }
478
479 if ((error = sbus_get_intr(sc, node, &sa->sa_intr, &sa->sa_nintr)) != 0)
480 return (error);
481
482 error = getpropA(node, "address", sizeof(u_int32_t),
483 &sa->sa_npromvaddrs, (void **)&sa->sa_promvaddrs);
484 if (error != 0 && error != ENOENT)
485 return (error);
486
487 return (0);
488 }
489
490 void
491 sbus_destroy_attach_args(sa)
492 struct sbus_attach_args *sa;
493 {
494 if (sa->sa_name != NULL)
495 free(sa->sa_name, M_DEVBUF);
496
497 if (sa->sa_nreg != 0)
498 free(sa->sa_reg, M_DEVBUF);
499
500 if (sa->sa_intr)
501 free(sa->sa_intr, M_DEVBUF);
502
503 if (sa->sa_promvaddrs)
504 free(sa->sa_promvaddrs, M_DEVBUF);
505
506 bzero(sa, sizeof(struct sbus_attach_args));/*DEBUG*/
507 }
508
509
510 int
511 _sbus_bus_map(t, btype, offset, size, flags, vaddr, hp)
512 bus_space_tag_t t;
513 bus_type_t btype;
514 bus_addr_t offset;
515 bus_size_t size;
516 int flags;
517 vm_offset_t vaddr;
518 bus_space_handle_t *hp;
519 {
520 struct sbus_softc *sc = t->cookie;
521 int slot = btype;
522 int i;
523
524 for (i = 0; i < sc->sc_nrange; i++) {
525 bus_addr_t paddr;
526 bus_type_t iospace;
527
528 if (sc->sc_range[i].cspace != slot)
529 continue;
530
531 /* We've found the connection to the parent bus */
532 paddr = sc->sc_range[i].poffset + offset;
533 iospace = sc->sc_range[i].pspace;
534 return (bus_space_map2(sc->sc_bustag, iospace, paddr,
535 size, flags, vaddr, hp));
536 }
537
538 return (EINVAL);
539 }
540
541 int
542 sbus_bus_mmap(t, btype, paddr, flags, hp)
543 bus_space_tag_t t;
544 bus_type_t btype;
545 bus_addr_t paddr;
546 int flags;
547 bus_space_handle_t *hp;
548 {
549 int slot = (int)btype;
550 int offset = (int)paddr;
551 struct sbus_softc *sc = t->cookie;
552 int i;
553
554 for (i = 0; i < sc->sc_nrange; i++) {
555 bus_addr_t paddr;
556 bus_addr_t iospace;
557
558 if (sc->sc_range[i].cspace != slot)
559 continue;
560
561 paddr = sc->sc_range[i].poffset + offset;
562 iospace = (bus_addr_t)sc->sc_range[i].pspace;
563 return (bus_space_mmap(sc->sc_bustag, iospace, paddr,
564 flags, hp));
565 }
566
567 return (-1);
568 }
569
570
571 /*
572 * Each attached device calls sbus_establish after it initializes
573 * its sbusdev portion.
574 */
575 void
576 sbus_establish(sd, dev)
577 register struct sbusdev *sd;
578 register struct device *dev;
579 {
580 register struct sbus_softc *sc;
581 register struct device *curdev;
582
583 /*
584 * We have to look for the sbus by name, since it is not necessarily
585 * our immediate parent (i.e. sun4m /iommu/sbus/espdma/esp)
586 * We don't just use the device structure of the above-attached
587 * sbus, since we might (in the future) support multiple sbus's.
588 */
589 for (curdev = dev->dv_parent; ; curdev = curdev->dv_parent) {
590 if (!curdev || !curdev->dv_xname)
591 panic("sbus_establish: can't find sbus parent for %s",
592 sd->sd_dev->dv_xname
593 ? sd->sd_dev->dv_xname
594 : "<unknown>" );
595
596 if (strncmp(curdev->dv_xname, "sbus", 4) == 0)
597 break;
598 }
599 sc = (struct sbus_softc *) curdev;
600
601 sd->sd_dev = dev;
602 sd->sd_bchain = sc->sc_sbdev;
603 sc->sc_sbdev = sd;
604 }
605
606 /*
607 * Reset the given sbus. (???)
608 */
609 void
610 sbusreset(sbus)
611 int sbus;
612 {
613 register struct sbusdev *sd;
614 struct sbus_softc *sc = sbus_cd.cd_devs[sbus];
615 struct device *dev;
616
617 printf("reset %s:", sc->sc_dev.dv_xname);
618 for (sd = sc->sc_sbdev; sd != NULL; sd = sd->sd_bchain) {
619 if (sd->sd_reset) {
620 dev = sd->sd_dev;
621 (*sd->sd_reset)(dev);
622 printf(" %s", dev->dv_xname);
623 }
624 }
625 }
626
627
628 /*
629 * Get interrupt attributes for an Sbus device.
630 */
631 int
632 sbus_get_intr(sc, node, ipp, np)
633 struct sbus_softc *sc;
634 int node;
635 struct sbus_intr **ipp;
636 int *np;
637 {
638 int error, n;
639 u_int32_t *ipl = NULL;
640
641 /*
642 * The `interrupts' property contains the Sbus interrupt level.
643 */
644 if (getpropA(node, "interrupts", sizeof(int), np, (void **)&ipl) == 0) {
645 /* Change format to an `struct sbus_intr' array */
646 struct sbus_intr *ip;
647 ip = malloc(*np * sizeof(struct sbus_intr), M_DEVBUF, M_NOWAIT);
648 if (ip == NULL)
649 return (ENOMEM);
650 for (n = 0; n < *np; n++) {
651 ip[n].sbi_pri = ipl[n];
652 ip[n].sbi_vec = 0;
653 }
654 free(ipl, M_DEVBUF);
655 *ipp = ip;
656 return (0);
657 }
658
659 /*
660 * Fall back on `intr' property.
661 */
662 *ipp = NULL;
663 error = getpropA(node, "intr", sizeof(struct sbus_intr),
664 np, (void **)ipp);
665 switch (error) {
666 case 0:
667 for (n = *np; n-- > 0;) {
668 (*ipp)[n].sbi_pri &= 0xf;
669 (*ipp)[n].sbi_pri |= SBUS_INTR_COMPAT;
670 }
671 break;
672 case ENOENT:
673 error = 0;
674 break;
675 }
676
677 return (error);
678 }
679
680
681 /*
682 * Install an interrupt handler for an Sbus device.
683 */
684 void *
685 sbus_intr_establish(t, level, flags, handler, arg)
686 bus_space_tag_t t;
687 int level;
688 int flags;
689 int (*handler) __P((void *));
690 void *arg;
691 {
692 struct sbus_softc *sc = t->cookie;
693 struct intrhand *ih;
694 int ipl;
695
696 ih = (struct intrhand *)
697 malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT);
698 if (ih == NULL)
699 return (NULL);
700
701 if ((flags & BUS_INTR_ESTABLISH_SOFTINTR) != 0)
702 ipl = level;
703 else if ((level & SBUS_INTR_COMPAT) != 0)
704 ipl = level & ~SBUS_INTR_COMPAT;
705 else
706 ipl = sc->sc_intr2ipl[level];
707
708 ih->ih_fun = handler;
709 ih->ih_arg = arg;
710 if ((flags & BUS_INTR_ESTABLISH_FASTTRAP) != 0)
711 intr_fasttrap(ipl, (void (*)__P((void)))handler);
712 else
713 intr_establish(ipl, ih);
714 return (ih);
715 }
716
717 static bus_space_tag_t
718 sbus_alloc_bustag(sc)
719 struct sbus_softc *sc;
720 {
721 bus_space_tag_t sbt;
722
723 sbt = (bus_space_tag_t)
724 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT);
725 if (sbt == NULL)
726 return (NULL);
727
728 bzero(sbt, sizeof *sbt);
729 sbt->cookie = sc;
730 sbt->parent = sc->sc_bustag;
731 sbt->sparc_bus_map = _sbus_bus_map;
732 sbt->sparc_bus_mmap = sbus_bus_mmap;
733 sbt->sparc_intr_establish = sbus_intr_establish;
734 return (sbt);
735 }
736