fpu_add.c revision 1.1 1 /*
2 * Copyright (c) 1992, 1993
3 * The Regents of the University of California. All rights reserved.
4 *
5 * This software was developed by the Computer Systems Engineering group
6 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
7 * contributed to Berkeley.
8 *
9 * All advertising materials mentioning features or use of this software
10 * must display the following acknowledgement:
11 * This product includes software developed by the University of
12 * California, Lawrence Berkeley Laboratory.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 * 3. All advertising materials mentioning features or use of this software
23 * must display the following acknowledgement:
24 * This product includes software developed by the University of
25 * California, Berkeley and its contributors.
26 * 4. Neither the name of the University nor the names of its contributors
27 * may be used to endorse or promote products derived from this software
28 * without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 * SUCH DAMAGE.
41 *
42 * @(#)fpu_add.c 8.1 (Berkeley) 6/11/93
43 *
44 * from: Header: fpu_add.c,v 1.4 92/11/26 01:39:46 torek Exp
45 * $Id: fpu_add.c,v 1.1 1993/10/02 10:22:51 deraadt Exp $
46 */
47
48 /*
49 * Perform an FPU add (return x + y).
50 *
51 * To subtract, negate y and call add.
52 */
53
54 #include <sys/types.h>
55
56 #include <machine/reg.h>
57
58 #include <sparc/fpu/fpu_arith.h>
59 #include <sparc/fpu/fpu_emu.h>
60
61 struct fpn *
62 fpu_add(fe)
63 register struct fpemu *fe;
64 {
65 register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r;
66 register u_int r0, r1, r2, r3;
67 register int rd;
68
69 /*
70 * Put the `heavier' operand on the right (see fpu_emu.h).
71 * Then we will have one of the following cases, taken in the
72 * following order:
73 *
74 * - y = NaN. Implied: if only one is a signalling NaN, y is.
75 * The result is y.
76 * - y = Inf. Implied: x != NaN (is 0, number, or Inf: the NaN
77 * case was taken care of earlier).
78 * If x = -y, the result is NaN. Otherwise the result
79 * is y (an Inf of whichever sign).
80 * - y is 0. Implied: x = 0.
81 * If x and y differ in sign (one positive, one negative),
82 * the result is +0 except when rounding to -Inf. If same:
83 * +0 + +0 = +0; -0 + -0 = -0.
84 * - x is 0. Implied: y != 0.
85 * Result is y.
86 * - other. Implied: both x and y are numbers.
87 * Do addition a la Hennessey & Patterson.
88 */
89 ORDER(x, y);
90 if (ISNAN(y))
91 return (y);
92 if (ISINF(y)) {
93 if (ISINF(x) && x->fp_sign != y->fp_sign)
94 return (fpu_newnan(fe));
95 return (y);
96 }
97 rd = ((fe->fe_fsr >> FSR_RD_SHIFT) & FSR_RD_MASK);
98 if (ISZERO(y)) {
99 if (rd != FSR_RD_RM) /* only -0 + -0 gives -0 */
100 y->fp_sign &= x->fp_sign;
101 else /* any -0 operand gives -0 */
102 y->fp_sign |= x->fp_sign;
103 return (y);
104 }
105 if (ISZERO(x))
106 return (y);
107 /*
108 * We really have two numbers to add, although their signs may
109 * differ. Make the exponents match, by shifting the smaller
110 * number right (e.g., 1.011 => 0.1011) and increasing its
111 * exponent (2^3 => 2^4). Note that we do not alter the exponents
112 * of x and y here.
113 */
114 r = &fe->fe_f3;
115 r->fp_class = FPC_NUM;
116 if (x->fp_exp == y->fp_exp) {
117 r->fp_exp = x->fp_exp;
118 r->fp_sticky = 0;
119 } else {
120 if (x->fp_exp < y->fp_exp) {
121 /*
122 * Try to avoid subtract case iii (see below).
123 * This also guarantees that x->fp_sticky = 0.
124 */
125 SWAP(x, y);
126 }
127 /* now x->fp_exp > y->fp_exp */
128 r->fp_exp = x->fp_exp;
129 r->fp_sticky = fpu_shr(y, x->fp_exp - y->fp_exp);
130 }
131 r->fp_sign = x->fp_sign;
132 if (x->fp_sign == y->fp_sign) {
133 FPU_DECL_CARRY
134
135 /*
136 * The signs match, so we simply add the numbers. The result
137 * may be `supernormal' (as big as 1.111...1 + 1.111...1, or
138 * 11.111...0). If so, a single bit shift-right will fix it
139 * (but remember to adjust the exponent).
140 */
141 /* r->fp_mant = x->fp_mant + y->fp_mant */
142 FPU_ADDS(r->fp_mant[3], x->fp_mant[3], y->fp_mant[3]);
143 FPU_ADDCS(r->fp_mant[2], x->fp_mant[2], y->fp_mant[2]);
144 FPU_ADDCS(r->fp_mant[1], x->fp_mant[1], y->fp_mant[1]);
145 FPU_ADDC(r0, x->fp_mant[0], y->fp_mant[0]);
146 if ((r->fp_mant[0] = r0) >= FP_2) {
147 (void) fpu_shr(r, 1);
148 r->fp_exp++;
149 }
150 } else {
151 FPU_DECL_CARRY
152
153 /*
154 * The signs differ, so things are rather more difficult.
155 * H&P would have us negate the negative operand and add;
156 * this is the same as subtracting the negative operand.
157 * This is quite a headache. Instead, we will subtract
158 * y from x, regardless of whether y itself is the negative
159 * operand. When this is done one of three conditions will
160 * hold, depending on the magnitudes of x and y:
161 * case i) |x| > |y|. The result is just x - y,
162 * with x's sign, but it may need to be normalized.
163 * case ii) |x| = |y|. The result is 0 (maybe -0)
164 * so must be fixed up.
165 * case iii) |x| < |y|. We goofed; the result should
166 * be (y - x), with the same sign as y.
167 * We could compare |x| and |y| here and avoid case iii,
168 * but that would take just as much work as the subtract.
169 * We can tell case iii has occurred by an overflow.
170 *
171 * N.B.: since x->fp_exp >= y->fp_exp, x->fp_sticky = 0.
172 */
173 /* r->fp_mant = x->fp_mant - y->fp_mant */
174 FPU_SET_CARRY(y->fp_sticky);
175 FPU_SUBCS(r3, x->fp_mant[3], y->fp_mant[3]);
176 FPU_SUBCS(r2, x->fp_mant[2], y->fp_mant[2]);
177 FPU_SUBCS(r1, x->fp_mant[1], y->fp_mant[1]);
178 FPU_SUBC(r0, x->fp_mant[0], y->fp_mant[0]);
179 if (r0 < FP_2) {
180 /* cases i and ii */
181 if ((r0 | r1 | r2 | r3) == 0) {
182 /* case ii */
183 r->fp_class = FPC_ZERO;
184 r->fp_sign = rd == FSR_RD_RM;
185 return (r);
186 }
187 } else {
188 /*
189 * Oops, case iii. This can only occur when the
190 * exponents were equal, in which case neither
191 * x nor y have sticky bits set. Flip the sign
192 * (to y's sign) and negate the result to get y - x.
193 */
194 #ifdef DIAGNOSTIC
195 if (x->fp_exp != y->fp_exp || r->fp_sticky)
196 panic("fpu_add");
197 #endif
198 r->fp_sign = y->fp_sign;
199 FPU_SUBS(r3, 0, r3);
200 FPU_SUBCS(r2, 0, r2);
201 FPU_SUBCS(r1, 0, r1);
202 FPU_SUBC(r0, 0, r0);
203 }
204 r->fp_mant[3] = r3;
205 r->fp_mant[2] = r2;
206 r->fp_mant[1] = r1;
207 r->fp_mant[0] = r0;
208 if (r0 < FP_1)
209 fpu_norm(r);
210 }
211 return (r);
212 }
213