cpu.h revision 1.94.2.2
1 1.94.2.1 tls /* $NetBSD: cpu.h,v 1.94.2.2 2017/12/03 11:36:43 jdolecek Exp $ */ 2 1.10 deraadt 3 1.1 deraadt /* 4 1.1 deraadt * Copyright (c) 1992, 1993 5 1.1 deraadt * The Regents of the University of California. All rights reserved. 6 1.1 deraadt * 7 1.1 deraadt * This software was developed by the Computer Systems Engineering group 8 1.1 deraadt * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 1.1 deraadt * contributed to Berkeley. 10 1.1 deraadt * 11 1.1 deraadt * All advertising materials mentioning features or use of this software 12 1.1 deraadt * must display the following acknowledgement: 13 1.1 deraadt * This product includes software developed by the University of 14 1.1 deraadt * California, Lawrence Berkeley Laboratory. 15 1.1 deraadt * 16 1.1 deraadt * Redistribution and use in source and binary forms, with or without 17 1.1 deraadt * modification, are permitted provided that the following conditions 18 1.1 deraadt * are met: 19 1.1 deraadt * 1. Redistributions of source code must retain the above copyright 20 1.1 deraadt * notice, this list of conditions and the following disclaimer. 21 1.1 deraadt * 2. Redistributions in binary form must reproduce the above copyright 22 1.1 deraadt * notice, this list of conditions and the following disclaimer in the 23 1.1 deraadt * documentation and/or other materials provided with the distribution. 24 1.64 agc * 3. Neither the name of the University nor the names of its contributors 25 1.1 deraadt * may be used to endorse or promote products derived from this software 26 1.1 deraadt * without specific prior written permission. 27 1.1 deraadt * 28 1.1 deraadt * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 1.1 deraadt * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 1.1 deraadt * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 1.1 deraadt * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 1.1 deraadt * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 1.1 deraadt * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 1.1 deraadt * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 1.1 deraadt * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 1.1 deraadt * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 1.1 deraadt * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 1.1 deraadt * SUCH DAMAGE. 39 1.1 deraadt * 40 1.7 deraadt * @(#)cpu.h 8.4 (Berkeley) 1/5/94 41 1.1 deraadt */ 42 1.1 deraadt 43 1.1 deraadt #ifndef _CPU_H_ 44 1.1 deraadt #define _CPU_H_ 45 1.1 deraadt 46 1.1 deraadt /* 47 1.21 pk * CTL_MACHDEP definitions. 48 1.1 deraadt */ 49 1.34 pk #define CPU_BOOTED_KERNEL 1 /* string: booted kernel name */ 50 1.49 darrenr #define CPU_BOOTED_DEVICE 2 /* string: device booted from */ 51 1.49 darrenr #define CPU_BOOT_ARGS 3 /* string: args booted with */ 52 1.50 pk #define CPU_ARCH 4 /* integer: cpu architecture version */ 53 1.50 pk #define CPU_MAXID 5 /* number of valid machdep ids */ 54 1.1 deraadt 55 1.1 deraadt /* 56 1.1 deraadt * Exported definitions unique to SPARC cpu support. 57 1.1 deraadt */ 58 1.1 deraadt 59 1.94.2.2 jdolecek /* Things needed by crash or the kernel */ 60 1.94.2.2 jdolecek #if defined(_KERNEL) || defined(_KMEMUSER) 61 1.94.2.2 jdolecek 62 1.65 tsutsui #if defined(_KERNEL_OPT) 63 1.35 thorpej #include "opt_multiprocessor.h" 64 1.36 thorpej #include "opt_lockdebug.h" 65 1.47 darrenr #include "opt_sparc_arch.h" 66 1.35 thorpej #endif 67 1.35 thorpej 68 1.94.2.2 jdolecek #include <sys/cpu_data.h> 69 1.94.2.2 jdolecek #include <sys/evcnt.h> 70 1.94.2.2 jdolecek 71 1.52 pk #include <machine/intr.h> 72 1.1 deraadt #include <machine/psl.h> 73 1.94.2.2 jdolecek 74 1.94.2.2 jdolecek #if defined(_KERNEL) 75 1.36 thorpej #include <sparc/sparc/cpuvar.h> 76 1.1 deraadt #include <sparc/sparc/intreg.h> 77 1.94.2.2 jdolecek #else 78 1.94.2.2 jdolecek #include <arch/sparc/sparc/vaddrs.h> 79 1.94.2.2 jdolecek #include <arch/sparc/sparc/cache.h> 80 1.94.2.2 jdolecek #endif 81 1.94.2.2 jdolecek 82 1.94.2.2 jdolecek struct trapframe; 83 1.94.2.2 jdolecek 84 1.94.2.2 jdolecek /* 85 1.94.2.2 jdolecek * Message structure for Inter Processor Communication in MP systems 86 1.94.2.2 jdolecek */ 87 1.94.2.2 jdolecek struct xpmsg { 88 1.94.2.2 jdolecek volatile int tag; 89 1.94.2.2 jdolecek #define XPMSG15_PAUSECPU 1 90 1.94.2.2 jdolecek #define XPMSG_FUNC 4 91 1.94.2.2 jdolecek #define XPMSG_FTRP 5 92 1.94.2.2 jdolecek 93 1.94.2.2 jdolecek volatile union { 94 1.94.2.2 jdolecek /* 95 1.94.2.2 jdolecek * Cross call: ask to run (*func)(arg0,arg1,arg2) 96 1.94.2.2 jdolecek * or (*trap)(arg0,arg1,arg2). `trap' should be the 97 1.94.2.2 jdolecek * address of a `fast trap' handler that executes in 98 1.94.2.2 jdolecek * the trap window (see locore.s). 99 1.94.2.2 jdolecek */ 100 1.94.2.2 jdolecek struct xpmsg_func { 101 1.94.2.2 jdolecek void (*func)(int, int, int); 102 1.94.2.2 jdolecek void (*trap)(int, int, int); 103 1.94.2.2 jdolecek int arg0; 104 1.94.2.2 jdolecek int arg1; 105 1.94.2.2 jdolecek int arg2; 106 1.94.2.2 jdolecek } xpmsg_func; 107 1.94.2.2 jdolecek } u; 108 1.94.2.2 jdolecek volatile int received; 109 1.94.2.2 jdolecek volatile int complete; 110 1.94.2.2 jdolecek }; 111 1.94.2.2 jdolecek 112 1.94.2.2 jdolecek /* 113 1.94.2.2 jdolecek * The cpuinfo structure. This structure maintains information about one 114 1.94.2.2 jdolecek * currently installed CPU (there may be several of these if the machine 115 1.94.2.2 jdolecek * supports multiple CPUs, as on some Sun4m architectures). The information 116 1.94.2.2 jdolecek * in this structure supersedes the old "cpumod", "mmumod", and similar 117 1.94.2.2 jdolecek * fields. 118 1.94.2.2 jdolecek */ 119 1.94.2.2 jdolecek 120 1.94.2.2 jdolecek struct cpu_info { 121 1.94.2.2 jdolecek struct cpu_data ci_data; /* MI per-cpu data */ 122 1.94.2.2 jdolecek 123 1.94.2.2 jdolecek /* 124 1.94.2.2 jdolecek * Primary Inter-processor message area. Keep this aligned 125 1.94.2.2 jdolecek * to a cache line boundary if possible, as the structure 126 1.94.2.2 jdolecek * itself is one (normal 32 byte) cache-line. 127 1.94.2.2 jdolecek */ 128 1.94.2.2 jdolecek struct xpmsg msg __aligned(32); 129 1.94.2.2 jdolecek 130 1.94.2.2 jdolecek /* Scheduler flags */ 131 1.94.2.2 jdolecek int ci_want_ast; 132 1.94.2.2 jdolecek int ci_want_resched; 133 1.94.2.2 jdolecek 134 1.94.2.2 jdolecek /* 135 1.94.2.2 jdolecek * SPARC cpu_info structures live at two VAs: one global 136 1.94.2.2 jdolecek * VA (so each CPU can access any other CPU's cpu_info) 137 1.94.2.2 jdolecek * and an alias VA CPUINFO_VA which is the same on each 138 1.94.2.2 jdolecek * CPU and maps to that CPU's cpu_info. Since the alias 139 1.94.2.2 jdolecek * CPUINFO_VA is how we locate our cpu_info, we have to 140 1.94.2.2 jdolecek * self-reference the global VA so that we can return it 141 1.94.2.2 jdolecek * in the curcpu() macro. 142 1.94.2.2 jdolecek */ 143 1.94.2.2 jdolecek struct cpu_info * volatile ci_self; 144 1.94.2.2 jdolecek 145 1.94.2.2 jdolecek int ci_cpuid; /* CPU index (see cpus[] array) */ 146 1.94.2.2 jdolecek 147 1.94.2.2 jdolecek /* Context administration */ 148 1.94.2.2 jdolecek int *ctx_tbl; /* [4m] SRMMU-edible context table */ 149 1.94.2.2 jdolecek paddr_t ctx_tbl_pa; /* [4m] ctx table physical address */ 150 1.94.2.2 jdolecek 151 1.94.2.2 jdolecek /* Cache information */ 152 1.94.2.2 jdolecek struct cacheinfo cacheinfo; /* see cache.h */ 153 1.94.2.2 jdolecek 154 1.94.2.2 jdolecek /* various flags to workaround anomalies in chips */ 155 1.94.2.2 jdolecek volatile int flags; /* see CPUFLG_xxx, below */ 156 1.94.2.2 jdolecek 157 1.94.2.2 jdolecek /* Per processor counter register (sun4m only) */ 158 1.94.2.2 jdolecek volatile struct counter_4m *counterreg_4m; 159 1.94.2.2 jdolecek 160 1.94.2.2 jdolecek /* Per processor interrupt mask register (sun4m only) */ 161 1.94.2.2 jdolecek volatile struct icr_pi *intreg_4m; 162 1.94.2.2 jdolecek /* 163 1.94.2.2 jdolecek * Send a IPI to (cpi). For Ross cpus we need to read 164 1.94.2.2 jdolecek * the pending register to avoid a hardware bug. 165 1.94.2.2 jdolecek */ 166 1.94.2.2 jdolecek #define raise_ipi(cpi,lvl) do { \ 167 1.94.2.2 jdolecek volatile int x; \ 168 1.94.2.2 jdolecek (cpi)->intreg_4m->pi_set = PINTR_SINTRLEV(lvl); \ 169 1.94.2.2 jdolecek x = (cpi)->intreg_4m->pi_pend; __USE(x); \ 170 1.94.2.2 jdolecek } while (0) 171 1.94.2.2 jdolecek 172 1.94.2.2 jdolecek int sun4_mmu3l; /* [4]: 3-level MMU present */ 173 1.94.2.2 jdolecek #if defined(SUN4_MMU3L) 174 1.94.2.2 jdolecek #define HASSUN4_MMU3L (cpuinfo.sun4_mmu3l) 175 1.94.2.2 jdolecek #else 176 1.94.2.2 jdolecek #define HASSUN4_MMU3L (0) 177 1.94.2.2 jdolecek #endif 178 1.94.2.2 jdolecek int ci_idepth; /* Interrupt depth */ 179 1.94.2.2 jdolecek 180 1.94.2.2 jdolecek /* 181 1.94.2.2 jdolecek * The following pointers point to processes that are somehow 182 1.94.2.2 jdolecek * associated with this CPU--running on it, using its FPU, 183 1.94.2.2 jdolecek * etc. 184 1.94.2.2 jdolecek */ 185 1.94.2.2 jdolecek struct lwp *ci_curlwp; /* CPU owner */ 186 1.94.2.2 jdolecek struct lwp *fplwp; /* FPU owner */ 187 1.94.2.2 jdolecek 188 1.94.2.2 jdolecek int ci_mtx_count; 189 1.94.2.2 jdolecek int ci_mtx_oldspl; 190 1.94.2.2 jdolecek 191 1.94.2.2 jdolecek /* 192 1.94.2.2 jdolecek * Idle PCB and Interrupt stack; 193 1.94.2.2 jdolecek */ 194 1.94.2.2 jdolecek void *eintstack; /* End of interrupt stack */ 195 1.94.2.2 jdolecek #define INT_STACK_SIZE (128 * 128) /* 128 128-byte stack frames */ 196 1.94.2.2 jdolecek void *redzone; /* DEBUG: stack red zone */ 197 1.94.2.2 jdolecek #define REDSIZE (8*96) /* some room for bouncing */ 198 1.94.2.2 jdolecek 199 1.94.2.2 jdolecek struct pcb *curpcb; /* CPU's PCB & kernel stack */ 200 1.94.2.2 jdolecek 201 1.94.2.2 jdolecek /* locore defined: */ 202 1.94.2.2 jdolecek void (*get_syncflt)(void); /* Not C-callable */ 203 1.94.2.2 jdolecek int (*get_asyncflt)(u_int *, u_int *); 204 1.94.2.2 jdolecek 205 1.94.2.2 jdolecek /* Synchronous Fault Status; temporary storage */ 206 1.94.2.2 jdolecek struct { 207 1.94.2.2 jdolecek int sfsr; 208 1.94.2.2 jdolecek int sfva; 209 1.94.2.2 jdolecek } syncfltdump; 210 1.94.2.2 jdolecek 211 1.94.2.2 jdolecek /* 212 1.94.2.2 jdolecek * Cache handling functions. 213 1.94.2.2 jdolecek * Most cache flush function come in two flavours: one that 214 1.94.2.2 jdolecek * acts only on the CPU it executes on, and another that 215 1.94.2.2 jdolecek * uses inter-processor signals to flush the cache on 216 1.94.2.2 jdolecek * all processor modules. 217 1.94.2.2 jdolecek * The `ft_' versions are fast trap cache flush handlers. 218 1.94.2.2 jdolecek */ 219 1.94.2.2 jdolecek void (*cache_flush)(void *, u_int); 220 1.94.2.2 jdolecek void (*vcache_flush_page)(int, int); 221 1.94.2.2 jdolecek void (*sp_vcache_flush_page)(int, int); 222 1.94.2.2 jdolecek void (*ft_vcache_flush_page)(int, int); 223 1.94.2.2 jdolecek void (*vcache_flush_segment)(int, int, int); 224 1.94.2.2 jdolecek void (*sp_vcache_flush_segment)(int, int, int); 225 1.94.2.2 jdolecek void (*ft_vcache_flush_segment)(int, int, int); 226 1.94.2.2 jdolecek void (*vcache_flush_region)(int, int); 227 1.94.2.2 jdolecek void (*sp_vcache_flush_region)(int, int); 228 1.94.2.2 jdolecek void (*ft_vcache_flush_region)(int, int); 229 1.94.2.2 jdolecek void (*vcache_flush_context)(int); 230 1.94.2.2 jdolecek void (*sp_vcache_flush_context)(int); 231 1.94.2.2 jdolecek void (*ft_vcache_flush_context)(int); 232 1.94.2.2 jdolecek 233 1.94.2.2 jdolecek /* The are helpers for (*cache_flush)() */ 234 1.94.2.2 jdolecek void (*sp_vcache_flush_range)(int, int, int); 235 1.94.2.2 jdolecek void (*ft_vcache_flush_range)(int, int, int); 236 1.94.2.2 jdolecek 237 1.94.2.2 jdolecek void (*pcache_flush_page)(paddr_t, int); 238 1.94.2.2 jdolecek void (*pure_vcache_flush)(void); 239 1.94.2.2 jdolecek void (*cache_flush_all)(void); 240 1.94.2.2 jdolecek 241 1.94.2.2 jdolecek /* Support for hardware-assisted page clear/copy */ 242 1.94.2.2 jdolecek void (*zero_page)(paddr_t); 243 1.94.2.2 jdolecek void (*copy_page)(paddr_t, paddr_t); 244 1.94.2.2 jdolecek 245 1.94.2.2 jdolecek /* Virtual addresses for use in pmap copy_page/zero_page */ 246 1.94.2.2 jdolecek void * vpage[2]; 247 1.94.2.2 jdolecek int *vpage_pte[2]; /* pte location of vpage[] */ 248 1.94.2.2 jdolecek 249 1.94.2.2 jdolecek void (*cache_enable)(void); 250 1.94.2.2 jdolecek 251 1.94.2.2 jdolecek int cpu_type; /* Type: see CPUTYP_xxx below */ 252 1.94.2.2 jdolecek 253 1.94.2.2 jdolecek /* Inter-processor message area (high priority but used infrequently) */ 254 1.94.2.2 jdolecek struct xpmsg msg_lev15; 255 1.94.2.2 jdolecek 256 1.94.2.2 jdolecek /* CPU information */ 257 1.94.2.2 jdolecek int node; /* PROM node for this CPU */ 258 1.94.2.2 jdolecek int mid; /* Module ID for MP systems */ 259 1.94.2.2 jdolecek int mbus; /* 1 if CPU is on MBus */ 260 1.94.2.2 jdolecek int mxcc; /* 1 if a MBus-level MXCC is present */ 261 1.94.2.2 jdolecek const char *cpu_longname; /* CPU model */ 262 1.94.2.2 jdolecek int cpu_impl; /* CPU implementation code */ 263 1.94.2.2 jdolecek int cpu_vers; /* CPU version code */ 264 1.94.2.2 jdolecek int mmu_impl; /* MMU implementation code */ 265 1.94.2.2 jdolecek int mmu_vers; /* MMU version code */ 266 1.94.2.2 jdolecek int master; /* 1 if this is bootup CPU */ 267 1.94.2.2 jdolecek 268 1.94.2.2 jdolecek vaddr_t mailbox; /* VA of CPU's mailbox */ 269 1.94.2.2 jdolecek 270 1.94.2.2 jdolecek int mmu_ncontext; /* Number of contexts supported */ 271 1.94.2.2 jdolecek int mmu_nregion; /* Number of regions supported */ 272 1.94.2.2 jdolecek int mmu_nsegment; /* [4/4c] Segments */ 273 1.94.2.2 jdolecek int mmu_npmeg; /* [4/4c] Pmegs */ 274 1.94.2.2 jdolecek 275 1.94.2.2 jdolecek /* XXX - we currently don't actually use the following */ 276 1.94.2.2 jdolecek int arch; /* Architecture: CPU_SUN4x */ 277 1.94.2.2 jdolecek int class; /* Class: SuperSPARC, microSPARC... */ 278 1.94.2.2 jdolecek int classlvl; /* Iteration in class: 1, 2, etc. */ 279 1.94.2.2 jdolecek int classsublvl; /* stepping in class (version) */ 280 1.94.2.2 jdolecek 281 1.94.2.2 jdolecek int hz; /* Clock speed */ 282 1.94.2.2 jdolecek 283 1.94.2.2 jdolecek /* FPU information */ 284 1.94.2.2 jdolecek int fpupresent; /* true if FPU is present */ 285 1.94.2.2 jdolecek int fpuvers; /* FPU revision */ 286 1.94.2.2 jdolecek const char *fpu_name; /* FPU model */ 287 1.94.2.2 jdolecek char fpu_namebuf[32];/* Buffer for FPU name, if necessary */ 288 1.94.2.2 jdolecek 289 1.94.2.2 jdolecek /* XXX */ 290 1.94.2.2 jdolecek volatile void *ci_ddb_regs; /* DDB regs */ 291 1.94.2.2 jdolecek 292 1.94.2.2 jdolecek /* 293 1.94.2.2 jdolecek * The following are function pointers to do interesting CPU-dependent 294 1.94.2.2 jdolecek * things without having to do type-tests all the time 295 1.94.2.2 jdolecek */ 296 1.94.2.2 jdolecek 297 1.94.2.2 jdolecek /* bootup things: access to physical memory */ 298 1.94.2.2 jdolecek u_int (*read_physmem)(u_int addr, int space); 299 1.94.2.2 jdolecek void (*write_physmem)(u_int addr, u_int data); 300 1.94.2.2 jdolecek void (*cache_tablewalks)(void); 301 1.94.2.2 jdolecek void (*mmu_enable)(void); 302 1.94.2.2 jdolecek void (*hotfix)(struct cpu_info *); 303 1.94.2.2 jdolecek 304 1.94.2.2 jdolecek 305 1.94.2.2 jdolecek #if 0 306 1.94.2.2 jdolecek /* hardware-assisted block operation routines */ 307 1.94.2.2 jdolecek void (*hwbcopy)(const void *from, void *to, size_t len); 308 1.94.2.2 jdolecek void (*hwbzero)(void *buf, size_t len); 309 1.94.2.2 jdolecek 310 1.94.2.2 jdolecek /* routine to clear mbus-sbus buffers */ 311 1.94.2.2 jdolecek void (*mbusflush)(void); 312 1.94.2.2 jdolecek #endif 313 1.94.2.2 jdolecek 314 1.94.2.2 jdolecek /* 315 1.94.2.2 jdolecek * Memory error handler; parity errors, unhandled NMIs and other 316 1.94.2.2 jdolecek * unrecoverable faults end up here. 317 1.94.2.2 jdolecek */ 318 1.94.2.2 jdolecek void (*memerr)(unsigned, u_int, u_int, struct trapframe *); 319 1.94.2.2 jdolecek void (*idlespin)(struct cpu_info *); 320 1.94.2.2 jdolecek /* Module Control Registers */ 321 1.94.2.2 jdolecek /*bus_space_handle_t*/ long ci_mbusport; 322 1.94.2.2 jdolecek /*bus_space_handle_t*/ long ci_mxccregs; 323 1.94.2.2 jdolecek 324 1.94.2.2 jdolecek u_int ci_tt; /* Last trap (if tracing) */ 325 1.94.2.2 jdolecek 326 1.94.2.2 jdolecek /* 327 1.94.2.2 jdolecek * Start/End VA's of this cpu_info region; we upload the other pages 328 1.94.2.2 jdolecek * in this region that aren't part of the cpu_info to uvm. 329 1.94.2.2 jdolecek */ 330 1.94.2.2 jdolecek vaddr_t ci_free_sva1, ci_free_eva1, ci_free_sva2, ci_free_eva2; 331 1.94.2.2 jdolecek 332 1.94.2.2 jdolecek struct evcnt ci_savefpstate; 333 1.94.2.2 jdolecek struct evcnt ci_savefpstate_null; 334 1.94.2.2 jdolecek struct evcnt ci_xpmsg_mutex_fail; 335 1.94.2.2 jdolecek struct evcnt ci_xpmsg_mutex_fail_call; 336 1.94.2.2 jdolecek struct evcnt ci_xpmsg_mutex_not_held; 337 1.94.2.2 jdolecek struct evcnt ci_xpmsg_bogus; 338 1.94.2.2 jdolecek struct evcnt ci_intrcnt[16]; 339 1.94.2.2 jdolecek struct evcnt ci_sintrcnt[16]; 340 1.94.2.2 jdolecek }; 341 1.1 deraadt 342 1.1 deraadt /* 343 1.1 deraadt * definitions of cpu-dependent requirements 344 1.1 deraadt * referenced in generic code 345 1.1 deraadt */ 346 1.94.2.2 jdolecek #define cpuinfo (*(struct cpu_info *)CPUINFO_VA) 347 1.39 thorpej #define curcpu() (cpuinfo.ci_self) 348 1.62 thorpej #define curlwp (cpuinfo.ci_curlwp) 349 1.40 thorpej #define CPU_IS_PRIMARY(ci) ((ci)->master) 350 1.37 thorpej 351 1.62 thorpej #define cpu_number() (cpuinfo.ci_cpuid) 352 1.94.2.2 jdolecek 353 1.94.2.2 jdolecek #endif /* _KERNEL || _KMEMUSER */ 354 1.94.2.2 jdolecek 355 1.94.2.2 jdolecek /* Kernel only things. */ 356 1.94.2.2 jdolecek #if defined(_KERNEL) 357 1.76 uwe void cpu_proc_fork(struct proc *, struct proc *); 358 1.35 thorpej 359 1.35 thorpej #if defined(MULTIPROCESSOR) 360 1.74 uwe void cpu_boot_secondary_processors(void); 361 1.35 thorpej #endif 362 1.1 deraadt 363 1.1 deraadt /* 364 1.60 pk * Arguments to hardclock, softclock and statclock encapsulate the 365 1.1 deraadt * previous machine state in an opaque clockframe. The ipl is here 366 1.1 deraadt * as well for strayintr (see locore.s:interrupt and intr.c:strayintr). 367 1.1 deraadt * Note that CLKF_INTR is valid only if CLKF_USERMODE is false. 368 1.1 deraadt */ 369 1.1 deraadt struct clockframe { 370 1.1 deraadt u_int psr; /* psr before interrupt, excluding PSR_ET */ 371 1.1 deraadt u_int pc; /* pc at interrupt */ 372 1.1 deraadt u_int npc; /* npc at interrupt */ 373 1.1 deraadt u_int ipl; /* actual interrupt priority level */ 374 1.1 deraadt u_int fp; /* %fp at interrupt */ 375 1.1 deraadt }; 376 1.3 deraadt typedef struct clockframe clockframe; 377 1.1 deraadt 378 1.1 deraadt extern int eintstack[]; 379 1.1 deraadt 380 1.1 deraadt #define CLKF_USERMODE(framep) (((framep)->psr & PSR_PS) == 0) 381 1.60 pk #define CLKF_LOPRI(framep,n) (((framep)->psr & PSR_PIL) < (n) << 8) 382 1.1 deraadt #define CLKF_PC(framep) ((framep)->pc) 383 1.30 pk #if defined(MULTIPROCESSOR) 384 1.30 pk #define CLKF_INTR(framep) \ 385 1.30 pk ((framep)->fp > (u_int)cpuinfo.eintstack - INT_STACK_SIZE && \ 386 1.30 pk (framep)->fp < (u_int)cpuinfo.eintstack) 387 1.30 pk #else 388 1.1 deraadt #define CLKF_INTR(framep) ((framep)->fp < (u_int)eintstack) 389 1.30 pk #endif 390 1.21 pk 391 1.83 ad void sparc_softintr_init(void); 392 1.1 deraadt 393 1.1 deraadt /* 394 1.57 pk * Preempt the current process on the target CPU if in interrupt from 395 1.57 pk * user mode, or after the current trap/syscall if in system mode. 396 1.1 deraadt */ 397 1.81 yamt #define cpu_need_resched(ci, flags) do { \ 398 1.94.2.1 tls __USE(flags); \ 399 1.81 yamt (ci)->ci_want_resched = 1; \ 400 1.81 yamt (ci)->ci_want_ast = 1; \ 401 1.57 pk \ 402 1.57 pk /* Just interrupt the target CPU, so it can notice its AST */ \ 403 1.81 yamt if (((flags) & RESCHED_IMMED) || (ci)->ci_cpuid != cpu_number()) \ 404 1.57 pk XCALL0(sparc_noop, 1U << (ci)->ci_cpuid); \ 405 1.74 uwe } while (/*CONSTCOND*/0) 406 1.1 deraadt 407 1.1 deraadt /* 408 1.1 deraadt * Give a profiling tick to the current process when the user profiling 409 1.21 pk * buffer pages are invalid. On the sparc, request an ast to send us 410 1.1 deraadt * through trap(), marking the proc as needing a profiling tick. 411 1.1 deraadt */ 412 1.81 yamt #define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, cpuinfo.ci_want_ast = 1) 413 1.1 deraadt 414 1.1 deraadt /* 415 1.1 deraadt * Notify the current process (p) that it has a signal pending, 416 1.1 deraadt * process as soon as possible. 417 1.1 deraadt */ 418 1.78 ad #define cpu_signotify(l) do { \ 419 1.85 mrg (l)->l_cpu->ci_want_ast = 1; \ 420 1.78 ad \ 421 1.78 ad /* Just interrupt the target CPU, so it can notice its AST */ \ 422 1.85 mrg if ((l)->l_cpu->ci_cpuid != cpu_number()) \ 423 1.85 mrg XCALL0(sparc_noop, 1U << (l)->l_cpu->ci_cpuid); \ 424 1.78 ad } while (/*CONSTCOND*/0) 425 1.51 pk 426 1.51 pk /* CPU architecture version */ 427 1.51 pk extern int cpu_arch; 428 1.1 deraadt 429 1.28 pk /* Number of CPUs in the system */ 430 1.72 briggs extern int sparc_ncpus; 431 1.1 deraadt 432 1.91 martin /* Provide %pc of a lwp */ 433 1.91 martin #define LWP_PC(l) ((l)->l_md.md_tf->tf_pc) 434 1.91 martin 435 1.1 deraadt /* 436 1.1 deraadt * Interrupt handler chains. Interrupt handlers should return 0 for 437 1.1 deraadt * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a 438 1.1 deraadt * handler into the list. The handler is called with its (single) 439 1.1 deraadt * argument, or with a pointer to a clockframe if ih_arg is NULL. 440 1.88 mrg * 441 1.88 mrg * realfun/realarg are used to chain callers, usually with the 442 1.88 mrg * biglock wrapper. 443 1.1 deraadt */ 444 1.25 tv extern struct intrhand { 445 1.54 pk int (*ih_fun)(void *); 446 1.1 deraadt void *ih_arg; 447 1.1 deraadt struct intrhand *ih_next; 448 1.52 pk int ih_classipl; 449 1.88 mrg int (*ih_realfun)(void *); 450 1.88 mrg void *ih_realarg; 451 1.1 deraadt } *intrhand[15]; 452 1.1 deraadt 453 1.89 mrg void intr_establish(int, int, struct intrhand *, void (*)(void), bool); 454 1.74 uwe void intr_disestablish(int, struct intrhand *); 455 1.1 deraadt 456 1.54 pk void intr_lock_kernel(void); 457 1.54 pk void intr_unlock_kernel(void); 458 1.19 christos 459 1.19 christos /* disksubr.c */ 460 1.19 christos struct dkbad; 461 1.74 uwe int isbad(struct dkbad *, int, int, int); 462 1.74 uwe 463 1.19 christos /* machdep.c */ 464 1.80 christos int ldcontrolb(void *); 465 1.80 christos void * reserve_dumppages(void *); 466 1.74 uwe void wcopy(const void *, void *, u_int); 467 1.74 uwe void wzero(void *, u_int); 468 1.74 uwe 469 1.19 christos /* clock.c */ 470 1.19 christos struct timeval; 471 1.54 pk void lo_microtime(struct timeval *); 472 1.56 pk void schedintr(void *); 473 1.74 uwe 474 1.19 christos /* locore.s */ 475 1.19 christos struct fpstate; 476 1.90 mrg void ipi_savefpstate(struct fpstate *); 477 1.54 pk void savefpstate(struct fpstate *); 478 1.54 pk void loadfpstate(struct fpstate *); 479 1.80 christos int probeget(void *, int); 480 1.54 pk void write_all_windows(void); 481 1.54 pk void write_user_windows(void); 482 1.81 yamt void lwp_trampoline(void); 483 1.19 christos struct pcb; 484 1.54 pk void snapshot(struct pcb *); 485 1.54 pk struct frame *getfp(void); 486 1.80 christos int xldcontrolb(void *, struct pcb *); 487 1.54 pk void copywords(const void *, void *, size_t); 488 1.54 pk void qcopy(const void *, void *, size_t); 489 1.54 pk void qzero(void *, size_t); 490 1.74 uwe 491 1.19 christos /* trap.c */ 492 1.92 martin void cpu_vmspace_exec(struct lwp *, vaddr_t, vaddr_t); 493 1.62 thorpej int rwindow_save(struct lwp *); 494 1.74 uwe 495 1.19 christos /* cons.c */ 496 1.54 pk int cnrom(void); 497 1.74 uwe 498 1.19 christos /* zs.c */ 499 1.54 pk void zsconsole(struct tty *, int, int, void (**)(struct tty *, int)); 500 1.19 christos #ifdef KGDB 501 1.54 pk void zs_kgdb_init(void); 502 1.19 christos #endif 503 1.74 uwe 504 1.19 christos /* fb.c */ 505 1.54 pk void fb_unblank(void); 506 1.74 uwe 507 1.19 christos /* kgdb_stub.c */ 508 1.19 christos #ifdef KGDB 509 1.54 pk void kgdb_attach(int (*)(void *), void (*)(void *, int), void *); 510 1.54 pk void kgdb_connect(int); 511 1.54 pk void kgdb_panic(void); 512 1.19 christos #endif 513 1.74 uwe 514 1.24 pk /* emul.c */ 515 1.24 pk struct trapframe; 516 1.94 martin int fixalign(struct lwp *, struct trapframe *, void **); 517 1.54 pk int emulinstr(int, struct trapframe *); 518 1.74 uwe 519 1.28 pk /* cpu.c */ 520 1.54 pk void mp_pause_cpus(void); 521 1.54 pk void mp_resume_cpus(void); 522 1.54 pk void mp_halt_cpus(void); 523 1.61 pk #ifdef DDB 524 1.61 pk void mp_pause_cpus_ddb(void); 525 1.61 pk void mp_resume_cpus_ddb(void); 526 1.61 pk #endif 527 1.74 uwe 528 1.63 pk /* intr.c */ 529 1.63 pk u_int setitr(u_int); 530 1.63 pk u_int getitr(void); 531 1.4 deraadt 532 1.74 uwe 533 1.4 deraadt /* 534 1.4 deraadt * 535 1.4 deraadt * The SPARC has a Trap Base Register (TBR) which holds the upper 20 bits 536 1.4 deraadt * of the trap vector table. The next eight bits are supplied by the 537 1.4 deraadt * hardware when the trap occurs, and the bottom four bits are always 538 1.4 deraadt * zero (so that we can shove up to 16 bytes of executable code---exactly 539 1.4 deraadt * four instructions---into each trap vector). 540 1.4 deraadt * 541 1.4 deraadt * The hardware allocates half the trap vectors to hardware and half to 542 1.4 deraadt * software. 543 1.4 deraadt * 544 1.4 deraadt * Traps have priorities assigned (lower number => higher priority). 545 1.4 deraadt */ 546 1.4 deraadt 547 1.4 deraadt struct trapvec { 548 1.4 deraadt int tv_instr[4]; /* the four instructions */ 549 1.4 deraadt }; 550 1.74 uwe 551 1.21 pk extern struct trapvec *trapbase; /* the 256 vectors */ 552 1.11 deraadt 553 1.12 jtc #endif /* _KERNEL */ 554 1.1 deraadt #endif /* _CPU_H_ */ 555
Indexes created Sun Oct 12 02:09:55 GMT 2025