cpu.h revision 1.1 1 /*
2 * Copyright (c) 1992, 1993
3 * The Regents of the University of California. All rights reserved.
4 *
5 * This software was developed by the Computer Systems Engineering group
6 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
7 * contributed to Berkeley.
8 *
9 * All advertising materials mentioning features or use of this software
10 * must display the following acknowledgement:
11 * This product includes software developed by the University of
12 * California, Lawrence Berkeley Laboratory.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 * 3. All advertising materials mentioning features or use of this software
23 * must display the following acknowledgement:
24 * This product includes software developed by the University of
25 * California, Berkeley and its contributors.
26 * 4. Neither the name of the University nor the names of its contributors
27 * may be used to endorse or promote products derived from this software
28 * without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 * SUCH DAMAGE.
41 *
42 * @(#)cpu.h 8.1 (Berkeley) 6/11/93
43 *
44 * from: Header: cpu.h,v 1.12 93/05/25 10:36:34 torek Exp (LBL)
45 * $Id: cpu.h,v 1.1 1993/10/02 10:23:07 deraadt Exp $
46 */
47
48 #ifndef _CPU_H_
49 #define _CPU_H_
50
51 /*
52 * CTL_MACHDEP definitinos.
53 */
54 #define CPU_MAXID 1 /* no valid machdep ids */
55
56 #define CTL_MACHDEP_NAMES { \
57 { 0, 0 }, \
58 }
59
60 #ifdef KERNEL
61 /*
62 * Exported definitions unique to SPARC cpu support.
63 */
64
65 #include <machine/psl.h>
66 #include <sparc/sparc/intreg.h>
67
68 /*
69 * definitions of cpu-dependent requirements
70 * referenced in generic code
71 */
72 #define COPY_SIGCODE /* copy sigcode above user stack in exec */
73
74 #define cpu_exec(p) /* nothing */
75 #define cpu_wait(p) /* nothing */
76 #define cpu_setstack(p, ap) ((p)->p_md.md_tf->tf_out[6] = (ap) - 64)
77
78 /*
79 * Arguments to hardclock, softclock and gatherstats encapsulate the
80 * previous machine state in an opaque clockframe. The ipl is here
81 * as well for strayintr (see locore.s:interrupt and intr.c:strayintr).
82 * Note that CLKF_INTR is valid only if CLKF_USERMODE is false.
83 */
84 struct clockframe {
85 u_int psr; /* psr before interrupt, excluding PSR_ET */
86 u_int pc; /* pc at interrupt */
87 u_int npc; /* npc at interrupt */
88 u_int ipl; /* actual interrupt priority level */
89 u_int fp; /* %fp at interrupt */
90 };
91
92 extern int eintstack[];
93
94 #define CLKF_USERMODE(framep) (((framep)->psr & PSR_PS) == 0)
95 #define CLKF_BASEPRI(framep) (((framep)->psr & PSR_PIL) == 0)
96 #define CLKF_PC(framep) ((framep)->pc)
97 #define CLKF_INTR(framep) ((framep)->fp < (u_int)eintstack)
98
99 /*
100 * Software interrupt request `register'.
101 */
102 union sir {
103 int sir_any;
104 char sir_which[4];
105 } sir;
106
107 #define SIR_NET 0
108 #define SIR_CLOCK 1
109
110 #define setsoftint() ienab_bis(IE_L1)
111 #define setsoftnet() (sir.sir_which[SIR_NET] = 1, setsoftint())
112 #define setsoftclock() (sir.sir_which[SIR_CLOCK] = 1, setsoftint())
113
114 int want_ast;
115
116 /*
117 * Preempt the current process if in interrupt from user mode,
118 * or after the current trap/syscall if in system mode.
119 */
120 int want_resched; /* resched() was called */
121 #define need_resched() (want_resched = 1, want_ast = 1)
122
123 /*
124 * Give a profiling tick to the current process when the user profiling
125 * buffer pages are invalid. On the sparc, request an ast to send us
126 * through trap(), marking the proc as needing a profiling tick.
127 */
128 #define need_proftick(p) ((p)->p_flag |= SOWEUPC, want_ast = 1)
129
130 /*
131 * Notify the current process (p) that it has a signal pending,
132 * process as soon as possible.
133 */
134 #define signotify(p) (want_ast = 1)
135
136 /*
137 * Only one process may own the FPU state.
138 *
139 * XXX this must be per-cpu (eventually)
140 */
141 struct proc *fpproc; /* FPU owner */
142 int foundfpu; /* true => we have an FPU */
143
144 /*
145 * Interrupt handler chains. Interrupt handlers should return 0 for
146 * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a
147 * handler into the list. The handler is called with its (single)
148 * argument, or with a pointer to a clockframe if ih_arg is NULL.
149 */
150 struct intrhand {
151 int (*ih_fun) __P((void *));
152 void *ih_arg;
153 struct intrhand *ih_next;
154 } *intrhand[15];
155
156 void intr_establish __P((int level, struct intrhand *));
157
158 /*
159 * intr_fasttrap() is a lot like intr_establish, but is used for ``fast''
160 * interrupt vectors (vectors that are not shared and are handled in the
161 * trap window). Such functions must be written in assembly.
162 */
163 void intr_fasttrap __P((int level, void (*vec)(void)));
164
165 #endif /* KERNEL */
166 #endif /* _CPU_H_ */
167