cpu.h revision 1.31
1 /* $NetBSD: cpu.h,v 1.31 1998/11/11 06:43:50 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 45 */ 46 47 #ifndef _CPU_H_ 48 #define _CPU_H_ 49 50 /* 51 * CTL_MACHDEP definitions. 52 */ 53 #define CPU_MAXID 1 /* no valid machdep ids */ 54 55 #define CTL_MACHDEP_NAMES { \ 56 { 0, 0 }, \ 57 } 58 59 #ifdef _KERNEL 60 /* 61 * Exported definitions unique to SPARC cpu support. 62 */ 63 64 #include <machine/psl.h> 65 #include <sparc/sparc/intreg.h> 66 67 /* 68 * definitions of cpu-dependent requirements 69 * referenced in generic code 70 */ 71 #define cpu_swapin(p) /* nothing */ 72 #define cpu_swapout(p) /* nothing */ 73 #define cpu_wait(p) /* nothing */ 74 75 /* 76 * Arguments to hardclock, softclock and gatherstats encapsulate the 77 * previous machine state in an opaque clockframe. The ipl is here 78 * as well for strayintr (see locore.s:interrupt and intr.c:strayintr). 79 * Note that CLKF_INTR is valid only if CLKF_USERMODE is false. 80 */ 81 struct clockframe { 82 u_int psr; /* psr before interrupt, excluding PSR_ET */ 83 u_int pc; /* pc at interrupt */ 84 u_int npc; /* npc at interrupt */ 85 u_int ipl; /* actual interrupt priority level */ 86 u_int fp; /* %fp at interrupt */ 87 }; 88 typedef struct clockframe clockframe; 89 90 extern int eintstack[]; 91 92 #define CLKF_USERMODE(framep) (((framep)->psr & PSR_PS) == 0) 93 #define CLKF_BASEPRI(framep) (((framep)->psr & PSR_PIL) == 0) 94 #define CLKF_PC(framep) ((framep)->pc) 95 #if defined(MULTIPROCESSOR) 96 #define CLKF_INTR(framep) \ 97 ((framep)->fp > (u_int)cpuinfo.eintstack - INT_STACK_SIZE && \ 98 (framep)->fp < (u_int)cpuinfo.eintstack) 99 #else 100 #define CLKF_INTR(framep) ((framep)->fp < (u_int)eintstack) 101 #endif 102 103 /* 104 * Software interrupt request `register'. 105 */ 106 extern union sir { 107 int sir_any; 108 char sir_which[4]; 109 } sir; 110 111 #define SIR_NET 0 112 #define SIR_CLOCK 1 113 114 #if defined(SUN4M) 115 extern void raise __P((int, int)); 116 #if !(defined(SUN4) || defined(SUN4C)) 117 #define setsoftint() raise(0,1) 118 #else /* both defined */ 119 #define setsoftint() (cputyp == CPU_SUN4M ? raise(0,1) : ienab_bis(IE_L1)) 120 #endif /* !4,!4c */ 121 #else /* 4m not defined */ 122 #define setsoftint() ienab_bis(IE_L1) 123 #endif /* SUN4M */ 124 125 #define setsoftnet() (sir.sir_which[SIR_NET] = 1, setsoftint()) 126 #define setsoftclock() (sir.sir_which[SIR_CLOCK] = 1, setsoftint()) 127 128 extern int want_ast; 129 130 /* 131 * Preempt the current process if in interrupt from user mode, 132 * or after the current trap/syscall if in system mode. 133 */ 134 extern int want_resched; /* resched() was called */ 135 #define need_resched() (want_resched = 1, want_ast = 1) 136 137 /* 138 * Give a profiling tick to the current process when the user profiling 139 * buffer pages are invalid. On the sparc, request an ast to send us 140 * through trap(), marking the proc as needing a profiling tick. 141 */ 142 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, want_ast = 1) 143 144 /* 145 * Notify the current process (p) that it has a signal pending, 146 * process as soon as possible. 147 */ 148 #define signotify(p) (want_ast = 1) 149 150 /* Number of CPUs in the system */ 151 extern int ncpu; 152 153 /* 154 * Only one process may own the FPU state. 155 * 156 * XXX this must be per-cpu (eventually) 157 */ 158 extern struct proc *fpproc; /* FPU owner */ 159 extern int foundfpu; /* true => we have an FPU */ 160 161 /* 162 * Interrupt handler chains. Interrupt handlers should return 0 for 163 * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a 164 * handler into the list. The handler is called with its (single) 165 * argument, or with a pointer to a clockframe if ih_arg is NULL. 166 */ 167 extern struct intrhand { 168 int (*ih_fun) __P((void *)); 169 void *ih_arg; 170 struct intrhand *ih_next; 171 } *intrhand[15]; 172 173 void intr_establish __P((int level, struct intrhand *)); 174 175 /* 176 * intr_fasttrap() is a lot like intr_establish, but is used for ``fast'' 177 * interrupt vectors (vectors that are not shared and are handled in the 178 * trap window). Such functions must be written in assembly. 179 */ 180 void intr_fasttrap __P((int level, void (*vec)(void))); 181 182 /* disksubr.c */ 183 struct dkbad; 184 int isbad __P((struct dkbad *bt, int, int, int)); 185 /* machdep.c */ 186 int ldcontrolb __P((caddr_t)); 187 void dumpconf __P((void)); 188 caddr_t reserve_dumppages __P((caddr_t)); 189 /* clock.c */ 190 struct timeval; 191 void lo_microtime __P((struct timeval *)); 192 int statintr __P((void *)); 193 int clockintr __P((void *));/* level 10 (clock) interrupt code */ 194 int statintr __P((void *)); /* level 14 (statclock) interrupt code */ 195 /* locore.s */ 196 struct fpstate; 197 void savefpstate __P((struct fpstate *)); 198 void loadfpstate __P((struct fpstate *)); 199 int probeget __P((caddr_t, int)); 200 void write_all_windows __P((void)); 201 void write_user_windows __P((void)); 202 void proc_trampoline __P((void)); 203 struct pcb; 204 void snapshot __P((struct pcb *)); 205 struct frame *getfp __P((void)); 206 int xldcontrolb __P((caddr_t, struct pcb *)); 207 void copywords __P((const void *, void *, size_t)); 208 void qcopy __P((const void *, void *, size_t)); 209 void qzero __P((void *, size_t)); 210 /* locore2.c */ 211 void remrunqueue __P((struct proc *)); 212 /* trap.c */ 213 void kill_user_windows __P((struct proc *)); 214 int rwindow_save __P((struct proc *)); 215 void child_return __P((void *)); 216 /* amd7930intr.s */ 217 void amd7930_trap __P((void)); 218 /* cons.c */ 219 int cnrom __P((void)); 220 /* zs.c */ 221 void zsconsole __P((struct tty *, int, int, void (**)(struct tty *, int))); 222 #ifdef KGDB 223 void zs_kgdb_init __P((void)); 224 #endif 225 /* fb.c */ 226 void fb_unblank __P((void)); 227 /* cache.c */ 228 void cache_flush __P((caddr_t, u_int)); 229 /* kgdb_stub.c */ 230 #ifdef KGDB 231 void kgdb_attach __P((int (*)(void *), void (*)(void *, int), void *)); 232 void kgdb_connect __P((int)); 233 void kgdb_panic __P((void)); 234 #endif 235 /* emul.c */ 236 struct trapframe; 237 int fixalign __P((struct proc *, struct trapframe *)); 238 int emulinstr __P((int, struct trapframe *)); 239 /* cpu.c */ 240 void mp_pause_cpus __P((void)); 241 void mp_resume_cpus __P((void)); 242 void mp_halt_cpus __P((void)); 243 244 /* 245 * 246 * The SPARC has a Trap Base Register (TBR) which holds the upper 20 bits 247 * of the trap vector table. The next eight bits are supplied by the 248 * hardware when the trap occurs, and the bottom four bits are always 249 * zero (so that we can shove up to 16 bytes of executable code---exactly 250 * four instructions---into each trap vector). 251 * 252 * The hardware allocates half the trap vectors to hardware and half to 253 * software. 254 * 255 * Traps have priorities assigned (lower number => higher priority). 256 */ 257 258 struct trapvec { 259 int tv_instr[4]; /* the four instructions */ 260 }; 261 extern struct trapvec *trapbase; /* the 256 vectors */ 262 263 extern void wzero __P((void *, u_int)); 264 extern void wcopy __P((const void *, void *, u_int)); 265 266 #endif /* _KERNEL */ 267 #endif /* _CPU_H_ */ 268
Indexes created Wed Sep 24 05:09:52 GMT 2025