cpu.h revision 1.34
1 /* $NetBSD: cpu.h,v 1.34 1999/10/04 19:11:43 pk Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 45 */ 46 47 #ifndef _CPU_H_ 48 #define _CPU_H_ 49 50 /* 51 * CTL_MACHDEP definitions. 52 */ 53 #define CPU_BOOTED_KERNEL 1 /* string: booted kernel name */ 54 #define CPU_MAXID 2 /* number of valid machdep ids */ 55 56 #define CTL_MACHDEP_NAMES { \ 57 { 0, 0 }, \ 58 { "booted_kernel", CTLTYPE_STRING }, \ 59 } 60 61 #ifdef _KERNEL 62 /* 63 * Exported definitions unique to SPARC cpu support. 64 */ 65 66 #include <machine/psl.h> 67 #include <sparc/sparc/intreg.h> 68 69 /* 70 * definitions of cpu-dependent requirements 71 * referenced in generic code 72 */ 73 #define cpu_swapin(p) /* nothing */ 74 #define cpu_swapout(p) /* nothing */ 75 #define cpu_wait(p) /* nothing */ 76 #define cpu_number() 0 /* XXX */ 77 78 /* 79 * Arguments to hardclock, softclock and gatherstats encapsulate the 80 * previous machine state in an opaque clockframe. The ipl is here 81 * as well for strayintr (see locore.s:interrupt and intr.c:strayintr). 82 * Note that CLKF_INTR is valid only if CLKF_USERMODE is false. 83 */ 84 struct clockframe { 85 u_int psr; /* psr before interrupt, excluding PSR_ET */ 86 u_int pc; /* pc at interrupt */ 87 u_int npc; /* npc at interrupt */ 88 u_int ipl; /* actual interrupt priority level */ 89 u_int fp; /* %fp at interrupt */ 90 }; 91 typedef struct clockframe clockframe; 92 93 extern int eintstack[]; 94 95 #define CLKF_USERMODE(framep) (((framep)->psr & PSR_PS) == 0) 96 #define CLKF_BASEPRI(framep) (((framep)->psr & PSR_PIL) == 0) 97 #define CLKF_PC(framep) ((framep)->pc) 98 #if defined(MULTIPROCESSOR) 99 #define CLKF_INTR(framep) \ 100 ((framep)->fp > (u_int)cpuinfo.eintstack - INT_STACK_SIZE && \ 101 (framep)->fp < (u_int)cpuinfo.eintstack) 102 #else 103 #define CLKF_INTR(framep) ((framep)->fp < (u_int)eintstack) 104 #endif 105 106 /* 107 * Software interrupt request `register'. 108 */ 109 extern union sir { 110 int sir_any; 111 char sir_which[4]; 112 } sir; 113 114 #define SIR_NET 0 115 #define SIR_CLOCK 1 116 #define SIR_SERIAL 2 117 118 #if defined(SUN4M) 119 extern void raise __P((int, int)); 120 #if !(defined(SUN4) || defined(SUN4C)) 121 #define setsoftint() raise(0,1) 122 #else /* both defined */ 123 #define setsoftint() (cputyp == CPU_SUN4M ? raise(0,1) : ienab_bis(IE_L1)) 124 #endif /* !4,!4c */ 125 #else /* 4m not defined */ 126 #define setsoftint() ienab_bis(IE_L1) 127 #endif /* SUN4M */ 128 129 #define setsoftnet() (sir.sir_which[SIR_NET] = 1, setsoftint()) 130 #define setsoftclock() (sir.sir_which[SIR_CLOCK] = 1, setsoftint()) 131 #define setsoftserial() (sir.sir_which[SIR_SERIAL] = 1, setsoftint()) 132 133 extern int want_ast; 134 135 /* 136 * Preempt the current process if in interrupt from user mode, 137 * or after the current trap/syscall if in system mode. 138 */ 139 extern int want_resched; /* resched() was called */ 140 #define need_resched() (want_resched = 1, want_ast = 1) 141 142 /* 143 * Give a profiling tick to the current process when the user profiling 144 * buffer pages are invalid. On the sparc, request an ast to send us 145 * through trap(), marking the proc as needing a profiling tick. 146 */ 147 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, want_ast = 1) 148 149 /* 150 * Notify the current process (p) that it has a signal pending, 151 * process as soon as possible. 152 */ 153 #define signotify(p) (want_ast = 1) 154 155 /* Number of CPUs in the system */ 156 extern int ncpu; 157 158 /* 159 * Only one process may own the FPU state. 160 * 161 * XXX this must be per-cpu (eventually) 162 */ 163 extern struct proc *fpproc; /* FPU owner */ 164 extern int foundfpu; /* true => we have an FPU */ 165 166 /* 167 * Interrupt handler chains. Interrupt handlers should return 0 for 168 * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a 169 * handler into the list. The handler is called with its (single) 170 * argument, or with a pointer to a clockframe if ih_arg is NULL. 171 */ 172 extern struct intrhand { 173 int (*ih_fun) __P((void *)); 174 void *ih_arg; 175 struct intrhand *ih_next; 176 } *intrhand[15]; 177 178 void intr_establish __P((int level, struct intrhand *)); 179 180 /* 181 * intr_fasttrap() is a lot like intr_establish, but is used for ``fast'' 182 * interrupt vectors (vectors that are not shared and are handled in the 183 * trap window). Such functions must be written in assembly. 184 */ 185 void intr_fasttrap __P((int level, void (*vec)(void))); 186 187 /* disksubr.c */ 188 struct dkbad; 189 int isbad __P((struct dkbad *bt, int, int, int)); 190 /* machdep.c */ 191 int ldcontrolb __P((caddr_t)); 192 void dumpconf __P((void)); 193 caddr_t reserve_dumppages __P((caddr_t)); 194 /* clock.c */ 195 struct timeval; 196 void lo_microtime __P((struct timeval *)); 197 int statintr __P((void *)); 198 int clockintr __P((void *));/* level 10 (clock) interrupt code */ 199 int statintr __P((void *)); /* level 14 (statclock) interrupt code */ 200 /* locore.s */ 201 struct fpstate; 202 void savefpstate __P((struct fpstate *)); 203 void loadfpstate __P((struct fpstate *)); 204 int probeget __P((caddr_t, int)); 205 void write_all_windows __P((void)); 206 void write_user_windows __P((void)); 207 void proc_trampoline __P((void)); 208 struct pcb; 209 void snapshot __P((struct pcb *)); 210 struct frame *getfp __P((void)); 211 int xldcontrolb __P((caddr_t, struct pcb *)); 212 void copywords __P((const void *, void *, size_t)); 213 void qcopy __P((const void *, void *, size_t)); 214 void qzero __P((void *, size_t)); 215 /* locore2.c */ 216 void remrunqueue __P((struct proc *)); 217 /* trap.c */ 218 void kill_user_windows __P((struct proc *)); 219 int rwindow_save __P((struct proc *)); 220 void child_return __P((void *)); 221 /* amd7930intr.s */ 222 void amd7930_trap __P((void)); 223 /* cons.c */ 224 int cnrom __P((void)); 225 /* zs.c */ 226 void zsconsole __P((struct tty *, int, int, void (**)(struct tty *, int))); 227 #ifdef KGDB 228 void zs_kgdb_init __P((void)); 229 #endif 230 /* fb.c */ 231 void fb_unblank __P((void)); 232 /* cache.c */ 233 void cache_flush __P((caddr_t, u_int)); 234 /* kgdb_stub.c */ 235 #ifdef KGDB 236 void kgdb_attach __P((int (*)(void *), void (*)(void *, int), void *)); 237 void kgdb_connect __P((int)); 238 void kgdb_panic __P((void)); 239 #endif 240 /* emul.c */ 241 struct trapframe; 242 int fixalign __P((struct proc *, struct trapframe *)); 243 int emulinstr __P((int, struct trapframe *)); 244 /* cpu.c */ 245 void mp_pause_cpus __P((void)); 246 void mp_resume_cpus __P((void)); 247 void mp_halt_cpus __P((void)); 248 249 /* 250 * 251 * The SPARC has a Trap Base Register (TBR) which holds the upper 20 bits 252 * of the trap vector table. The next eight bits are supplied by the 253 * hardware when the trap occurs, and the bottom four bits are always 254 * zero (so that we can shove up to 16 bytes of executable code---exactly 255 * four instructions---into each trap vector). 256 * 257 * The hardware allocates half the trap vectors to hardware and half to 258 * software. 259 * 260 * Traps have priorities assigned (lower number => higher priority). 261 */ 262 263 struct trapvec { 264 int tv_instr[4]; /* the four instructions */ 265 }; 266 extern struct trapvec *trapbase; /* the 256 vectors */ 267 268 extern void wzero __P((void *, u_int)); 269 extern void wcopy __P((const void *, void *, u_int)); 270 271 #endif /* _KERNEL */ 272 #endif /* _CPU_H_ */ 273
Indexes created Mon Sep 22 05:09:51 GMT 2025