lock.h revision 1.28 1 /* $NetBSD: lock.h,v 1.28 2007/02/17 19:30:33 ad Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2006 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Paul Kranenburg and Andrew Doran.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #ifndef _MACHINE_LOCK_H
40 #define _MACHINE_LOCK_H
41
42 /*
43 * Machine dependent spin lock operations.
44 */
45
46 #if __SIMPLELOCK_UNLOCKED != 0
47 #error __SIMPLELOCK_UNLOCKED must be 0 for this implementation
48 #endif
49
50 /* XXX So we can expose this to userland. */
51 #ifdef __lint__
52 #define __ldstub(__addr) (__addr)
53 #else /* !__lint__ */
54 static __inline int __ldstub(__cpu_simple_lock_t *addr);
55 static __inline int __ldstub(__cpu_simple_lock_t *addr)
56 {
57 int v;
58
59 __asm volatile("ldstub [%1],%0"
60 : "=&r" (v)
61 : "r" (addr)
62 : "memory");
63
64 return v;
65 }
66 #endif /* __lint__ */
67
68 static __inline void __cpu_simple_lock_init(__cpu_simple_lock_t *)
69 __attribute__((__unused__));
70 static __inline int __cpu_simple_lock_try(__cpu_simple_lock_t *)
71 __attribute__((__unused__));
72 static __inline void __cpu_simple_unlock(__cpu_simple_lock_t *)
73 __attribute__((__unused__));
74 #ifndef __CPU_SIMPLE_LOCK_NOINLINE
75 static __inline void __cpu_simple_lock(__cpu_simple_lock_t *)
76 __attribute__((__unused__));
77 #else
78 extern void __cpu_simple_lock(__cpu_simple_lock_t *);
79 #endif
80
81 static __inline void
82 __cpu_simple_lock_init(__cpu_simple_lock_t *alp)
83 {
84
85 *alp = __SIMPLELOCK_UNLOCKED;
86 }
87
88 #ifndef __CPU_SIMPLE_LOCK_NOINLINE
89 static __inline void
90 __cpu_simple_lock(__cpu_simple_lock_t *alp)
91 {
92
93 /*
94 * If someone else holds the lock use simple reads until it
95 * is released, then retry the atomic operation. This reduces
96 * memory bus contention because the cache-coherency logic
97 * does not have to broadcast invalidates on the lock while
98 * we spin on it.
99 */
100 while (__ldstub(alp) != __SIMPLELOCK_UNLOCKED) {
101 while (*alp != __SIMPLELOCK_UNLOCKED)
102 /* spin */ ;
103 }
104 }
105 #endif /* __CPU_SIMPLE_LOCK_NOINLINE */
106
107 static __inline int
108 __cpu_simple_lock_try(__cpu_simple_lock_t *alp)
109 {
110
111 return (__ldstub(alp) == __SIMPLELOCK_UNLOCKED);
112 }
113
114 static __inline void
115 __cpu_simple_unlock(__cpu_simple_lock_t *alp)
116 {
117
118 /*
119 * Insert compiler barrier to prevent instruction re-ordering
120 * around the lock release.
121 */
122 __insn_barrier();
123 *alp = __SIMPLELOCK_UNLOCKED;
124 }
125
126 #if defined(__sparc_v9__)
127 static __inline void
128 mb_read(void)
129 {
130 __asm __volatile("membar #LoadLoad" : : : "memory");
131 }
132
133 static __inline void
134 mb_write(void)
135 {
136 __asm __volatile("" : : : "memory");
137 }
138
139 static __inline void
140 mb_memory(void)
141 {
142 __asm __volatile("membar #MemIssue" : : : "memory");
143 }
144 #else /* __sparc_v9__ */
145 static __inline void
146 mb_read(void)
147 {
148 static volatile int junk;
149 __asm volatile("st %%g0,[%0]"
150 :
151 : "r" (&junk)
152 : "memory");
153 }
154
155 static __inline void
156 mb_write(void)
157 {
158 __insn_barrier();
159 }
160
161 static __inline void
162 mb_memory(void)
163 {
164 mb_read();
165 }
166 #endif /* __sparc_v9__ */
167
168 #endif /* _MACHINE_LOCK_H */
169