lock.h revision 1.29 1 /* $NetBSD: lock.h,v 1.29 2007/09/10 11:34:09 skrll Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2006 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Paul Kranenburg and Andrew Doran.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #ifndef _MACHINE_LOCK_H
40 #define _MACHINE_LOCK_H
41
42 /*
43 * Machine dependent spin lock operations.
44 */
45
46 #if __SIMPLELOCK_UNLOCKED != 0
47 #error __SIMPLELOCK_UNLOCKED must be 0 for this implementation
48 #endif
49
50 /* XXX So we can expose this to userland. */
51 #ifdef __lint__
52 #define __ldstub(__addr) (__addr)
53 #else /* !__lint__ */
54 static __inline int __ldstub(__cpu_simple_lock_t *addr);
55 static __inline int __ldstub(__cpu_simple_lock_t *addr)
56 {
57 int v;
58
59 __asm volatile("ldstub [%1],%0"
60 : "=&r" (v)
61 : "r" (addr)
62 : "memory");
63
64 return v;
65 }
66 #endif /* __lint__ */
67
68 static __inline void __cpu_simple_lock_init(__cpu_simple_lock_t *)
69 __attribute__((__unused__));
70 static __inline int __cpu_simple_lock_try(__cpu_simple_lock_t *)
71 __attribute__((__unused__));
72 static __inline void __cpu_simple_unlock(__cpu_simple_lock_t *)
73 __attribute__((__unused__));
74 #ifndef __CPU_SIMPLE_LOCK_NOINLINE
75 static __inline void __cpu_simple_lock(__cpu_simple_lock_t *)
76 __attribute__((__unused__));
77 #else
78 extern void __cpu_simple_lock(__cpu_simple_lock_t *);
79 #endif
80
81 static __inline int
82 __SIMPLELOCK_LOCKED_P(__cpu_simple_lock_t *__ptr)
83 {
84 return *__ptr == __SIMPLELOCK_LOCKED;
85 }
86
87 static __inline int
88 __SIMPLELOCK_UNLOCKED_P(__cpu_simple_lock_t *__ptr)
89 {
90 return *__ptr == __SIMPLELOCK_UNLOCKED;
91 }
92
93 static __inline void
94 __cpu_simple_lock_clear(__cpu_simple_lock_t *__ptr)
95 {
96 *__ptr = __SIMPLELOCK_UNLOCKED;
97 }
98
99 static __inline void
100 __cpu_simple_lock_set(__cpu_simple_lock_t *__ptr)
101 {
102 *__ptr = __SIMPLELOCK_LOCKED;
103 }
104
105 static __inline void
106 __cpu_simple_lock_init(__cpu_simple_lock_t *alp)
107 {
108
109 *alp = __SIMPLELOCK_UNLOCKED;
110 }
111
112 #ifndef __CPU_SIMPLE_LOCK_NOINLINE
113 static __inline void
114 __cpu_simple_lock(__cpu_simple_lock_t *alp)
115 {
116
117 /*
118 * If someone else holds the lock use simple reads until it
119 * is released, then retry the atomic operation. This reduces
120 * memory bus contention because the cache-coherency logic
121 * does not have to broadcast invalidates on the lock while
122 * we spin on it.
123 */
124 while (__ldstub(alp) != __SIMPLELOCK_UNLOCKED) {
125 while (*alp != __SIMPLELOCK_UNLOCKED)
126 /* spin */ ;
127 }
128 }
129 #endif /* __CPU_SIMPLE_LOCK_NOINLINE */
130
131 static __inline int
132 __cpu_simple_lock_try(__cpu_simple_lock_t *alp)
133 {
134
135 return (__ldstub(alp) == __SIMPLELOCK_UNLOCKED);
136 }
137
138 static __inline void
139 __cpu_simple_unlock(__cpu_simple_lock_t *alp)
140 {
141
142 /*
143 * Insert compiler barrier to prevent instruction re-ordering
144 * around the lock release.
145 */
146 __insn_barrier();
147 *alp = __SIMPLELOCK_UNLOCKED;
148 }
149
150 #if defined(__sparc_v9__)
151 static __inline void
152 mb_read(void)
153 {
154 __asm __volatile("membar #LoadLoad" : : : "memory");
155 }
156
157 static __inline void
158 mb_write(void)
159 {
160 __asm __volatile("" : : : "memory");
161 }
162
163 static __inline void
164 mb_memory(void)
165 {
166 __asm __volatile("membar #MemIssue" : : : "memory");
167 }
168 #else /* __sparc_v9__ */
169 static __inline void
170 mb_read(void)
171 {
172 static volatile int junk;
173 __asm volatile("st %%g0,[%0]"
174 :
175 : "r" (&junk)
176 : "memory");
177 }
178
179 static __inline void
180 mb_write(void)
181 {
182 __insn_barrier();
183 }
184
185 static __inline void
186 mb_memory(void)
187 {
188 mb_read();
189 }
190 #endif /* __sparc_v9__ */
191
192 #endif /* _MACHINE_LOCK_H */
193