psl.h revision 1.1
1 /* 2 * Copyright (c) 1992, 1993 3 * The Regents of the University of California. All rights reserved. 4 * 5 * This software was developed by the Computer Systems Engineering group 6 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 7 * contributed to Berkeley. 8 * 9 * All advertising materials mentioning features or use of this software 10 * must display the following acknowledgement: 11 * This product includes software developed by the University of 12 * California, Lawrence Berkeley Laboratory. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the University of 25 * California, Berkeley and its contributors. 26 * 4. Neither the name of the University nor the names of its contributors 27 * may be used to endorse or promote products derived from this software 28 * without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 40 * SUCH DAMAGE. 41 * 42 * @(#)psl.h 8.1 (Berkeley) 6/11/93 43 * 44 * from: Header: psl.h,v 1.12 92/11/26 02:04:42 torek Exp 45 * $Id: psl.h,v 1.1 1993/10/02 10:23:21 deraadt Exp $ 46 */ 47 48 #ifndef PSR_IMPL 49 50 /* 51 * SPARC Process Status Register (in psl.h for hysterical raisins). 52 * 53 * The picture in the Sun manuals looks like this: 54 * 1 1 55 * 31 28 27 24 23 20 19 14 3 2 11 8 7 6 5 4 0 56 * +-------+-------+-------+-----------+-+-+-------+-+-+-+---------+ 57 * | impl | ver | icc | reserved |E|E| pil |S|P|E| CWP | 58 * | | |n z v c| |C|F| | |S|T| | 59 * +-------+-------+-------+-----------+-+-+-------+-+-+-+---------+ 60 */ 61 62 #define PSR_IMPL 0xf0000000 /* implementation */ 63 #define PSR_VER 0x0f000000 /* version */ 64 #define PSR_ICC 0x00f00000 /* integer condition codes */ 65 #define PSR_N 0x00800000 /* negative */ 66 #define PSR_Z 0x00400000 /* zero */ 67 #define PSR_O 0x00200000 /* overflow */ 68 #define PSR_C 0x00100000 /* carry */ 69 #define PSR_EC 0x00002000 /* coprocessor enable */ 70 #define PSR_EF 0x00001000 /* FP enable */ 71 #define PSR_PIL 0x00000f00 /* interrupt level */ 72 #define PSR_S 0x00000080 /* supervisor (kernel) mode */ 73 #define PSR_PS 0x00000040 /* previous supervisor mode (traps) */ 74 #define PSR_ET 0x00000020 /* trap enable */ 75 #define PSR_CWP 0x0000001f /* current window pointer */ 76 77 #define PSR_BITS "\20\16EC\15EF\10S\7PS\6ET" 78 79 #define PIL_CLOCK 10 80 81 #ifndef LOCORE 82 /* 83 * GCC pseudo-functions for manipulating PSR (primarily PIL field). 84 */ 85 static __inline int getpsr() { 86 int psr; 87 88 __asm __volatile("rd %%psr,%0" : "=r" (psr)); 89 return (psr); 90 } 91 92 static __inline void setpsr(int newpsr) { 93 __asm __volatile("wr %0,0,%%psr" : : "r" (newpsr)); 94 __asm __volatile("nop"); 95 __asm __volatile("nop"); 96 __asm __volatile("nop"); 97 } 98 99 static __inline int spl0() { 100 int psr, oldipl; 101 102 /* 103 * wrpsr xors two values: we choose old psr and old ipl here, 104 * which gives us the same value as the old psr but with all 105 * the old PIL bits turned off. 106 */ 107 __asm __volatile("rd %%psr,%0" : "=r" (psr)); 108 oldipl = psr & PSR_PIL; 109 __asm __volatile("wr %0,%1,%%psr" : : "r" (psr), "r" (oldipl)); 110 111 /* 112 * Three instructions must execute before we can depend 113 * on the bits to be changed. 114 */ 115 __asm __volatile("nop; nop; nop"); 116 return (oldipl); 117 } 118 119 /* 120 * PIL 1 through 14 can use this macro. 121 * (spl0 and splhigh are special since they put all 0s or all 1s 122 * into the ipl field.) 123 */ 124 #define SPL(name, newipl) \ 125 static __inline int name() { \ 126 int psr, oldipl; \ 127 __asm __volatile("rd %%psr,%0" : "=r" (psr)); \ 128 oldipl = psr & PSR_PIL; \ 129 psr &= ~oldipl; \ 130 __asm __volatile("wr %0,%1,%%psr" : : \ 131 "r" (psr), "n" ((newipl) << 8)); \ 132 __asm __volatile("nop; nop; nop"); \ 133 return (oldipl); \ 134 } 135 136 SPL(splsoftint, 1) 137 #define splnet splsoftint 138 #define splsoftclock splsoftint 139 140 /* Memory allocation (must be as high as highest network device) */ 141 SPL(splimp, 5) 142 143 /* tty input runs at software level 6 */ 144 #define PIL_TTY 6 145 SPL(spltty, PIL_TTY) 146 147 /* audio software interrupts are at software level 4 */ 148 #define PIL_AUSOFT 4 149 SPL(splausoft, PIL_AUSOFT) 150 151 SPL(splbio, 9) 152 153 SPL(splclock, PIL_CLOCK) 154 155 /* zs hardware interrupts are at level 12 */ 156 SPL(splzs, 12) 157 158 /* audio hardware interrupts are at level 13 */ 159 SPL(splaudio, 13) 160 161 /* second sparc timer interrupts at level 14 */ 162 SPL(splstatclock, 14) 163 164 static __inline int splhigh() { 165 int psr, oldipl; 166 167 __asm __volatile("rd %%psr,%0" : "=r" (psr)); 168 __asm __volatile("wr %0,0,%%psr" : : "r" (psr | PSR_PIL)); 169 __asm __volatile("and %1,%2,%0; nop; nop" : "=r" (oldipl) : \ 170 "r" (psr), "n" (PSR_PIL)); 171 return (oldipl); 172 } 173 174 /* splx does not have a return value */ 175 static __inline void splx(int newipl) { 176 int psr; 177 178 __asm __volatile("rd %%psr,%0" : "=r" (psr)); 179 __asm __volatile("wr %0,%1,%%psr" : : \ 180 "r" (psr & ~PSR_PIL), "rn" (newipl)); 181 __asm __volatile("nop; nop; nop"); 182 } 183 #endif /* LOCORE */ 184 185 #endif /* PSR_IMPL */ 186
Indexes created Sat Sep 20 22:09:52 GMT 2025