psl.h revision 1.14 1 /* $NetBSD: psl.h,v 1.14 1998/02/06 00:02:30 mrg Exp $ */
2
3 /*
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This software was developed by the Computer Systems Engineering group
8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 * contributed to Berkeley.
10 *
11 * All advertising materials mentioning features or use of this software
12 * must display the following acknowledgement:
13 * This product includes software developed by the University of
14 * California, Lawrence Berkeley Laboratory.
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
19 * 1. Redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution.
24 * 3. All advertising materials mentioning features or use of this software
25 * must display the following acknowledgement:
26 * This product includes software developed by the University of
27 * California, Berkeley and its contributors.
28 * 4. Neither the name of the University nor the names of its contributors
29 * may be used to endorse or promote products derived from this software
30 * without specific prior written permission.
31 *
32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42 * SUCH DAMAGE.
43 *
44 * @(#)psl.h 8.1 (Berkeley) 6/11/93
45 */
46
47 #ifndef PSR_IMPL
48
49 /*
50 * SPARC Process Status Register (in psl.h for hysterical raisins).
51 *
52 * The picture in the Sun manuals looks like this:
53 * 1 1
54 * 31 28 27 24 23 20 19 14 3 2 11 8 7 6 5 4 0
55 * +-------+-------+-------+-----------+-+-+-------+-+-+-+---------+
56 * | impl | ver | icc | reserved |E|E| pil |S|P|E| CWP |
57 * | | |n z v c| |C|F| | |S|T| |
58 * +-------+-------+-------+-----------+-+-+-------+-+-+-+---------+
59 */
60
61 #define PSR_IMPL 0xf0000000 /* implementation */
62 #define PSR_VER 0x0f000000 /* version */
63 #define PSR_ICC 0x00f00000 /* integer condition codes */
64 #define PSR_N 0x00800000 /* negative */
65 #define PSR_Z 0x00400000 /* zero */
66 #define PSR_O 0x00200000 /* overflow */
67 #define PSR_C 0x00100000 /* carry */
68 #define PSR_EC 0x00002000 /* coprocessor enable */
69 #define PSR_EF 0x00001000 /* FP enable */
70 #define PSR_PIL 0x00000f00 /* interrupt level */
71 #define PSR_S 0x00000080 /* supervisor (kernel) mode */
72 #define PSR_PS 0x00000040 /* previous supervisor mode (traps) */
73 #define PSR_ET 0x00000020 /* trap enable */
74 #define PSR_CWP 0x0000001f /* current window pointer */
75
76 #define PSR_BITS "\20\16EC\15EF\10S\7PS\6ET"
77
78 #if defined(_KERNEL) && !defined(_LOCORE)
79
80 static __inline int getpsr __P((void));
81 static __inline void setpsr __P((int));
82 static __inline int spl0 __P((void));
83 static __inline int splhigh __P((void));
84 static __inline void splx __P((int));
85 static __inline int getmid __P((void));
86
87 /*
88 * GCC pseudo-functions for manipulating PSR (primarily PIL field).
89 */
90 static __inline int getpsr()
91 {
92 int psr;
93
94 __asm __volatile("rd %%psr,%0" : "=r" (psr));
95 return (psr);
96 }
97
98 static __inline int getmid()
99 {
100 int mid;
101
102 __asm __volatile("rd %%tbr,%0" : "=r" (mid));
103 return ((mid >> 20) & 0x3);
104 }
105
106 static __inline void setpsr(newpsr)
107 int newpsr;
108 {
109 __asm __volatile("wr %0,0,%%psr" : : "r" (newpsr));
110 __asm __volatile("nop");
111 __asm __volatile("nop");
112 __asm __volatile("nop");
113 }
114
115 static __inline int spl0()
116 {
117 int psr, oldipl;
118
119 /*
120 * wrpsr xors two values: we choose old psr and old ipl here,
121 * which gives us the same value as the old psr but with all
122 * the old PIL bits turned off.
123 */
124 __asm __volatile("rd %%psr,%0" : "=r" (psr));
125 oldipl = psr & PSR_PIL;
126 __asm __volatile("wr %0,%1,%%psr" : : "r" (psr), "r" (oldipl));
127
128 /*
129 * Three instructions must execute before we can depend
130 * on the bits to be changed.
131 */
132 __asm __volatile("nop; nop; nop");
133 return (oldipl);
134 }
135
136 /*
137 * PIL 1 through 14 can use this macro.
138 * (spl0 and splhigh are special since they put all 0s or all 1s
139 * into the ipl field.)
140 */
141 #define SPL(name, newipl) \
142 static __inline int name __P((void)); \
143 static __inline int name() \
144 { \
145 int psr, oldipl; \
146 __asm __volatile("rd %%psr,%0" : "=r" (psr)); \
147 oldipl = psr & PSR_PIL; \
148 psr &= ~oldipl; \
149 __asm __volatile("wr %0,%1,%%psr" : : \
150 "r" (psr), "n" ((newipl) << 8)); \
151 __asm __volatile("nop; nop; nop"); \
152 return (oldipl); \
153 }
154 /* A non-priority-decreasing version of SPL */
155 #define _SPLRAISE(name, newipl) \
156 static __inline int name __P((void)); \
157 static __inline int name() \
158 { \
159 int psr, oldipl; \
160 __asm __volatile("rd %%psr,%0" : "=r" (psr)); \
161 oldipl = psr & PSR_PIL; \
162 if ((newipl << 8) <= oldipl) \
163 return oldipl; \
164 psr &= ~oldipl; \
165 __asm __volatile("wr %0,%1,%%psr" : : \
166 "r" (psr), "n" ((newipl) << 8)); \
167 __asm __volatile("nop; nop; nop"); \
168 return (oldipl); \
169 }
170
171 SPL(splsoftint, 1)
172 #define splsoftclock splsoftint
173 #define splsoftnet splsoftint
174
175 /* audio software interrupts are at software level 4 */
176 #define PIL_AUSOFT 4
177 SPL(splausoft, PIL_AUSOFT)
178
179 /* floppy software interrupts are at software level 4 too */
180 #define PIL_FDSOFT 4
181 SPL(splfdsoft, PIL_FDSOFT)
182
183 /* Block devices */
184 SPL(splbio, 5)
185
186 /* network hardware interrupts are at level 6 */
187 #define PIL_NET 6
188 SPL(splnet, PIL_NET)
189
190 /* tty input runs at software level 6 */
191 #define PIL_TTY 6
192 SPL(spltty, PIL_TTY)
193
194 /*
195 * Memory allocation (must be as high as highest network, tty, or disk device)
196 */
197 SPL(splimp, 7)
198 SPL(splpmap, 7)
199
200 /* clock interrupts at level 10 */
201 #define PIL_CLOCK 10
202 SPL(splclock, PIL_CLOCK)
203
204 /* fd hardware interrupts are at level 11 */
205 SPL(splfd, 11)
206
207 /* zs hardware interrupts are at level 12 */
208 SPL(splzs, 12)
209
210 /* audio hardware interrupts are at level 13 */
211 SPL(splaudio, 13)
212
213 /* second sparc timer interrupts at level 14 */
214 SPL(splstatclock, 14)
215
216 static __inline int splhigh()
217 {
218 int psr, oldipl;
219
220 __asm __volatile("rd %%psr,%0" : "=r" (psr));
221 __asm __volatile("wr %0,0,%%psr" : : "r" (psr | PSR_PIL));
222 __asm __volatile("and %1,%2,%0; nop; nop" : "=r" (oldipl) : \
223 "r" (psr), "n" (PSR_PIL));
224 return (oldipl);
225 }
226
227 /* splx does not have a return value */
228 static __inline void splx(newipl)
229 int newipl;
230 {
231 int psr;
232
233 __asm __volatile("rd %%psr,%0" : "=r" (psr));
234 __asm __volatile("wr %0,%1,%%psr" : : \
235 "r" (psr & ~PSR_PIL), "rn" (newipl));
236 __asm __volatile("nop; nop; nop");
237 }
238 #endif /* KERNEL && !_LOCORE */
239
240 #endif /* PSR_IMPL */
241