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psl.h revision 1.19
      1 /*	$NetBSD: psl.h,v 1.19 1999/12/15 08:01:01 garbled Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1992, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This software was developed by the Computer Systems Engineering group
      8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
      9  * contributed to Berkeley.
     10  *
     11  * All advertising materials mentioning features or use of this software
     12  * must display the following acknowledgement:
     13  *	This product includes software developed by the University of
     14  *	California, Lawrence Berkeley Laboratory.
     15  *
     16  * Redistribution and use in source and binary forms, with or without
     17  * modification, are permitted provided that the following conditions
     18  * are met:
     19  * 1. Redistributions of source code must retain the above copyright
     20  *    notice, this list of conditions and the following disclaimer.
     21  * 2. Redistributions in binary form must reproduce the above copyright
     22  *    notice, this list of conditions and the following disclaimer in the
     23  *    documentation and/or other materials provided with the distribution.
     24  * 3. All advertising materials mentioning features or use of this software
     25  *    must display the following acknowledgement:
     26  *	This product includes software developed by the University of
     27  *	California, Berkeley and its contributors.
     28  * 4. Neither the name of the University nor the names of its contributors
     29  *    may be used to endorse or promote products derived from this software
     30  *    without specific prior written permission.
     31  *
     32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     42  * SUCH DAMAGE.
     43  *
     44  *	@(#)psl.h	8.1 (Berkeley) 6/11/93
     45  */
     46 
     47 #ifndef PSR_IMPL
     48 
     49 /*
     50  * SPARC Process Status Register (in psl.h for hysterical raisins).
     51  *
     52  * The picture in the Sun manuals looks like this:
     53  *	                                     1 1
     54  *	 31   28 27   24 23   20 19       14 3 2 11    8 7 6 5 4       0
     55  *	+-------+-------+-------+-----------+-+-+-------+-+-+-+---------+
     56  *	|  impl |  ver  |  icc  |  reserved |E|E|  pil  |S|P|E|   CWP   |
     57  *	|       |       |n z v c|           |C|F|       | |S|T|         |
     58  *	+-------+-------+-------+-----------+-+-+-------+-+-+-+---------+
     59  */
     60 
     61 #define	PSR_IMPL	0xf0000000	/* implementation */
     62 #define	PSR_VER		0x0f000000	/* version */
     63 #define	PSR_ICC		0x00f00000	/* integer condition codes */
     64 #define	PSR_N		0x00800000	/* negative */
     65 #define	PSR_Z		0x00400000	/* zero */
     66 #define	PSR_O		0x00200000	/* overflow */
     67 #define	PSR_C		0x00100000	/* carry */
     68 #define	PSR_EC		0x00002000	/* coprocessor enable */
     69 #define	PSR_EF		0x00001000	/* FP enable */
     70 #define	PSR_PIL		0x00000f00	/* interrupt level */
     71 #define	PSR_S		0x00000080	/* supervisor (kernel) mode */
     72 #define	PSR_PS		0x00000040	/* previous supervisor mode (traps) */
     73 #define	PSR_ET		0x00000020	/* trap enable */
     74 #define	PSR_CWP		0x0000001f	/* current window pointer */
     75 
     76 #define	PSR_BITS "\20\16EC\15EF\10S\7PS\6ET"
     77 
     78 #define	PIL_CLOCK	10
     79 
     80 #if defined(_KERNEL) && !defined(_LOCORE)
     81 
     82 static __inline int getpsr __P((void));
     83 static __inline void setpsr __P((int));
     84 static __inline int spl0 __P((void));
     85 static __inline int splhigh __P((void));
     86 static __inline void splx __P((int));
     87 static __inline int getmid __P((void));
     88 
     89 /*
     90  * GCC pseudo-functions for manipulating PSR (primarily PIL field).
     91  */
     92 static __inline int getpsr()
     93 {
     94 	int psr;
     95 
     96 	__asm __volatile("rd %%psr,%0" : "=r" (psr));
     97 	return (psr);
     98 }
     99 
    100 static __inline int getmid()
    101 {
    102 	int mid;
    103 
    104 	__asm __volatile("rd %%tbr,%0" : "=r" (mid));
    105 	return ((mid >> 20) & 0x3);
    106 }
    107 
    108 static __inline void setpsr(newpsr)
    109 	int newpsr;
    110 {
    111 	__asm __volatile("wr %0,0,%%psr" : : "r" (newpsr));
    112 	__asm __volatile("nop");
    113 	__asm __volatile("nop");
    114 	__asm __volatile("nop");
    115 }
    116 
    117 static __inline int spl0()
    118 {
    119 	int psr, oldipl;
    120 
    121 	/*
    122 	 * wrpsr xors two values: we choose old psr and old ipl here,
    123 	 * which gives us the same value as the old psr but with all
    124 	 * the old PIL bits turned off.
    125 	 */
    126 	__asm __volatile("rd %%psr,%0" : "=r" (psr));
    127 	oldipl = psr & PSR_PIL;
    128 	__asm __volatile("wr %0,%1,%%psr" : : "r" (psr), "r" (oldipl));
    129 
    130 	/*
    131 	 * Three instructions must execute before we can depend
    132 	 * on the bits to be changed.
    133 	 */
    134 	__asm __volatile("nop; nop; nop");
    135 	return (oldipl);
    136 }
    137 
    138 /*
    139  * PIL 1 through 14 can use this macro.
    140  * (spl0 and splhigh are special since they put all 0s or all 1s
    141  * into the ipl field.)
    142  */
    143 #define	SPL(name, newipl) \
    144 static __inline int name __P((void)); \
    145 static __inline int name() \
    146 { \
    147 	int psr, oldipl; \
    148 	__asm __volatile("rd %%psr,%0" : "=r" (psr)); \
    149 	oldipl = psr & PSR_PIL; \
    150 	psr &= ~oldipl; \
    151 	__asm __volatile("wr %0,%1,%%psr" : : \
    152 	    "r" (psr), "n" ((newipl) << 8)); \
    153 	__asm __volatile("nop; nop; nop"); \
    154 	return (oldipl); \
    155 }
    156 /* A non-priority-decreasing version of SPL */
    157 #define	_SPLRAISE(name, newipl) \
    158 static __inline int name __P((void)); \
    159 static __inline int name() \
    160 { \
    161 	int psr, oldipl; \
    162 	__asm __volatile("rd %%psr,%0" : "=r" (psr)); \
    163 	oldipl = psr & PSR_PIL; \
    164 	if ((newipl << 8) <= oldipl) \
    165 		return oldipl; \
    166 	psr &= ~oldipl; \
    167 	__asm __volatile("wr %0,%1,%%psr" : : \
    168 	    "r" (psr), "n" ((newipl) << 8)); \
    169 	__asm __volatile("nop; nop; nop"); \
    170 	return (oldipl); \
    171 }
    172 
    173 SPL(spllowersoftclock, 1)
    174 
    175 _SPLRAISE(splsoftint, 1)
    176 #define	splsoftclock	splsoftint
    177 #define	splsoftnet	splsoftint
    178 
    179 /* audio software interrupts are at software level 4 */
    180 #define	PIL_AUSOFT	4
    181 _SPLRAISE(splausoft, PIL_AUSOFT)
    182 
    183 /* floppy software interrupts are at software level 4 too */
    184 #define PIL_FDSOFT	4
    185 _SPLRAISE(splfdsoft, PIL_FDSOFT)
    186 
    187 /* Block devices */
    188 _SPLRAISE(splbio, 5)
    189 
    190 /* network hardware interrupts are at level 6 */
    191 #define	PIL_NET	6
    192 _SPLRAISE(splnet, PIL_NET)
    193 
    194 /* tty input runs at software level 6 */
    195 #define	PIL_TTY	6
    196 _SPLRAISE(spltty, PIL_TTY)
    197 
    198 /*
    199  * Memory allocation (must be as high as highest network, tty, or disk device)
    200  */
    201 _SPLRAISE(splimp, 7)
    202 _SPLRAISE(splpmap, 7)
    203 
    204 /* clock interrupts at level 10 */
    205 _SPLRAISE(splclock, PIL_CLOCK)
    206 
    207 /* fd hardware, ts102, and tadpole microcontoller interrupts are at level 11 */
    208 _SPLRAISE(splfd, 11)
    209 _SPLRAISE(splts102, 11)
    210 
    211 /* zs hardware interrupts are at level 12 */
    212 _SPLRAISE(splzs, 12)
    213 _SPLRAISE(splserial, 12) /* XXX - other serial hardware might not be at lvl 12 */
    214 
    215 /* audio hardware interrupts are at level 13 */
    216 _SPLRAISE(splaudio, 13)
    217 
    218 /* second sparc timer interrupts at level 14 */
    219 _SPLRAISE(splstatclock, 14)
    220 
    221 static __inline int splhigh()
    222 {
    223 	int psr, oldipl;
    224 
    225 	__asm __volatile("rd %%psr,%0" : "=r" (psr));
    226 	__asm __volatile("wr %0,0,%%psr" : : "r" (psr | PSR_PIL));
    227 	__asm __volatile("and %1,%2,%0; nop; nop" : "=r" (oldipl) : \
    228 	    "r" (psr), "n" (PSR_PIL));
    229 	return (oldipl);
    230 }
    231 
    232 /* splx does not have a return value */
    233 static __inline void splx(newipl)
    234 	int newipl;
    235 {
    236 	int psr;
    237 
    238 	__asm __volatile("rd %%psr,%0" : "=r" (psr));
    239 	__asm __volatile("wr %0,%1,%%psr" : : \
    240 	    "r" (psr & ~PSR_PIL), "rn" (newipl));
    241 	__asm __volatile("nop; nop; nop");
    242 }
    243 #endif /* KERNEL && !_LOCORE */
    244 
    245 #endif /* PSR_IMPL */
    246