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pte.h revision 1.8
      1 /*	$NetBSD: pte.h,v 1.8 1995/04/13 13:48:46 pk Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1992, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This software was developed by the Computer Systems Engineering group
      8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
      9  * contributed to Berkeley.
     10  *
     11  * All advertising materials mentioning features or use of this software
     12  * must display the following acknowledgement:
     13  *	This product includes software developed by the University of
     14  *	California, Lawrence Berkeley Laboratory.
     15  *
     16  * Redistribution and use in source and binary forms, with or without
     17  * modification, are permitted provided that the following conditions
     18  * are met:
     19  * 1. Redistributions of source code must retain the above copyright
     20  *    notice, this list of conditions and the following disclaimer.
     21  * 2. Redistributions in binary form must reproduce the above copyright
     22  *    notice, this list of conditions and the following disclaimer in the
     23  *    documentation and/or other materials provided with the distribution.
     24  * 3. All advertising materials mentioning features or use of this software
     25  *    must display the following acknowledgement:
     26  *	This product includes software developed by the University of
     27  *	California, Berkeley and its contributors.
     28  * 4. Neither the name of the University nor the names of its contributors
     29  *    may be used to endorse or promote products derived from this software
     30  *    without specific prior written permission.
     31  *
     32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     42  * SUCH DAMAGE.
     43  *
     44  *	@(#)pte.h	8.1 (Berkeley) 6/11/93
     45  */
     46 
     47 /*
     48  * Sun-4 (sort of) and 4c (SparcStation) Page Table Entries
     49  * (Sun call them `Page Map Entries').
     50  */
     51 
     52 #ifndef LOCORE
     53 /*
     54  * Segment maps contain `pmeg' (Page Map Entry Group) numbers.
     55  * A PMEG is simply an index that names a group of 32 (sun4) or
     56  * 64 (sun4c) PTEs.
     57  */
     58 typedef u_short pmeg_t;		/* 9 bits needed per Sun-4 segmap entry */
     59 /*
     60  * Region maps contain `smeg' (Segment Entry Group) numbers.
     61  * An SMEG is simply an index that names a group of 64 PMEGs
     62  */
     63 typedef u_char smeg_t;		/* 6 bits needed per Sun-4 regmap entry */
     64 #endif
     65 
     66 /*
     67  * Address translation works as follows:
     68  *
     69  * (for sun4c and 2-level sun4)
     70  *	1. test va<31:29> -- these must be 000 or 111 (or you get a fault)
     71  *	2. concatenate context_reg<2:0> and va<29:18> to get a 15 bit number;
     72  *	   use this to index the segment maps, yielding a 7 or 9 bit value.
     73  * (for 3-level sun4)
     74  *	1. concatenate context_reg<3:0> and va<31:24> to get a 8 bit number;
     75  *	   use this to index the region maps, yielding a 10 bit value.
     76  *	2. take the value from (1) above and concatenate va<17:12> to
     77  *	   get a `segment map entry' index.  This gives a 9 bit value.
     78  * (for sun4c)
     79  *	3. take the value from (2) above and concatenate va<17:12> to
     80  *	   get a `page map entry' index.  This gives a 32-bit PTE.
     81  * (for sun4)
     82  *	3. take the value from (2 or 3) above and concatenate va<17:13> to
     83  *	   get a `page map entry' index.  This gives a 32-bit PTE.
     84  *
     85  * In other words:
     86  *
     87  *	struct sun4_3_levelmmu_virtual_addr {
     88  *		u_int	va_reg:8,	(virtual region)
     89  *			va_seg:6,	(virtual segment)
     90  *			va_pg:5,	(virtual page within segment)
     91  *			va_off:13;	(offset within page)
     92  *	};
     93  *	struct sun4_virtual_addr {
     94  *		u_int	:2,		(required to be the same as bit 29)
     95  *			va_seg:12,	(virtual segment)
     96  *			va_pg:5,	(virtual page within segment)
     97  *			va_off:13;	(offset within page)
     98  *	};
     99  *	struct sun4c_virtual_addr {
    100  *		u_int	:2,		(required to be the same as bit 29)
    101  *			va_seg:12,	(virtual segment)
    102  *			va_pg:6,	(virtual page within segment)
    103  *			va_off:12;	(offset within page)
    104  *	};
    105  *
    106  * Then, given any `va':
    107  *
    108  *	extern smeg_t regmap[16][1<<8];		(3-level MMU only)
    109  *	extern pmeg_t segmap[8][1<<12];		([16][1<<12] for sun4)
    110  *	extern int ptetable[128][1<<6];		([512][1<<5] for sun4)
    111  *
    112  * (the above being in the hardware, accessed as Alternate Address Spaces)
    113  *
    114  *	if (mmu_3l)
    115  *		physreg = regmap[curr_ctx][va.va_reg];
    116  *		physseg = segmap[physreg][va.va_seg];
    117  *	else
    118  *		physseg = segmap[curr_ctx][va.va_seg];
    119  *	pte = ptetable[physseg][va.va_pg];
    120  *	if (!(pte & PG_V)) TRAP();
    121  *	if (writing && !pte.pg_w) TRAP();
    122  *	if (usermode && pte.pg_s) TRAP();
    123  *	if (pte & PG_NC) DO_NOT_USE_CACHE_FOR_THIS_ACCESS();
    124  *	pte |= PG_U;					(mark used/accessed)
    125  *	if (writing) pte |= PG_M;			(mark modified)
    126  *	ptetable[physseg][va.va_pg] = pte;
    127  *	physadr = ((pte & PG_PFNUM) << PGSHIFT) | va.va_off;
    128  */
    129 
    130 #if defined(MMU_3L) && !defined(SUN4)
    131 #error "configuration error"
    132 #endif
    133 
    134 #if defined(MMU_3L)
    135 extern int mmu_3l;
    136 #endif
    137 
    138 #define	NBPRG	(1 << 24)	/* bytes per segment */
    139 #define	RGSHIFT	24		/* log2(NBPSG) */
    140 #define	RGOFSET	(NBPRG - 1)	/* mask for segment offset */
    141 #define NSEGRG	(NBPRG / NBPSG)	/* segments per region */
    142 
    143 #define	NBPSG	(1 << 18)	/* bytes per segment */
    144 #define	SGSHIFT	18		/* log2(NBPSG) */
    145 #define	SGOFSET	(NBPSG - 1)	/* mask for segment offset */
    146 
    147 /* number of PTEs that map one segment (not number that fit in one segment!) */
    148 #if defined(SUN4) && defined(SUN4C)
    149 extern int nptesg;
    150 #define	NPTESG	nptesg		/* (which someone will have to initialize) */
    151 #else
    152 #define	NPTESG	(NBPSG / NBPG)
    153 #endif
    154 
    155 /* virtual address to virtual region number */
    156 #define	VA_VREG(va)	(((unsigned int)(va) >> RGSHIFT) & 255)
    157 
    158 /* virtual address to virtual segment number */
    159 #define	VA_VSEG(va)	(((unsigned int)(va) >> SGSHIFT) & 63)
    160 
    161 /* virtual address to virtual page number, for Sun-4 and Sun-4c */
    162 #define	VA_SUN4_VPG(va)		(((int)(va) >> 13) & 31)
    163 #define	VA_SUN4C_VPG(va)	(((int)(va) >> 12) & 63)
    164 
    165 /* truncate virtual address to region base */
    166 #define	VA_ROUNDDOWNTOREG(va)	((int)(va) & ~RGOFSET)
    167 
    168 /* truncate virtual address to segment base */
    169 #define	VA_ROUNDDOWNTOSEG(va)	((int)(va) & ~SGOFSET)
    170 
    171 /* virtual segment to virtual address (must sign extend on holy MMUs!) */
    172 #if defined(MMU_3L)
    173 #define	VRTOVA(vr)	(mmu_3l			\
    174 	? ((int)(vr) << RGSHIFT)		\
    175 	: (((int)(vr) << (RGSHIFT+2)) >> 2))
    176 #define	VSTOVA(vr,vs)	(mmu_3l				\
    177 	? (((int)vr << RGSHIFT) + ((int)vs << SGSHIFT))	\
    178 	: ((((int)vr << (RGSHIFT+2)) >> 2) + ((int)vs << SGSHIFT)))
    179 #else
    180 #define	VRTOVA(vr)	(((int)vr << (RGSHIFT+2)) >> 2)
    181 #define	VSTOVA(vr,vs)	((((int)vr << (RGSHIFT+2)) >> 2) + ((int)vs << SGSHIFT))
    182 #endif
    183 
    184 #if defined(SUN4) && defined(SUN4C)
    185 #define VA_VPG(va)	(cputyp==CPU_SUN4C ? VA_SUN4C_VPG(va) : VA_SUN4_VPG(va))
    186 #endif
    187 #if defined(SUN4C) && !defined(SUN4)
    188 #define VA_VPG(va)	VA_SUN4C_VPG(va)
    189 #endif
    190 #if !defined(SUN4C) && defined(SUN4)
    191 #define	VA_VPG(va)	VA_SUN4_VPG(va)
    192 #endif
    193 
    194 /* there is no `struct pte'; we just use `int' */
    195 #define	PG_V		0x80000000
    196 #define	PG_PROT		0x60000000	/* both protection bits */
    197 #define	PG_W		0x40000000	/* allowed to write */
    198 #define	PG_S		0x20000000	/* supervisor only */
    199 #define	PG_NC		0x10000000	/* non-cacheable */
    200 #define	PG_TYPE		0x0c000000	/* both type bits */
    201 
    202 #define	PG_OBMEM	0x00000000	/* on board memory */
    203 #define	PG_OBIO		0x04000000	/* on board I/O (incl. Sbus on 4c) */
    204 #ifdef SUN4
    205 #define	PG_VME16	0x08000000	/* 16-bit-data VME space */
    206 #define	PG_VME32	0x0c000000	/* 32-bit-data VME space */
    207 #endif
    208 
    209 #define	PG_U		0x02000000
    210 #define	PG_M		0x01000000
    211 #define	PG_MBZ		0x00f80000	/* unused; must be zero (oh really?) */
    212 #define	PG_PFNUM	0x0007ffff	/* n.b.: only 16 bits on sun4c */
    213 
    214 #define	PG_TNC_SHIFT	26		/* shift to get PG_TYPE + PG_NC */
    215 #define	PG_M_SHIFT	24		/* shift to get PG_M, PG_U */
    216 
    217 /*efine	PG_NOACC	0		** XXX */
    218 #define	PG_KR		0x20000000
    219 #define	PG_KW		0x60000000
    220 #define	PG_URKR		0
    221 #define	PG_UW		0x40000000
    222 
    223 #ifdef KGDB
    224 /* but we will define one for gdb anyway */
    225 struct pte {
    226 	u_int	pg_v:1,
    227 		pg_w:1,
    228 		pg_s:1,
    229 		pg_nc:1;
    230 	enum pgtype { pg_obmem, pg_obio, pg_vme16, pg_vme32 } pg_type:2;
    231 	u_int	pg_u:1,
    232 		pg_m:1,
    233 		pg_mbz:5,
    234 		pg_pfnum:19;
    235 };
    236 #endif
    237 
    238 /*
    239  * These are needed in the register window code
    240  * to check the validity of (ostensible) user stack PTEs.
    241  */
    242 #define	PG_VSHIFT	30		/* (va>>vshift)==0 or -1 => valid */
    243 	/* XXX fix this name, it is a va shift not a pte bit shift! */
    244 
    245 #define	PG_PROTSHIFT	29
    246 #define	PG_PROTUWRITE	6		/* PG_V,PG_W,!PG_S */
    247 #define	PG_PROTUREAD	4		/* PG_V,!PG_W,!PG_S */
    248 
    249 /* static __inline int PG_VALID(void *va) {
    250 	register int t = va; t >>= PG_VSHIFT; return (t == 0 || t == -1);
    251 } */
    252