iommu.c revision 1.25
1 /* $NetBSD: iommu.c,v 1.25 1998/09/01 18:05:27 pk Exp $ */ 2 3 /* 4 * Copyright (c) 1996 5 * The President and Fellows of Harvard College. All rights reserved. 6 * Copyright (c) 1995 Paul Kranenburg 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Aaron Brown and 19 * Harvard University. 20 * This product includes software developed by Paul Kranenburg. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 */ 38 39 #include <sys/param.h> 40 #include <sys/extent.h> 41 #include <sys/malloc.h> 42 #include <sys/queue.h> 43 #include <sys/systm.h> 44 #include <sys/device.h> 45 #include <vm/vm.h> 46 #include <vm/vm_kern.h> 47 48 #if defined(UVM) 49 #include <uvm/uvm.h> 50 #else 51 #define uvm_km_valloc(m,s) kmem_alloc_pageable(m,s) 52 #define uvm_unmap(m,a,s,x) kmem_free(m,a,s) 53 #endif 54 55 #define _SPARC_BUS_DMA_PRIVATE 56 #include <machine/bus.h> 57 #include <machine/autoconf.h> 58 #include <machine/ctlreg.h> 59 #include <sparc/sparc/asm.h> 60 #include <sparc/sparc/vaddrs.h> 61 #include <sparc/sparc/cpuvar.h> 62 #include <sparc/sparc/iommureg.h> 63 #include <sparc/sparc/iommuvar.h> 64 65 struct iommu_softc { 66 struct device sc_dev; /* base device */ 67 struct iommureg *sc_reg; 68 u_int sc_pagesize; 69 u_int sc_range; 70 bus_addr_t sc_dvmabase; 71 iopte_t *sc_ptes; 72 int sc_hasiocache; 73 }; 74 struct iommu_softc *iommu_sc;/*XXX*/ 75 int has_iocache; 76 u_long dvma_cachealign; 77 78 struct extent *iommu_dvmamap; 79 80 81 /* autoconfiguration driver */ 82 int iommu_print __P((void *, const char *)); 83 void iommu_attach __P((struct device *, struct device *, void *)); 84 int iommu_match __P((struct device *, struct cfdata *, void *)); 85 86 struct cfattach iommu_ca = { 87 sizeof(struct iommu_softc), iommu_match, iommu_attach 88 }; 89 90 /* IOMMU DMA map functions */ 91 int iommu_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *, 92 bus_size_t, struct proc *, int)); 93 int iommu_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t, 94 struct mbuf *, int)); 95 int iommu_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t, 96 struct uio *, int)); 97 int iommu_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t, 98 bus_dma_segment_t *, int, bus_size_t, int)); 99 void iommu_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t)); 100 void iommu_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 101 bus_size_t, int)); 102 103 int iommu_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size, 104 bus_size_t alignment, bus_size_t boundary, 105 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags)); 106 void iommu_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, 107 int nsegs)); 108 int iommu_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, 109 int nsegs, size_t size, caddr_t *kvap, int flags)); 110 int iommu_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, 111 int nsegs, int off, int prot, int flags)); 112 113 114 struct sparc_bus_dma_tag iommu_dma_tag = { 115 NULL, 116 _bus_dmamap_create, 117 _bus_dmamap_destroy, 118 iommu_dmamap_load, 119 iommu_dmamap_load_mbuf, 120 iommu_dmamap_load_uio, 121 iommu_dmamap_load_raw, 122 iommu_dmamap_unload, 123 iommu_dmamap_sync, 124 125 iommu_dmamem_alloc, 126 iommu_dmamem_free, 127 iommu_dmamem_map, 128 _bus_dmamem_unmap, 129 iommu_dmamem_mmap 130 }; 131 /* 132 * Print the location of some iommu-attached device (called just 133 * before attaching that device). If `iommu' is not NULL, the 134 * device was found but not configured; print the iommu as well. 135 * Return UNCONF (config_find ignores this if the device was configured). 136 */ 137 int 138 iommu_print(args, iommu) 139 void *args; 140 const char *iommu; 141 { 142 struct iommu_attach_args *ia = args; 143 144 if (iommu) 145 printf("%s at %s", ia->iom_name, iommu); 146 return (UNCONF); 147 } 148 149 int 150 iommu_match(parent, cf, aux) 151 struct device *parent; 152 struct cfdata *cf; 153 void *aux; 154 { 155 struct mainbus_attach_args *ma = aux; 156 157 if (CPU_ISSUN4OR4C) 158 return (0); 159 return (strcmp(cf->cf_driver->cd_name, ma->ma_name) == 0); 160 } 161 162 /* 163 * Attach the iommu. 164 */ 165 void 166 iommu_attach(parent, self, aux) 167 struct device *parent; 168 struct device *self; 169 void *aux; 170 { 171 #if defined(SUN4M) 172 struct iommu_softc *sc = (struct iommu_softc *)self; 173 struct mainbus_attach_args *ma = aux; 174 int node; 175 struct bootpath *bp; 176 bus_space_handle_t bh; 177 u_int pbase, pa; 178 int i, mmupcrsave, s; 179 iopte_t *tpte_p; 180 extern u_int *kernel_iopte_table; 181 extern u_int kernel_iopte_table_pa; 182 183 /*XXX-GCC!*/mmupcrsave=0; 184 iommu_sc = sc; 185 /* 186 * XXX there is only one iommu, for now -- do not know how to 187 * address children on others 188 */ 189 if (sc->sc_dev.dv_unit > 0) { 190 printf(" unsupported\n"); 191 return; 192 } 193 node = ma->ma_node; 194 195 #if 0 196 if (ra->ra_vaddr) 197 sc->sc_reg = (struct iommureg *)ca->ca_ra.ra_vaddr; 198 #else 199 /* 200 * Map registers into our space. The PROM may have done this 201 * already, but I feel better if we have our own copy. Plus, the 202 * prom doesn't map the entire register set 203 * 204 * XXX struct iommureg is bigger than ra->ra_len; what are the 205 * other fields for? 206 */ 207 if (bus_space_map2( 208 ma->ma_bustag, 209 ma->ma_iospace, 210 ma->ma_paddr, 211 sizeof(struct iommureg), 212 0, 213 0, 214 &bh) != 0) { 215 printf("iommu_attach: cannot map registers\n"); 216 return; 217 } 218 sc->sc_reg = (struct iommureg *)bh; 219 #endif 220 221 sc->sc_hasiocache = node_has_property(node, "cache-coherence?"); 222 if (CACHEINFO.c_enabled == 0) /* XXX - is this correct? */ 223 sc->sc_hasiocache = 0; 224 has_iocache = sc->sc_hasiocache; /* Set global flag */ 225 226 sc->sc_pagesize = getpropint(node, "page-size", NBPG), 227 sc->sc_range = (1 << 24) << 228 ((sc->sc_reg->io_cr & IOMMU_CTL_RANGE) >> IOMMU_CTL_RANGESHFT); 229 #if 0 230 sc->sc_dvmabase = (0 - sc->sc_range); 231 #endif 232 pbase = (sc->sc_reg->io_bar & IOMMU_BAR_IBA) << 233 (14 - IOMMU_BAR_IBASHFT); 234 235 /* 236 * Now we build our own copy of the IOMMU page tables. We need to 237 * do this since we're going to change the range to give us 64M of 238 * mappings, and thus we can move DVMA space down to 0xfd000000 to 239 * give us lots of space and to avoid bumping into the PROM, etc. 240 * 241 * XXX Note that this is rather messy. 242 */ 243 sc->sc_ptes = (iopte_t *) kernel_iopte_table; 244 245 /* 246 * Now discache the page tables so that the IOMMU sees our 247 * changes. 248 */ 249 kvm_uncache((caddr_t)sc->sc_ptes, 250 (((0 - IOMMU_DVMA_BASE)/sc->sc_pagesize) * sizeof(iopte_t)) / NBPG); 251 252 /* 253 * Ok. We've got to read in the original table using MMU bypass, 254 * and copy all of its entries to the appropriate place in our 255 * new table, even if the sizes are different. 256 * This is pretty easy since we know DVMA ends at 0xffffffff. 257 * 258 * XXX: PGOFSET, NBPG assume same page size as SRMMU 259 */ 260 if (cpuinfo.cpu_impl == 4 && cpuinfo.mxcc) { 261 /* set MMU AC bit */ 262 sta(SRMMU_PCR, ASI_SRMMU, 263 ((mmupcrsave = lda(SRMMU_PCR, ASI_SRMMU)) | VIKING_PCR_AC)); 264 } 265 266 for (tpte_p = &sc->sc_ptes[((0 - IOMMU_DVMA_BASE)/NBPG) - 1], 267 pa = (u_int)pbase - sizeof(iopte_t) + 268 ((u_int)sc->sc_range/NBPG)*sizeof(iopte_t); 269 tpte_p >= &sc->sc_ptes[0] && pa >= (u_int)pbase; 270 tpte_p--, pa -= sizeof(iopte_t)) { 271 272 IOMMU_FLUSHPAGE(sc, 273 (tpte_p - &sc->sc_ptes[0])*NBPG + IOMMU_DVMA_BASE); 274 *tpte_p = lda(pa, ASI_BYPASS); 275 } 276 if (cpuinfo.cpu_impl == 4 && cpuinfo.mxcc) { 277 /* restore mmu after bug-avoidance */ 278 sta(SRMMU_PCR, ASI_SRMMU, mmupcrsave); 279 } 280 281 /* 282 * Now we can install our new pagetable into the IOMMU 283 */ 284 sc->sc_range = 0 - IOMMU_DVMA_BASE; 285 sc->sc_dvmabase = IOMMU_DVMA_BASE; 286 287 /* calculate log2(sc->sc_range/16MB) */ 288 i = ffs(sc->sc_range/(1 << 24)) - 1; 289 if ((1 << i) != (sc->sc_range/(1 << 24))) 290 panic("bad iommu range: %d\n",i); 291 292 s = splhigh(); 293 IOMMU_FLUSHALL(sc); 294 295 sc->sc_reg->io_cr = (sc->sc_reg->io_cr & ~IOMMU_CTL_RANGE) | 296 (i << IOMMU_CTL_RANGESHFT) | IOMMU_CTL_ME; 297 sc->sc_reg->io_bar = (kernel_iopte_table_pa >> 4) & IOMMU_BAR_IBA; 298 299 IOMMU_FLUSHALL(sc); 300 splx(s); 301 302 printf(": version 0x%x/0x%x, page-size %d, range %dMB\n", 303 (sc->sc_reg->io_cr & IOMMU_CTL_VER) >> 24, 304 (sc->sc_reg->io_cr & IOMMU_CTL_IMPL) >> 28, 305 sc->sc_pagesize, 306 sc->sc_range >> 20); 307 308 /* Propagate bootpath */ 309 if (ma->ma_bp != NULL && strcmp(ma->ma_bp->name, "iommu") == 0) 310 bp = ma->ma_bp + 1; 311 else 312 bp = NULL; 313 314 iommu_dvmamap = extent_create("iommudvma", 315 IOMMU_DVMA_BASE, IOMMU_DVMA_END, 316 M_DEVBUF, 0, 0, EX_NOWAIT); 317 if (iommu_dvmamap == NULL) 318 panic("iommu: unable to allocate DVMA map"); 319 320 /* 321 * Loop through ROM children (expect Sbus among them). 322 */ 323 for (node = firstchild(node); node; node = nextsibling(node)) { 324 struct iommu_attach_args ia; 325 326 bzero(&ia, sizeof ia); 327 ia.iom_name = getpropstring(node, "name"); 328 329 /* Propagate BUS & DMA tags */ 330 ia.iom_bustag = ma->ma_bustag; 331 ia.iom_dmatag = &iommu_dma_tag; 332 ia.iom_node = node; 333 ia.iom_bp = bp; 334 (void) config_found(&sc->sc_dev, (void *)&ia, iommu_print); 335 } 336 #endif 337 } 338 339 void 340 iommu_enter(va, pa) 341 bus_addr_t va; 342 paddr_t pa; 343 { 344 struct iommu_softc *sc = iommu_sc; 345 int pte; 346 347 #ifdef DEBUG 348 if (va < sc->sc_dvmabase) 349 panic("iommu_enter: va 0x%lx not in DVMA space", (long)va); 350 #endif 351 352 pte = atop(pa) << IOPTE_PPNSHFT; 353 pte &= IOPTE_PPN; 354 pte |= IOPTE_V | IOPTE_W | (has_iocache ? IOPTE_C : 0); 355 sc->sc_ptes[atop(va - sc->sc_dvmabase)] = pte; 356 IOMMU_FLUSHPAGE(sc, va); 357 } 358 359 /* 360 * iommu_clear: clears mappings created by iommu_enter 361 */ 362 void 363 iommu_remove(va, len) 364 bus_addr_t va; 365 bus_size_t len; 366 { 367 struct iommu_softc *sc = iommu_sc; 368 u_int pagesz = sc->sc_pagesize; 369 bus_addr_t base = sc->sc_dvmabase; 370 371 #ifdef DEBUG 372 if (va < base) 373 panic("iommu_enter: va 0x%lx not in DVMA space", (long)va); 374 #endif 375 376 while ((long)len > 0) { 377 #ifdef notyet 378 #ifdef DEBUG 379 if ((sc->sc_ptes[atop(va - base)] & IOPTE_V) == 0) 380 panic("iommu_clear: clearing invalid pte at va 0x%lx", 381 (long)va); 382 #endif 383 #endif 384 sc->sc_ptes[atop(va - base)] = 0; 385 IOMMU_FLUSHPAGE(sc, va); 386 len -= pagesz; 387 va += pagesz; 388 } 389 } 390 391 #if 0 /* These registers aren't there??? */ 392 void 393 iommu_error() 394 { 395 struct iommu_softc *sc = X; 396 struct iommureg *iop = sc->sc_reg; 397 398 printf("iommu: afsr 0x%x, afar 0x%x\n", iop->io_afsr, iop->io_afar); 399 printf("iommu: mfsr 0x%x, mfar 0x%x\n", iop->io_mfsr, iop->io_mfar); 400 } 401 int 402 iommu_alloc(va, len) 403 u_int va, len; 404 { 405 struct iommu_softc *sc = X; 406 int off, tva, pa, iovaddr, pte; 407 408 off = (int)va & PGOFSET; 409 len = round_page(len + off); 410 va -= off; 411 412 if ((int)sc->sc_dvmacur + len > 0) 413 sc->sc_dvmacur = sc->sc_dvmabase; 414 415 iovaddr = tva = sc->sc_dvmacur; 416 sc->sc_dvmacur += len; 417 while (len) { 418 pa = pmap_extract(pmap_kernel(), va); 419 420 #define IOMMU_PPNSHIFT 8 421 #define IOMMU_V 0x00000002 422 #define IOMMU_W 0x00000004 423 424 pte = atop(pa) << IOMMU_PPNSHIFT; 425 pte |= IOMMU_V | IOMMU_W; 426 sta(sc->sc_ptes + atop(tva - sc->sc_dvmabase), ASI_BYPASS, pte); 427 sc->sc_reg->io_flushpage = tva; 428 len -= NBPG; 429 va += NBPG; 430 tva += NBPG; 431 } 432 return iovaddr + off; 433 } 434 #endif 435 436 437 /* 438 * IOMMU DMA map functions. 439 */ 440 int 441 iommu_dmamap_load(t, map, buf, buflen, p, flags) 442 bus_dma_tag_t t; 443 bus_dmamap_t map; 444 void *buf; 445 bus_size_t buflen; 446 struct proc *p; 447 int flags; 448 { 449 bus_size_t sgsize, oversize; 450 bus_addr_t sdva, dva; 451 bus_addr_t boundary; 452 vaddr_t va = (vaddr_t)buf; 453 u_long align, voff; 454 pmap_t pmap; 455 456 /* 457 * Remember page offset, then truncate the buffer address to 458 * a page boundary. 459 */ 460 voff = va & PGOFSET; 461 va &= ~PGOFSET; 462 463 /* 464 * Make sure that on error condition we return "no valid mappings". 465 */ 466 map->dm_nsegs = 0; 467 468 if (buflen > map->_dm_size) 469 return (EINVAL); 470 471 sgsize = (buflen + voff + PGOFSET) & ~PGOFSET; 472 align = dvma_cachealign ? dvma_cachealign : NBPG; 473 boundary = map->_dm_boundary; 474 475 /* 476 * Find a region of DVMA addresses that can accomodate 477 * our aligment requirements. 478 */ 479 oversize = sgsize + align - NBPG; 480 if (boundary != 0 && oversize > boundary) { 481 printf("iommu: alignment collision\n"); 482 return (EINVAL); 483 } 484 485 if (extent_alloc(iommu_dvmamap, oversize, NBPG, boundary, 486 EX_NOWAIT, (u_long *)&sdva) != 0) 487 return (ENOMEM); 488 489 /* 490 * Compute start of aligned region. 491 */ 492 dva = sdva; 493 dva += ((va & (align - 1)) + align - dva) & (align - 1); 494 495 /* 496 * Return excess addresses. 497 */ 498 if (dva != sdva) { 499 if (extent_free(iommu_dvmamap, sdva, dva-sdva, EX_NOWAIT) != 0) 500 printf("warning: %ld of DVMA space lost\n", dva - sdva); 501 } 502 if (dva + sgsize != sdva + oversize) { 503 if (extent_free(iommu_dvmamap, dva + sgsize, 504 sdva + oversize - dva - sgsize, EX_NOWAIT) != 0) 505 printf("warning: %ld of DVMA space lost\n", 506 sdva + oversize - dva - sgsize); 507 } 508 509 cpuinfo.cache_flush(buf, buflen); 510 511 /* 512 * We always use just one segment. 513 */ 514 map->dm_mapsize = buflen; 515 map->dm_nsegs = 1; 516 map->dm_segs[0].ds_addr = dva + voff; 517 map->dm_segs[0].ds_len = sgsize /*was:buflen*/; 518 519 if (p != NULL) 520 pmap = p->p_vmspace->vm_map.pmap; 521 else 522 pmap = pmap_kernel(); 523 524 for (; sgsize != 0; ) { 525 /* 526 * Get the physical address for this page. 527 */ 528 paddr_t pa = pmap_extract(pmap, va); 529 530 iommu_enter(dva, pa); 531 532 dva += NBPG; 533 va += NBPG; 534 sgsize -= NBPG; 535 } 536 537 return (0); 538 } 539 540 /* 541 * Like _bus_dmamap_load(), but for mbufs. 542 */ 543 int 544 iommu_dmamap_load_mbuf(t, map, m, flags) 545 bus_dma_tag_t t; 546 bus_dmamap_t map; 547 struct mbuf *m; 548 int flags; 549 { 550 551 panic("_bus_dmamap_load: not implemented"); 552 } 553 554 /* 555 * Like _bus_dmamap_load(), but for uios. 556 */ 557 int 558 iommu_dmamap_load_uio(t, map, uio, flags) 559 bus_dma_tag_t t; 560 bus_dmamap_t map; 561 struct uio *uio; 562 int flags; 563 { 564 565 panic("_bus_dmamap_load_uio: not implemented"); 566 } 567 568 /* 569 * Like _bus_dmamap_load(), but for raw memory allocated with 570 * bus_dmamem_alloc(). 571 */ 572 int 573 iommu_dmamap_load_raw(t, map, segs, nsegs, size, flags) 574 bus_dma_tag_t t; 575 bus_dmamap_t map; 576 bus_dma_segment_t *segs; 577 int nsegs; 578 bus_size_t size; 579 int flags; 580 { 581 582 panic("_bus_dmamap_load_raw: not implemented"); 583 } 584 585 /* 586 * Common function for unloading a DMA map. May be called by 587 * bus-specific DMA map unload functions. 588 */ 589 void 590 iommu_dmamap_unload(t, map) 591 bus_dma_tag_t t; 592 bus_dmamap_t map; 593 { 594 bus_addr_t addr; 595 bus_size_t len; 596 597 if (map->dm_nsegs != 1) 598 panic("_bus_dmamap_unload: nsegs = %d", map->dm_nsegs); 599 600 addr = map->dm_segs[0].ds_addr & ~PGOFSET; 601 len = map->dm_segs[0].ds_len; 602 603 iommu_remove(addr, len); 604 if (extent_free(iommu_dvmamap, addr, len, EX_NOWAIT) != 0) 605 printf("warning: %ld of DVMA space lost\n", (long)len); 606 607 /* Mark the mappings as invalid. */ 608 map->dm_mapsize = 0; 609 map->dm_nsegs = 0; 610 } 611 612 /* 613 * Common function for DMA map synchronization. May be called 614 * by bus-specific DMA map synchronization functions. 615 */ 616 void 617 iommu_dmamap_sync(t, map, offset, len, ops) 618 bus_dma_tag_t t; 619 bus_dmamap_t map; 620 bus_addr_t offset; 621 bus_size_t len; 622 int ops; 623 { 624 625 /* 626 * XXX Should flush CPU write buffers. 627 */ 628 } 629 630 /* 631 * Common function for DMA-safe memory allocation. May be called 632 * by bus-specific DMA memory allocation functions. 633 */ 634 int 635 iommu_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags) 636 bus_dma_tag_t t; 637 bus_size_t size, alignment, boundary; 638 bus_dma_segment_t *segs; 639 int nsegs; 640 int *rsegs; 641 int flags; 642 { 643 paddr_t pa; 644 bus_addr_t dva; 645 vm_page_t m; 646 int error; 647 struct pglist *mlist; 648 649 size = round_page(size); 650 error = _bus_dmamem_alloc_common(t, size, alignment, boundary, 651 segs, nsegs, rsegs, flags); 652 if (error != 0) 653 return (error); 654 655 if (extent_alloc(iommu_dvmamap, size, alignment, boundary, 656 (flags & BUS_DMA_NOWAIT) == 0 ? EX_WAITOK : EX_NOWAIT, 657 (u_long *)&dva) != 0) 658 return (ENOMEM); 659 660 /* 661 * Compute the location, size, and number of segments actually 662 * returned by the VM code. 663 */ 664 segs[0].ds_addr = dva; 665 segs[0].ds_len = size; 666 *rsegs = 1; 667 668 mlist = segs[0]._ds_mlist; 669 /* Map memory into DVMA space */ 670 for (m = TAILQ_FIRST(mlist); m != NULL; m = TAILQ_NEXT(m,pageq)) { 671 pa = VM_PAGE_TO_PHYS(m); 672 673 iommu_enter(dva, pa); 674 dva += PAGE_SIZE; 675 } 676 677 return (0); 678 } 679 680 /* 681 * Common function for freeing DMA-safe memory. May be called by 682 * bus-specific DMA memory free functions. 683 */ 684 void 685 iommu_dmamem_free(t, segs, nsegs) 686 bus_dma_tag_t t; 687 bus_dma_segment_t *segs; 688 int nsegs; 689 { 690 bus_addr_t addr; 691 bus_size_t len; 692 693 if (nsegs != 1) 694 panic("bus_dmamem_free: nsegs = %d", nsegs); 695 696 addr = segs[0].ds_addr; 697 len = segs[0].ds_len; 698 699 iommu_remove(addr, len); 700 if (extent_free(iommu_dvmamap, addr, len, EX_NOWAIT) != 0) 701 printf("warning: %ld of DVMA space lost\n", (long)len); 702 /* 703 * Return the list of pages back to the VM system. 704 */ 705 _bus_dmamem_free_common(t, segs, nsegs); 706 } 707 708 /* 709 * Common function for mapping DMA-safe memory. May be called by 710 * bus-specific DMA memory map functions. 711 */ 712 int 713 iommu_dmamem_map(t, segs, nsegs, size, kvap, flags) 714 bus_dma_tag_t t; 715 bus_dma_segment_t *segs; 716 int nsegs; 717 size_t size; 718 caddr_t *kvap; 719 int flags; 720 { 721 vm_page_t m; 722 vaddr_t va, sva; 723 bus_addr_t addr; 724 struct pglist *mlist; 725 int cbit; 726 size_t oversize; 727 u_long align; 728 729 if (nsegs != 1) 730 panic("iommu_dmamem_map: nsegs = %d", nsegs); 731 732 cbit = has_iocache ? 0 : PMAP_NC; 733 align = dvma_cachealign ? dvma_cachealign : PAGE_SIZE; 734 735 size = round_page(size); 736 737 /* 738 * Find a region of kernel virtual addresses that can accomodate 739 * our aligment requirements. 740 */ 741 oversize = size + align - PAGE_SIZE; 742 sva = uvm_km_valloc(kernel_map, oversize); 743 if (sva == 0) 744 return (ENOMEM); 745 746 /* Compute start of aligned region */ 747 va = sva; 748 va += ((segs[0].ds_addr & (align - 1)) + align - va) & (align - 1); 749 750 /* Return excess virtual addresses */ 751 if (va != sva) 752 (void)uvm_unmap(kernel_map, sva, va, 0); 753 if (va + size != sva + oversize) 754 (void)uvm_unmap(kernel_map, va + size, sva + oversize, 0); 755 756 757 *kvap = (caddr_t)va; 758 mlist = segs[0]._ds_mlist; 759 760 for (m = TAILQ_FIRST(mlist); m != NULL; m = TAILQ_NEXT(m,pageq)) { 761 762 if (size == 0) 763 panic("iommu_dmamem_map: size botch"); 764 765 addr = VM_PAGE_TO_PHYS(m); 766 pmap_enter(pmap_kernel(), va, addr | cbit, 767 VM_PROT_READ | VM_PROT_WRITE, TRUE); 768 #if 0 769 if (flags & BUS_DMA_COHERENT) 770 /* XXX */; 771 #endif 772 va += PAGE_SIZE; 773 size -= PAGE_SIZE; 774 } 775 776 return (0); 777 } 778 779 /* 780 * Common functin for mmap(2)'ing DMA-safe memory. May be called by 781 * bus-specific DMA mmap(2)'ing functions. 782 */ 783 int 784 iommu_dmamem_mmap(t, segs, nsegs, off, prot, flags) 785 bus_dma_tag_t t; 786 bus_dma_segment_t *segs; 787 int nsegs, off, prot, flags; 788 { 789 790 panic("_bus_dmamem_mmap: not implemented"); 791 } 792
Indexes created Tue Sep 30 20:09:53 GMT 2025