iommu.c revision 1.30
1 /* $NetBSD: iommu.c,v 1.30 1999/03/24 05:51:11 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1996 5 * The President and Fellows of Harvard College. All rights reserved. 6 * Copyright (c) 1995 Paul Kranenburg 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Aaron Brown and 19 * Harvard University. 20 * This product includes software developed by Paul Kranenburg. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 */ 38 39 #include <sys/param.h> 40 #include <sys/extent.h> 41 #include <sys/malloc.h> 42 #include <sys/queue.h> 43 #include <sys/systm.h> 44 #include <sys/device.h> 45 #include <vm/vm.h> 46 #include <vm/vm_kern.h> 47 48 #include <uvm/uvm_extern.h> 49 50 #define _SPARC_BUS_DMA_PRIVATE 51 #include <machine/bus.h> 52 #include <machine/autoconf.h> 53 #include <machine/ctlreg.h> 54 #include <sparc/sparc/asm.h> 55 #include <sparc/sparc/vaddrs.h> 56 #include <sparc/sparc/cpuvar.h> 57 #include <sparc/sparc/iommureg.h> 58 #include <sparc/sparc/iommuvar.h> 59 60 struct iommu_softc { 61 struct device sc_dev; /* base device */ 62 struct iommureg *sc_reg; 63 u_int sc_pagesize; 64 u_int sc_range; 65 bus_addr_t sc_dvmabase; 66 iopte_t *sc_ptes; 67 int sc_hasiocache; 68 }; 69 struct iommu_softc *iommu_sc;/*XXX*/ 70 int has_iocache; 71 u_long dvma_cachealign; 72 73 struct extent *iommu_dvmamap; 74 75 76 /* autoconfiguration driver */ 77 int iommu_print __P((void *, const char *)); 78 void iommu_attach __P((struct device *, struct device *, void *)); 79 int iommu_match __P((struct device *, struct cfdata *, void *)); 80 81 struct cfattach iommu_ca = { 82 sizeof(struct iommu_softc), iommu_match, iommu_attach 83 }; 84 85 /* IOMMU DMA map functions */ 86 int iommu_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *, 87 bus_size_t, struct proc *, int)); 88 int iommu_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t, 89 struct mbuf *, int)); 90 int iommu_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t, 91 struct uio *, int)); 92 int iommu_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t, 93 bus_dma_segment_t *, int, bus_size_t, int)); 94 void iommu_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t)); 95 void iommu_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 96 bus_size_t, int)); 97 98 int iommu_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size, 99 bus_size_t alignment, bus_size_t boundary, 100 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags)); 101 void iommu_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, 102 int nsegs)); 103 int iommu_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, 104 int nsegs, size_t size, caddr_t *kvap, int flags)); 105 int iommu_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, 106 int nsegs, int off, int prot, int flags)); 107 108 109 struct sparc_bus_dma_tag iommu_dma_tag = { 110 NULL, 111 _bus_dmamap_create, 112 _bus_dmamap_destroy, 113 iommu_dmamap_load, 114 iommu_dmamap_load_mbuf, 115 iommu_dmamap_load_uio, 116 iommu_dmamap_load_raw, 117 iommu_dmamap_unload, 118 iommu_dmamap_sync, 119 120 iommu_dmamem_alloc, 121 iommu_dmamem_free, 122 iommu_dmamem_map, 123 _bus_dmamem_unmap, 124 iommu_dmamem_mmap 125 }; 126 /* 127 * Print the location of some iommu-attached device (called just 128 * before attaching that device). If `iommu' is not NULL, the 129 * device was found but not configured; print the iommu as well. 130 * Return UNCONF (config_find ignores this if the device was configured). 131 */ 132 int 133 iommu_print(args, iommu) 134 void *args; 135 const char *iommu; 136 { 137 struct iommu_attach_args *ia = args; 138 139 if (iommu) 140 printf("%s at %s", ia->iom_name, iommu); 141 return (UNCONF); 142 } 143 144 int 145 iommu_match(parent, cf, aux) 146 struct device *parent; 147 struct cfdata *cf; 148 void *aux; 149 { 150 struct mainbus_attach_args *ma = aux; 151 152 if (CPU_ISSUN4OR4C) 153 return (0); 154 return (strcmp(cf->cf_driver->cd_name, ma->ma_name) == 0); 155 } 156 157 /* 158 * Attach the iommu. 159 */ 160 void 161 iommu_attach(parent, self, aux) 162 struct device *parent; 163 struct device *self; 164 void *aux; 165 { 166 #if defined(SUN4M) 167 struct iommu_softc *sc = (struct iommu_softc *)self; 168 struct mainbus_attach_args *ma = aux; 169 int node; 170 struct bootpath *bp; 171 bus_space_handle_t bh; 172 u_int pbase, pa; 173 int i, mmupcrsave, s; 174 iopte_t *tpte_p; 175 extern u_int *kernel_iopte_table; 176 extern u_int kernel_iopte_table_pa; 177 178 /*XXX-GCC!*/mmupcrsave=0; 179 iommu_sc = sc; 180 /* 181 * XXX there is only one iommu, for now -- do not know how to 182 * address children on others 183 */ 184 if (sc->sc_dev.dv_unit > 0) { 185 printf(" unsupported\n"); 186 return; 187 } 188 node = ma->ma_node; 189 190 #if 0 191 if (ra->ra_vaddr) 192 sc->sc_reg = (struct iommureg *)ca->ca_ra.ra_vaddr; 193 #else 194 /* 195 * Map registers into our space. The PROM may have done this 196 * already, but I feel better if we have our own copy. Plus, the 197 * prom doesn't map the entire register set 198 * 199 * XXX struct iommureg is bigger than ra->ra_len; what are the 200 * other fields for? 201 */ 202 if (bus_space_map2( 203 ma->ma_bustag, 204 ma->ma_iospace, 205 ma->ma_paddr, 206 sizeof(struct iommureg), 207 0, 208 0, 209 &bh) != 0) { 210 printf("iommu_attach: cannot map registers\n"); 211 return; 212 } 213 sc->sc_reg = (struct iommureg *)bh; 214 #endif 215 216 sc->sc_hasiocache = node_has_property(node, "cache-coherence?"); 217 if (CACHEINFO.c_enabled == 0) /* XXX - is this correct? */ 218 sc->sc_hasiocache = 0; 219 has_iocache = sc->sc_hasiocache; /* Set global flag */ 220 221 sc->sc_pagesize = getpropint(node, "page-size", NBPG), 222 sc->sc_range = (1 << 24) << 223 ((sc->sc_reg->io_cr & IOMMU_CTL_RANGE) >> IOMMU_CTL_RANGESHFT); 224 #if 0 225 sc->sc_dvmabase = (0 - sc->sc_range); 226 #endif 227 pbase = (sc->sc_reg->io_bar & IOMMU_BAR_IBA) << 228 (14 - IOMMU_BAR_IBASHFT); 229 230 /* 231 * Now we build our own copy of the IOMMU page tables. We need to 232 * do this since we're going to change the range to give us 64M of 233 * mappings, and thus we can move DVMA space down to 0xfd000000 to 234 * give us lots of space and to avoid bumping into the PROM, etc. 235 * 236 * XXX Note that this is rather messy. 237 */ 238 sc->sc_ptes = (iopte_t *) kernel_iopte_table; 239 240 /* 241 * Now discache the page tables so that the IOMMU sees our 242 * changes. 243 */ 244 kvm_uncache((caddr_t)sc->sc_ptes, 245 (((0 - IOMMU_DVMA_BASE)/sc->sc_pagesize) * sizeof(iopte_t)) / NBPG); 246 247 /* 248 * Ok. We've got to read in the original table using MMU bypass, 249 * and copy all of its entries to the appropriate place in our 250 * new table, even if the sizes are different. 251 * This is pretty easy since we know DVMA ends at 0xffffffff. 252 * 253 * XXX: PGOFSET, NBPG assume same page size as SRMMU 254 */ 255 if (cpuinfo.cpu_impl == 4 && cpuinfo.mxcc) { 256 /* set MMU AC bit */ 257 sta(SRMMU_PCR, ASI_SRMMU, 258 ((mmupcrsave = lda(SRMMU_PCR, ASI_SRMMU)) | VIKING_PCR_AC)); 259 } 260 261 for (tpte_p = &sc->sc_ptes[((0 - IOMMU_DVMA_BASE)/NBPG) - 1], 262 pa = (u_int)pbase - sizeof(iopte_t) + 263 ((u_int)sc->sc_range/NBPG)*sizeof(iopte_t); 264 tpte_p >= &sc->sc_ptes[0] && pa >= (u_int)pbase; 265 tpte_p--, pa -= sizeof(iopte_t)) { 266 267 IOMMU_FLUSHPAGE(sc, 268 (tpte_p - &sc->sc_ptes[0])*NBPG + IOMMU_DVMA_BASE); 269 *tpte_p = lda(pa, ASI_BYPASS); 270 } 271 if (cpuinfo.cpu_impl == 4 && cpuinfo.mxcc) { 272 /* restore mmu after bug-avoidance */ 273 sta(SRMMU_PCR, ASI_SRMMU, mmupcrsave); 274 } 275 276 /* 277 * Now we can install our new pagetable into the IOMMU 278 */ 279 sc->sc_range = 0 - IOMMU_DVMA_BASE; 280 sc->sc_dvmabase = IOMMU_DVMA_BASE; 281 282 /* calculate log2(sc->sc_range/16MB) */ 283 i = ffs(sc->sc_range/(1 << 24)) - 1; 284 if ((1 << i) != (sc->sc_range/(1 << 24))) 285 panic("bad iommu range: %d\n",i); 286 287 s = splhigh(); 288 IOMMU_FLUSHALL(sc); 289 290 sc->sc_reg->io_cr = (sc->sc_reg->io_cr & ~IOMMU_CTL_RANGE) | 291 (i << IOMMU_CTL_RANGESHFT) | IOMMU_CTL_ME; 292 sc->sc_reg->io_bar = (kernel_iopte_table_pa >> 4) & IOMMU_BAR_IBA; 293 294 IOMMU_FLUSHALL(sc); 295 splx(s); 296 297 printf(": version 0x%x/0x%x, page-size %d, range %dMB\n", 298 (sc->sc_reg->io_cr & IOMMU_CTL_VER) >> 24, 299 (sc->sc_reg->io_cr & IOMMU_CTL_IMPL) >> 28, 300 sc->sc_pagesize, 301 sc->sc_range >> 20); 302 303 /* Propagate bootpath */ 304 if (ma->ma_bp != NULL && strcmp(ma->ma_bp->name, "iommu") == 0) 305 bp = ma->ma_bp + 1; 306 else 307 bp = NULL; 308 309 iommu_dvmamap = extent_create("iommudvma", 310 IOMMU_DVMA_BASE, IOMMU_DVMA_END, 311 M_DEVBUF, 0, 0, EX_NOWAIT); 312 if (iommu_dvmamap == NULL) 313 panic("iommu: unable to allocate DVMA map"); 314 315 /* 316 * Loop through ROM children (expect Sbus among them). 317 */ 318 for (node = firstchild(node); node; node = nextsibling(node)) { 319 struct iommu_attach_args ia; 320 321 bzero(&ia, sizeof ia); 322 ia.iom_name = getpropstring(node, "name"); 323 324 /* Propagate BUS & DMA tags */ 325 ia.iom_bustag = ma->ma_bustag; 326 ia.iom_dmatag = &iommu_dma_tag; 327 328 ia.iom_node = node; 329 ia.iom_bp = bp; 330 331 ia.iom_reg = NULL; 332 getprop(node, "reg", sizeof(struct sbus_reg), 333 &ia.iom_nreg, (void **)&ia.iom_reg); 334 335 (void) config_found(&sc->sc_dev, (void *)&ia, iommu_print); 336 if (ia.iom_reg != NULL) 337 free(ia.iom_reg, M_DEVBUF); 338 } 339 #endif 340 } 341 342 void 343 iommu_enter(va, pa) 344 bus_addr_t va; 345 paddr_t pa; 346 { 347 struct iommu_softc *sc = iommu_sc; 348 int pte; 349 350 #ifdef DEBUG 351 if (va < sc->sc_dvmabase) 352 panic("iommu_enter: va 0x%lx not in DVMA space", (long)va); 353 #endif 354 355 pte = atop(pa) << IOPTE_PPNSHFT; 356 pte &= IOPTE_PPN; 357 pte |= IOPTE_V | IOPTE_W | (has_iocache ? IOPTE_C : 0); 358 sc->sc_ptes[atop(va - sc->sc_dvmabase)] = pte; 359 IOMMU_FLUSHPAGE(sc, va); 360 } 361 362 /* 363 * iommu_clear: clears mappings created by iommu_enter 364 */ 365 void 366 iommu_remove(va, len) 367 bus_addr_t va; 368 bus_size_t len; 369 { 370 struct iommu_softc *sc = iommu_sc; 371 u_int pagesz = sc->sc_pagesize; 372 bus_addr_t base = sc->sc_dvmabase; 373 374 #ifdef DEBUG 375 if (va < base) 376 panic("iommu_enter: va 0x%lx not in DVMA space", (long)va); 377 #endif 378 379 while ((long)len > 0) { 380 #ifdef notyet 381 #ifdef DEBUG 382 if ((sc->sc_ptes[atop(va - base)] & IOPTE_V) == 0) 383 panic("iommu_clear: clearing invalid pte at va 0x%lx", 384 (long)va); 385 #endif 386 #endif 387 sc->sc_ptes[atop(va - base)] = 0; 388 IOMMU_FLUSHPAGE(sc, va); 389 len -= pagesz; 390 va += pagesz; 391 } 392 } 393 394 #if 0 /* These registers aren't there??? */ 395 void 396 iommu_error() 397 { 398 struct iommu_softc *sc = X; 399 struct iommureg *iop = sc->sc_reg; 400 401 printf("iommu: afsr 0x%x, afar 0x%x\n", iop->io_afsr, iop->io_afar); 402 printf("iommu: mfsr 0x%x, mfar 0x%x\n", iop->io_mfsr, iop->io_mfar); 403 } 404 int 405 iommu_alloc(va, len) 406 u_int va, len; 407 { 408 struct iommu_softc *sc = X; 409 int off, tva, pa, iovaddr, pte; 410 411 off = (int)va & PGOFSET; 412 len = round_page(len + off); 413 va -= off; 414 415 if ((int)sc->sc_dvmacur + len > 0) 416 sc->sc_dvmacur = sc->sc_dvmabase; 417 418 iovaddr = tva = sc->sc_dvmacur; 419 sc->sc_dvmacur += len; 420 while (len) { 421 pa = pmap_extract(pmap_kernel(), va); 422 423 #define IOMMU_PPNSHIFT 8 424 #define IOMMU_V 0x00000002 425 #define IOMMU_W 0x00000004 426 427 pte = atop(pa) << IOMMU_PPNSHIFT; 428 pte |= IOMMU_V | IOMMU_W; 429 sta(sc->sc_ptes + atop(tva - sc->sc_dvmabase), ASI_BYPASS, pte); 430 sc->sc_reg->io_flushpage = tva; 431 len -= NBPG; 432 va += NBPG; 433 tva += NBPG; 434 } 435 return iovaddr + off; 436 } 437 #endif 438 439 440 /* 441 * IOMMU DMA map functions. 442 */ 443 int 444 iommu_dmamap_load(t, map, buf, buflen, p, flags) 445 bus_dma_tag_t t; 446 bus_dmamap_t map; 447 void *buf; 448 bus_size_t buflen; 449 struct proc *p; 450 int flags; 451 { 452 bus_size_t sgsize; 453 bus_addr_t dva; 454 bus_addr_t boundary; 455 vaddr_t va = (vaddr_t)buf; 456 u_long align, voff; 457 pmap_t pmap; 458 459 /* 460 * Remember page offset, then truncate the buffer address to 461 * a page boundary. 462 */ 463 voff = va & PGOFSET; 464 va &= ~PGOFSET; 465 466 /* 467 * Make sure that on error condition we return "no valid mappings". 468 */ 469 map->dm_nsegs = 0; 470 471 if (buflen > map->_dm_size) 472 return (EINVAL); 473 474 sgsize = (buflen + voff + PGOFSET) & ~PGOFSET; 475 align = dvma_cachealign ? dvma_cachealign : NBPG; 476 boundary = map->_dm_boundary; 477 478 if (extent_alloc1(iommu_dvmamap, sgsize, align, va & (align-1), 479 boundary, EX_NOWAIT, (u_long *)&dva) != 0) 480 return (ENOMEM); 481 482 cpuinfo.cache_flush(buf, buflen); 483 484 /* 485 * We always use just one segment. 486 */ 487 map->dm_mapsize = buflen; 488 map->dm_nsegs = 1; 489 map->dm_segs[0].ds_addr = dva + voff; 490 map->dm_segs[0].ds_len = buflen; 491 492 if (p != NULL) 493 pmap = p->p_vmspace->vm_map.pmap; 494 else 495 pmap = pmap_kernel(); 496 497 for (; sgsize != 0; ) { 498 /* 499 * Get the physical address for this page. 500 */ 501 paddr_t pa = pmap_extract(pmap, va); 502 503 iommu_enter(dva, pa); 504 505 dva += NBPG; 506 va += NBPG; 507 sgsize -= NBPG; 508 } 509 510 return (0); 511 } 512 513 /* 514 * Like _bus_dmamap_load(), but for mbufs. 515 */ 516 int 517 iommu_dmamap_load_mbuf(t, map, m, flags) 518 bus_dma_tag_t t; 519 bus_dmamap_t map; 520 struct mbuf *m; 521 int flags; 522 { 523 524 panic("_bus_dmamap_load: not implemented"); 525 } 526 527 /* 528 * Like _bus_dmamap_load(), but for uios. 529 */ 530 int 531 iommu_dmamap_load_uio(t, map, uio, flags) 532 bus_dma_tag_t t; 533 bus_dmamap_t map; 534 struct uio *uio; 535 int flags; 536 { 537 538 panic("_bus_dmamap_load_uio: not implemented"); 539 } 540 541 /* 542 * Like _bus_dmamap_load(), but for raw memory allocated with 543 * bus_dmamem_alloc(). 544 */ 545 int 546 iommu_dmamap_load_raw(t, map, segs, nsegs, size, flags) 547 bus_dma_tag_t t; 548 bus_dmamap_t map; 549 bus_dma_segment_t *segs; 550 int nsegs; 551 bus_size_t size; 552 int flags; 553 { 554 555 panic("_bus_dmamap_load_raw: not implemented"); 556 } 557 558 /* 559 * Common function for unloading a DMA map. May be called by 560 * bus-specific DMA map unload functions. 561 */ 562 void 563 iommu_dmamap_unload(t, map) 564 bus_dma_tag_t t; 565 bus_dmamap_t map; 566 { 567 bus_addr_t addr; 568 bus_size_t len; 569 570 if (map->dm_nsegs != 1) 571 panic("_bus_dmamap_unload: nsegs = %d", map->dm_nsegs); 572 573 addr = map->dm_segs[0].ds_addr; 574 len = map->dm_segs[0].ds_len; 575 len = ((addr & PGOFSET) + len + PGOFSET) & ~PGOFSET; 576 addr &= ~PGOFSET; 577 578 iommu_remove(addr, len); 579 if (extent_free(iommu_dvmamap, addr, len, EX_NOWAIT) != 0) 580 printf("warning: %ld of DVMA space lost\n", (long)len); 581 582 /* Mark the mappings as invalid. */ 583 map->dm_mapsize = 0; 584 map->dm_nsegs = 0; 585 } 586 587 /* 588 * Common function for DMA map synchronization. May be called 589 * by bus-specific DMA map synchronization functions. 590 */ 591 void 592 iommu_dmamap_sync(t, map, offset, len, ops) 593 bus_dma_tag_t t; 594 bus_dmamap_t map; 595 bus_addr_t offset; 596 bus_size_t len; 597 int ops; 598 { 599 600 /* 601 * XXX Should flush CPU write buffers. 602 */ 603 } 604 605 /* 606 * Common function for DMA-safe memory allocation. May be called 607 * by bus-specific DMA memory allocation functions. 608 */ 609 int 610 iommu_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags) 611 bus_dma_tag_t t; 612 bus_size_t size, alignment, boundary; 613 bus_dma_segment_t *segs; 614 int nsegs; 615 int *rsegs; 616 int flags; 617 { 618 paddr_t pa; 619 bus_addr_t dva; 620 vm_page_t m; 621 int error; 622 struct pglist *mlist; 623 624 size = round_page(size); 625 error = _bus_dmamem_alloc_common(t, size, alignment, boundary, 626 segs, nsegs, rsegs, flags); 627 if (error != 0) 628 return (error); 629 630 if (extent_alloc(iommu_dvmamap, size, alignment, boundary, 631 (flags & BUS_DMA_NOWAIT) == 0 ? EX_WAITOK : EX_NOWAIT, 632 (u_long *)&dva) != 0) 633 return (ENOMEM); 634 635 /* 636 * Compute the location, size, and number of segments actually 637 * returned by the VM code. 638 */ 639 segs[0].ds_addr = dva; 640 segs[0].ds_len = size; 641 *rsegs = 1; 642 643 mlist = segs[0]._ds_mlist; 644 /* Map memory into DVMA space */ 645 for (m = TAILQ_FIRST(mlist); m != NULL; m = TAILQ_NEXT(m,pageq)) { 646 pa = VM_PAGE_TO_PHYS(m); 647 648 iommu_enter(dva, pa); 649 dva += PAGE_SIZE; 650 } 651 652 return (0); 653 } 654 655 /* 656 * Common function for freeing DMA-safe memory. May be called by 657 * bus-specific DMA memory free functions. 658 */ 659 void 660 iommu_dmamem_free(t, segs, nsegs) 661 bus_dma_tag_t t; 662 bus_dma_segment_t *segs; 663 int nsegs; 664 { 665 bus_addr_t addr; 666 bus_size_t len; 667 668 if (nsegs != 1) 669 panic("bus_dmamem_free: nsegs = %d", nsegs); 670 671 addr = segs[0].ds_addr; 672 len = segs[0].ds_len; 673 674 iommu_remove(addr, len); 675 if (extent_free(iommu_dvmamap, addr, len, EX_NOWAIT) != 0) 676 printf("warning: %ld of DVMA space lost\n", (long)len); 677 /* 678 * Return the list of pages back to the VM system. 679 */ 680 _bus_dmamem_free_common(t, segs, nsegs); 681 } 682 683 /* 684 * Common function for mapping DMA-safe memory. May be called by 685 * bus-specific DMA memory map functions. 686 */ 687 int 688 iommu_dmamem_map(t, segs, nsegs, size, kvap, flags) 689 bus_dma_tag_t t; 690 bus_dma_segment_t *segs; 691 int nsegs; 692 size_t size; 693 caddr_t *kvap; 694 int flags; 695 { 696 vm_page_t m; 697 vaddr_t va, sva; 698 bus_addr_t addr; 699 struct pglist *mlist; 700 int cbit; 701 size_t oversize; 702 u_long align; 703 704 if (nsegs != 1) 705 panic("iommu_dmamem_map: nsegs = %d", nsegs); 706 707 cbit = has_iocache ? 0 : PMAP_NC; 708 align = dvma_cachealign ? dvma_cachealign : PAGE_SIZE; 709 710 size = round_page(size); 711 712 /* 713 * Find a region of kernel virtual addresses that can accomodate 714 * our aligment requirements. 715 */ 716 oversize = size + align - PAGE_SIZE; 717 sva = uvm_km_valloc(kernel_map, oversize); 718 if (sva == 0) 719 return (ENOMEM); 720 721 /* Compute start of aligned region */ 722 va = sva; 723 va += ((segs[0].ds_addr & (align - 1)) + align - va) & (align - 1); 724 725 /* Return excess virtual addresses */ 726 if (va != sva) 727 (void)uvm_unmap(kernel_map, sva, va); 728 if (va + size != sva + oversize) 729 (void)uvm_unmap(kernel_map, va + size, sva + oversize); 730 731 732 *kvap = (caddr_t)va; 733 mlist = segs[0]._ds_mlist; 734 735 for (m = TAILQ_FIRST(mlist); m != NULL; m = TAILQ_NEXT(m,pageq)) { 736 737 if (size == 0) 738 panic("iommu_dmamem_map: size botch"); 739 740 addr = VM_PAGE_TO_PHYS(m); 741 pmap_enter(pmap_kernel(), va, addr | cbit, 742 VM_PROT_READ | VM_PROT_WRITE, TRUE); 743 #if 0 744 if (flags & BUS_DMA_COHERENT) 745 /* XXX */; 746 #endif 747 va += PAGE_SIZE; 748 size -= PAGE_SIZE; 749 } 750 751 return (0); 752 } 753 754 /* 755 * Common functin for mmap(2)'ing DMA-safe memory. May be called by 756 * bus-specific DMA mmap(2)'ing functions. 757 */ 758 int 759 iommu_dmamem_mmap(t, segs, nsegs, off, prot, flags) 760 bus_dma_tag_t t; 761 bus_dma_segment_t *segs; 762 int nsegs, off, prot, flags; 763 { 764 765 panic("_bus_dmamem_mmap: not implemented"); 766 } 767
Indexes created Tue Sep 30 20:09:53 GMT 2025