loadfile_machdep.c revision 1.14.2.1 1 /* $NetBSD: loadfile_machdep.c,v 1.14.2.1 2017/01/07 08:56:26 pgoyette Exp $ */
2
3 /*-
4 * Copyright (c) 2005 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This work is based on the code contributed by Robert Drehmel to the
8 * FreeBSD project.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <lib/libsa/stand.h>
33 #include <lib/libkern/libkern.h>
34
35 #include <machine/pte.h>
36 #include <machine/cpu.h>
37 #include <machine/ctlreg.h>
38 #include <machine/vmparam.h>
39 #include <machine/promlib.h>
40 #include <machine/hypervisor.h>
41
42 #include "boot.h"
43 #include "openfirm.h"
44
45
46 #define MAXSEGNUM 50
47 #define hi(val) ((uint32_t)(((val) >> 32) & (uint32_t)-1))
48 #define lo(val) ((uint32_t)((val) & (uint32_t)-1))
49
50 #define roundup2(x, y) (((x)+((y)-1))&(~((y)-1)))
51
52
53 typedef int phandle_t;
54
55 extern void itlb_enter(vaddr_t, uint32_t, uint32_t);
56 extern void dtlb_enter(vaddr_t, uint32_t, uint32_t);
57 extern void dtlb_replace(vaddr_t, uint32_t, uint32_t);
58 extern vaddr_t itlb_va_to_pa(vaddr_t);
59 extern vaddr_t dtlb_va_to_pa(vaddr_t);
60
61 static void tlb_init(void);
62 static void tlb_init_sun4u(void);
63 #ifdef SUN4V
64 static void tlb_init_sun4v(void);
65 #endif
66 void sparc64_finalize_tlb_sun4u(u_long);
67 #ifdef SUN4V
68 void sparc64_finalize_tlb_sun4v(u_long);
69 #endif
70 static int mmu_mapin(vaddr_t, vsize_t);
71 static int mmu_mapin_sun4u(vaddr_t, vsize_t);
72 #ifdef SUN4V
73 static int mmu_mapin_sun4v(vaddr_t, vsize_t);
74 #endif
75 static ssize_t mmu_read(int, void *, size_t);
76 static void* mmu_memcpy(void *, const void *, size_t);
77 static void* mmu_memset(void *, int, size_t);
78 static void mmu_freeall(void);
79
80 static int ofw_mapin(vaddr_t, vsize_t);
81 static ssize_t ofw_read(int, void *, size_t);
82 static void* ofw_memcpy(void *, const void *, size_t);
83 static void* ofw_memset(void *, int, size_t);
84 static void ofw_freeall(void);
85
86 #if 0
87 static int nop_mapin(vaddr_t, vsize_t);
88 #endif
89 static ssize_t nop_read(int, void *, size_t);
90 static void* nop_memcpy(void *, const void *, size_t);
91 static void* nop_memset(void *, int, size_t);
92 static void nop_freeall(void);
93
94
95 struct tlb_entry *dtlb_store = 0;
96 struct tlb_entry *itlb_store = 0;
97
98 int dtlb_slot;
99 int itlb_slot;
100 int dtlb_slot_max;
101 int itlb_slot_max;
102
103 static struct kvamap {
104 uint64_t start;
105 uint64_t end;
106 } kvamap[MAXSEGNUM];
107
108 static struct memsw {
109 ssize_t (* read)(int f, void *addr, size_t size);
110 void* (* memcpy)(void *dst, const void *src, size_t size);
111 void* (* memset)(void *dst, int c, size_t size);
112 void (* freeall)(void);
113 } memswa[] = {
114 { nop_read, nop_memcpy, nop_memset, nop_freeall },
115 { ofw_read, ofw_memcpy, ofw_memset, ofw_freeall },
116 { mmu_read, mmu_memcpy, mmu_memset, mmu_freeall }
117 };
118
119 static struct memsw *memsw = &memswa[0];
120
121 #ifdef SUN4V
122 static int sun4v = 0;
123 #endif
124
125 /*
126 * Check if a memory region is already mapped. Return length and virtual
127 * address of unmapped sub-region, if any.
128 */
129 static uint64_t
130 kvamap_extract(vaddr_t va, vsize_t len, vaddr_t *new_va)
131 {
132 int i;
133
134 *new_va = va;
135 for (i = 0; (len > 0) && (i < MAXSEGNUM); i++) {
136 if (kvamap[i].start == NULL)
137 break;
138 if ((kvamap[i].start <= va) && (va < kvamap[i].end)) {
139 uint64_t va_len = kvamap[i].end - va;
140 len = (va_len < len) ? len - va_len : 0;
141 *new_va = kvamap[i].end;
142 }
143 }
144
145 return len;
146 }
147
148 /*
149 * Record new kernel mapping.
150 */
151 static void
152 kvamap_enter(uint64_t va, uint64_t len)
153 {
154 int i;
155
156 DPRINTF(("kvamap_enter: %d@%p\n", (int)len, (void*)(u_long)va));
157 for (i = 0; (len > 0) && (i < MAXSEGNUM); i++) {
158 if (kvamap[i].start == NULL) {
159 kvamap[i].start = va;
160 kvamap[i].end = va + len;
161 break;
162 }
163 }
164
165 if (i == MAXSEGNUM) {
166 panic("Too many allocations requested.");
167 }
168 }
169
170 /*
171 * Initialize TLB as required by MMU mapping functions.
172 */
173 static void
174 tlb_init(void)
175 {
176 phandle_t root;
177 #ifdef SUN4V
178 char buf[128];
179 #endif
180
181 if (dtlb_store != NULL) {
182 return;
183 }
184
185 if ( (root = prom_findroot()) == -1) {
186 panic("tlb_init: prom_findroot()");
187 }
188 #ifdef SUN4V
189 if (_prom_getprop(root, "compatible", buf, sizeof(buf)) > 0 &&
190 strcmp(buf, "sun4v") == 0) {
191 tlb_init_sun4v();
192 sun4v = 1;
193 }
194 else {
195 #endif
196 tlb_init_sun4u();
197 #ifdef SUN4V
198 }
199 #endif
200
201 dtlb_store = alloc(dtlb_slot_max * sizeof(*dtlb_store));
202 itlb_store = alloc(itlb_slot_max * sizeof(*itlb_store));
203 if (dtlb_store == NULL || itlb_store == NULL) {
204 panic("tlb_init: malloc");
205 }
206
207 dtlb_slot = itlb_slot = 0;
208 }
209
210 /*
211 * Initialize TLB as required by MMU mapping functions - sun4u.
212 */
213 static void
214 tlb_init_sun4u(void)
215 {
216 phandle_t child;
217 phandle_t root;
218 char buf[128];
219 u_int bootcpu;
220 u_int cpu;
221
222 bootcpu = get_cpuid();
223
224 if ( (root = prom_findroot()) == -1) {
225 panic("tlb_init: prom_findroot()");
226 }
227
228 for (child = prom_firstchild(root); child != 0;
229 child = prom_nextsibling(child)) {
230 if (child == -1) {
231 panic("tlb_init: OF_child");
232 }
233 if (_prom_getprop(child, "device_type", buf, sizeof(buf)) > 0 &&
234 strcmp(buf, "cpu") == 0) {
235 if (_prom_getprop(child, "upa-portid", &cpu,
236 sizeof(cpu)) == -1 && _prom_getprop(child, "portid",
237 &cpu, sizeof(cpu)) == -1)
238 panic("tlb_init: prom_getprop");
239 if (cpu == bootcpu)
240 break;
241 }
242 }
243 if (cpu != bootcpu)
244 panic("tlb_init: no node for bootcpu?!?!");
245 if (_prom_getprop(child, "#dtlb-entries", &dtlb_slot_max,
246 sizeof(dtlb_slot_max)) == -1 ||
247 _prom_getprop(child, "#itlb-entries", &itlb_slot_max,
248 sizeof(itlb_slot_max)) == -1)
249 panic("tlb_init: prom_getprop");
250 }
251
252 #ifdef SUN4V
253 /*
254 * Initialize TLB as required by MMU mapping functions - sun4v.
255 */
256 static void
257 tlb_init_sun4v(void)
258 {
259 psize_t len;
260 paddr_t pa;
261 int64_t hv_rc;
262
263 hv_mach_desc((paddr_t)NULL, &len); /* Trick to get actual length */
264 if ( !len ) {
265 panic("init_tlb: hv_mach_desc() failed");
266 }
267 pa = OF_alloc_phys(len, 16);
268 if ( pa == -1 ) {
269 panic("OF_alloc_phys() failed");
270 }
271 hv_rc = hv_mach_desc(pa, &len);
272 if (hv_rc != H_EOK) {
273 panic("hv_mach_desc() failed");
274 }
275 /* XXX dig out TLB node info - 64 is ok for loading the kernel */
276 dtlb_slot_max = itlb_slot_max = 64;
277 }
278 #endif
279
280 /*
281 * Map requested memory region with permanent 4MB pages.
282 */
283 static int
284 mmu_mapin(vaddr_t rva, vsize_t len)
285 {
286 len = roundup2(len + (rva & PAGE_MASK_4M), PAGE_SIZE_4M);
287 rva &= ~PAGE_MASK_4M;
288
289 tlb_init();
290
291 #if SUN4V
292 if ( sun4v )
293 return mmu_mapin_sun4v(rva, len);
294 else
295 #endif
296 return mmu_mapin_sun4u(rva, len);
297 }
298
299 /*
300 * Map requested memory region with permanent 4MB pages - sun4u.
301 */
302 static int
303 mmu_mapin_sun4u(vaddr_t rva, vsize_t len)
304 {
305 uint64_t data;
306 paddr_t pa;
307 vaddr_t va, mva;
308
309 for (pa = (paddr_t)-1; len > 0; rva = va) {
310 if ( (len = kvamap_extract(rva, len, &va)) == 0) {
311 /* The rest is already mapped */
312 break;
313 }
314
315 if (dtlb_va_to_pa(va) == (u_long)-1 ||
316 itlb_va_to_pa(va) == (u_long)-1) {
317 /* Allocate a physical page, claim the virtual area */
318 if (pa == (paddr_t)-1) {
319 pa = OF_alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M);
320 if (pa == (paddr_t)-1)
321 panic("out of memory");
322 mva = OF_claim_virt(va, PAGE_SIZE_4M);
323 if (mva != va) {
324 panic("can't claim virtual page "
325 "(wanted %#lx, got %#lx)",
326 va, mva);
327 }
328 /* The mappings may have changed, be paranoid. */
329 continue;
330 }
331
332 /*
333 * Actually, we can only allocate two pages less at
334 * most (depending on the kernel TSB size).
335 */
336 if (dtlb_slot >= dtlb_slot_max)
337 panic("mmu_mapin: out of dtlb_slots");
338 if (itlb_slot >= itlb_slot_max)
339 panic("mmu_mapin: out of itlb_slots");
340
341 DPRINTF(("mmu_mapin: 0x%lx:0x%x.0x%x\n", va,
342 hi(pa), lo(pa)));
343
344 data = SUN4U_TSB_DATA(0, /* global */
345 PGSZ_4M, /* 4mb page */
346 pa, /* phys.address */
347 1, /* privileged */
348 1, /* write */
349 1, /* cache */
350 1, /* alias */
351 1, /* valid */
352 0, /* endianness */
353 0 /* wc */
354 );
355 data |= SUN4U_TLB_L | SUN4U_TLB_CV; /* locked, virt.cache */
356
357 dtlb_store[dtlb_slot].te_pa = pa;
358 dtlb_store[dtlb_slot].te_va = va;
359 dtlb_slot++;
360 dtlb_enter(va, hi(data), lo(data));
361 pa = (paddr_t)-1;
362 }
363
364 kvamap_enter(va, PAGE_SIZE_4M);
365
366 len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len;
367 va += PAGE_SIZE_4M;
368 }
369
370 if (pa != (paddr_t)-1) {
371 OF_free_phys(pa, PAGE_SIZE_4M);
372 }
373
374 return (0);
375 }
376
377 #ifdef SUN4V
378 /*
379 * Map requested memory region with permanent 4MB pages - sun4v.
380 */
381 static int
382 mmu_mapin_sun4v(vaddr_t rva, vsize_t len)
383 {
384 uint64_t data;
385 paddr_t pa;
386 vaddr_t va, mva;
387 int64_t hv_rc;
388
389 for (pa = (paddr_t)-1; len > 0; rva = va) {
390 if ( (len = kvamap_extract(rva, len, &va)) == 0) {
391 /* The rest is already mapped */
392 break;
393 }
394
395 /* Allocate a physical page, claim the virtual area */
396 if (pa == (paddr_t)-1) {
397 pa = OF_alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M);
398 if (pa == (paddr_t)-1)
399 panic("out of memory");
400 mva = OF_claim_virt(va, PAGE_SIZE_4M);
401 if (mva != va) {
402 panic("can't claim virtual page "
403 "(wanted %#lx, got %#lx)",
404 va, mva);
405 }
406 }
407
408 /*
409 * Actually, we can only allocate two pages less at
410 * most (depending on the kernel TSB size).
411 */
412 if (dtlb_slot >= dtlb_slot_max)
413 panic("mmu_mapin: out of dtlb_slots");
414 if (itlb_slot >= itlb_slot_max)
415 panic("mmu_mapin: out of itlb_slots");
416
417 DPRINTF(("mmu_mapin: 0x%lx:0x%x.0x%x\n", va,
418 hi(pa), lo(pa)));
419
420 data = SUN4V_TSB_DATA(
421 0, /* global */
422 PGSZ_4M, /* 4mb page */
423 pa, /* phys.address */
424 1, /* privileged */
425 1, /* write */
426 1, /* cache */
427 1, /* alias */
428 1, /* valid */
429 0, /* endianness */
430 0 /* wc */
431 );
432 data |= SUN4V_TLB_CV; /* virt.cache */
433
434 dtlb_store[dtlb_slot].te_pa = pa;
435 dtlb_store[dtlb_slot].te_va = va;
436 dtlb_slot++;
437 hv_rc = hv_mmu_map_perm_addr(va, data, MAP_DTLB);
438 if ( hv_rc != H_EOK ) {
439 panic("hv_mmu_map_perm_addr() failed - rc = %ld", hv_rc);
440 }
441
442 kvamap_enter(va, PAGE_SIZE_4M);
443
444 pa = (paddr_t)-1;
445
446 len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len;
447 va += PAGE_SIZE_4M;
448 }
449
450 if (pa != (paddr_t)-1) {
451 OF_free_phys(pa, PAGE_SIZE_4M);
452 }
453
454 return (0);
455 }
456 #endif
457
458 static ssize_t
459 mmu_read(int f, void *addr, size_t size)
460 {
461 mmu_mapin((vaddr_t)addr, size);
462 return read(f, addr, size);
463 }
464
465 static void*
466 mmu_memcpy(void *dst, const void *src, size_t size)
467 {
468 mmu_mapin((vaddr_t)dst, size);
469 return memcpy(dst, src, size);
470 }
471
472 static void*
473 mmu_memset(void *dst, int c, size_t size)
474 {
475 mmu_mapin((vaddr_t)dst, size);
476 return memset(dst, c, size);
477 }
478
479 static void
480 mmu_freeall(void)
481 {
482 int i;
483
484 dtlb_slot = itlb_slot = 0;
485 for (i = 0; i < MAXSEGNUM; i++) {
486 /* XXX return all mappings to PROM and unmap the pages! */
487 kvamap[i].start = kvamap[i].end = 0;
488 }
489 }
490
491 /*
492 * Claim requested memory region in OpenFirmware allocation pool.
493 */
494 static int
495 ofw_mapin(vaddr_t rva, vsize_t len)
496 {
497 vaddr_t va;
498
499 len = roundup2(len + (rva & PAGE_MASK_4M), PAGE_SIZE_4M);
500 rva &= ~PAGE_MASK_4M;
501
502 if ( (len = kvamap_extract(rva, len, &va)) != 0) {
503 if (OF_claim((void *)(long)va, len, PAGE_SIZE_4M) == (void*)-1){
504 panic("ofw_mapin: Cannot claim memory.");
505 }
506 kvamap_enter(va, len);
507 }
508
509 return (0);
510 }
511
512 static ssize_t
513 ofw_read(int f, void *addr, size_t size)
514 {
515 ofw_mapin((vaddr_t)addr, size);
516 return read(f, addr, size);
517 }
518
519 static void*
520 ofw_memcpy(void *dst, const void *src, size_t size)
521 {
522 ofw_mapin((vaddr_t)dst, size);
523 return memcpy(dst, src, size);
524 }
525
526 static void*
527 ofw_memset(void *dst, int c, size_t size)
528 {
529 ofw_mapin((vaddr_t)dst, size);
530 return memset(dst, c, size);
531 }
532
533 static void
534 ofw_freeall(void)
535 {
536 int i;
537
538 dtlb_slot = itlb_slot = 0;
539 for (i = 0; i < MAXSEGNUM; i++) {
540 OF_release((void*)(u_long)kvamap[i].start,
541 (u_int)(kvamap[i].end - kvamap[i].start));
542 kvamap[i].start = kvamap[i].end = 0;
543 }
544 }
545
546 /*
547 * NOP implementation exists solely for kernel header loading sake. Here
548 * we use alloc() interface to allocate memory and avoid doing some dangerous
549 * things.
550 */
551 static ssize_t
552 nop_read(int f, void *addr, size_t size)
553 {
554 return read(f, addr, size);
555 }
556
557 static void*
558 nop_memcpy(void *dst, const void *src, size_t size)
559 {
560 /*
561 * Real NOP to make LOAD_HDR work: loadfile_elfXX copies ELF headers
562 * right after the highest kernel address which will not be mapped with
563 * nop_XXX operations.
564 */
565 return (dst);
566 }
567
568 static void*
569 nop_memset(void *dst, int c, size_t size)
570 {
571 return memset(dst, c, size);
572 }
573
574 static void
575 nop_freeall(void)
576 { }
577
578 /*
579 * loadfile() hooks.
580 */
581 ssize_t
582 sparc64_read(int f, void *addr, size_t size)
583 {
584 return (*memsw->read)(f, addr, size);
585 }
586
587 void*
588 sparc64_memcpy(void *dst, const void *src, size_t size)
589 {
590 return (*memsw->memcpy)(dst, src, size);
591 }
592
593 void*
594 sparc64_memset(void *dst, int c, size_t size)
595 {
596 return (*memsw->memset)(dst, c, size);
597 }
598
599 /*
600 * Remove write permissions from text mappings in the dTLB.
601 * Add entries in the iTLB.
602 */
603 void
604 sparc64_finalize_tlb(u_long data_va)
605 {
606 #ifdef SUN4V
607 if ( sun4v )
608 sparc64_finalize_tlb_sun4v(data_va);
609 else
610 #endif
611 sparc64_finalize_tlb_sun4u(data_va);
612 }
613
614 /*
615 * Remove write permissions from text mappings in the dTLB - sun4u.
616 * Add entries in the iTLB.
617 */
618 void
619 sparc64_finalize_tlb_sun4u(u_long data_va)
620 {
621 int i;
622 int64_t data;
623 bool writable_text = false;
624
625 for (i = 0; i < dtlb_slot; i++) {
626 if (dtlb_store[i].te_va >= data_va) {
627 /*
628 * If (for whatever reason) the start of the
629 * writable section is right at the start of
630 * the kernel, we need to map it into the ITLB
631 * nevertheless (and don't make it readonly).
632 */
633 if (i == 0 && dtlb_store[i].te_va == data_va)
634 writable_text = true;
635 else
636 continue;
637 }
638
639 data = SUN4U_TSB_DATA(0, /* global */
640 PGSZ_4M, /* 4mb page */
641 dtlb_store[i].te_pa, /* phys.address */
642 1, /* privileged */
643 0, /* write */
644 1, /* cache */
645 1, /* alias */
646 1, /* valid */
647 0, /* endianness */
648 0 /* wc */
649 );
650 data |= SUN4U_TLB_L | SUN4U_TLB_CV; /* locked, virt.cache */
651 if (!writable_text)
652 dtlb_replace(dtlb_store[i].te_va, hi(data), lo(data));
653 itlb_store[itlb_slot] = dtlb_store[i];
654 itlb_slot++;
655 itlb_enter(dtlb_store[i].te_va, hi(data), lo(data));
656 }
657 if (writable_text)
658 printf("WARNING: kernel text mapped writable!\n");
659
660 }
661
662 #ifdef SUN4V
663 /*
664 * Remove write permissions from text mappings in the dTLB - sun4v.
665 * Add entries in the iTLB.
666 */
667 void
668 sparc64_finalize_tlb_sun4v(u_long data_va)
669 {
670 int i;
671 int64_t data;
672 bool writable_text = false;
673 int64_t hv_rc;
674
675 for (i = 0; i < dtlb_slot; i++) {
676 if (dtlb_store[i].te_va >= data_va) {
677 /*
678 * If (for whatever reason) the start of the
679 * writable section is right at the start of
680 * the kernel, we need to map it into the ITLB
681 * nevertheless (and don't make it readonly).
682 */
683 if (i == 0 && dtlb_store[i].te_va == data_va)
684 writable_text = true;
685 else
686 continue;
687 }
688
689 data = SUN4V_TSB_DATA(
690 0, /* global */
691 PGSZ_4M, /* 4mb page */
692 dtlb_store[i].te_pa, /* phys.address */
693 1, /* privileged */
694 0, /* write */
695 1, /* cache */
696 1, /* alias */
697 1, /* valid */
698 0, /* endianness */
699 0 /* wc */
700 );
701 data |= SUN4V_TLB_CV|SUN4V_TLB_X; /* virt.cache, executable */
702 if (!writable_text) {
703 hv_rc = hv_mmu_unmap_perm_addr(dtlb_store[i].te_va,
704 MAP_DTLB);
705 if ( hv_rc != H_EOK ) {
706 panic("hv_mmu_unmap_perm_addr() failed - "
707 "rc = %ld", hv_rc);
708 }
709 hv_rc = hv_mmu_map_perm_addr(dtlb_store[i].te_va, data,
710 MAP_DTLB);
711 if ( hv_rc != H_EOK ) {
712 panic("hv_mmu_map_perm_addr() failed - "
713 "rc = %ld", hv_rc);
714 }
715 }
716
717 itlb_store[itlb_slot] = dtlb_store[i];
718 itlb_slot++;
719 hv_rc = hv_mmu_map_perm_addr(dtlb_store[i].te_va, data,
720 MAP_ITLB);
721 if ( hv_rc != H_EOK ) {
722 panic("hv_mmu_map_perm_addr() failed - rc = %ld", hv_rc);
723 }
724 }
725 if (writable_text)
726 printf("WARNING: kernel text mapped writable!\n");
727 }
728 #endif
729
730 /*
731 * Record kernel mappings in bootinfo structure.
732 */
733 void
734 sparc64_bi_add(void)
735 {
736 int i;
737 int itlb_size, dtlb_size;
738 struct btinfo_count bi_count;
739 struct btinfo_tlb *bi_itlb, *bi_dtlb;
740
741 bi_count.count = itlb_slot;
742 bi_add(&bi_count, BTINFO_ITLB_SLOTS, sizeof(bi_count));
743 bi_count.count = dtlb_slot;
744 bi_add(&bi_count, BTINFO_DTLB_SLOTS, sizeof(bi_count));
745
746 itlb_size = sizeof(*bi_itlb) + sizeof(struct tlb_entry) * itlb_slot;
747 dtlb_size = sizeof(*bi_dtlb) + sizeof(struct tlb_entry) * dtlb_slot;
748
749 bi_itlb = alloc(itlb_size);
750 bi_dtlb = alloc(dtlb_size);
751
752 if ((bi_itlb == NULL) || (bi_dtlb == NULL)) {
753 panic("Out of memory in sparc64_bi_add.\n");
754 }
755
756 for (i = 0; i < itlb_slot; i++) {
757 bi_itlb->tlb[i].te_va = itlb_store[i].te_va;
758 bi_itlb->tlb[i].te_pa = itlb_store[i].te_pa;
759 }
760 bi_add(bi_itlb, BTINFO_ITLB, itlb_size);
761
762 for (i = 0; i < dtlb_slot; i++) {
763 bi_dtlb->tlb[i].te_va = dtlb_store[i].te_va;
764 bi_dtlb->tlb[i].te_pa = dtlb_store[i].te_pa;
765 }
766 bi_add(bi_dtlb, BTINFO_DTLB, dtlb_size);
767 }
768
769 /*
770 * Choose kernel image mapping strategy:
771 *
772 * LOADFILE_NOP_ALLOCATOR To load kernel image headers
773 * LOADFILE_OFW_ALLOCATOR To map the kernel by OpenFirmware means
774 * LOADFILE_MMU_ALLOCATOR To use permanent 4MB mappings
775 */
776 void
777 loadfile_set_allocator(int type)
778 {
779 if (type >= (sizeof(memswa) / sizeof(struct memsw))) {
780 panic("Bad allocator request.\n");
781 }
782
783 /*
784 * Release all memory claimed by previous allocator and schedule
785 * another allocator for succeeding memory allocation calls.
786 */
787 (*memsw->freeall)();
788 memsw = &memswa[type];
789 }
790