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loadfile_machdep.c revision 1.15
      1 /*	$NetBSD: loadfile_machdep.c,v 1.15 2016/08/15 08:29:34 maxv Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2005 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This work is based on the code contributed by Robert Drehmel to the
      8  * FreeBSD project.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <lib/libsa/stand.h>
     33 #include <lib/libkern/libkern.h>
     34 
     35 #include <machine/pte.h>
     36 #include <machine/cpu.h>
     37 #include <machine/ctlreg.h>
     38 #include <machine/vmparam.h>
     39 #include <machine/promlib.h>
     40 #include <machine/hypervisor.h>
     41 
     42 #include "boot.h"
     43 #include "openfirm.h"
     44 
     45 
     46 #define MAXSEGNUM	50
     47 #define hi(val)		((uint32_t)(((val) >> 32) & (uint32_t)-1))
     48 #define lo(val)		((uint32_t)((val) & (uint32_t)-1))
     49 
     50 #define roundup2(x, y)	(((x)+((y)-1))&(~((y)-1)))
     51 
     52 
     53 typedef int phandle_t;
     54 
     55 extern void	itlb_enter(vaddr_t, uint32_t, uint32_t);
     56 extern void	dtlb_enter(vaddr_t, uint32_t, uint32_t);
     57 extern void	dtlb_replace(vaddr_t, uint32_t, uint32_t);
     58 extern vaddr_t	itlb_va_to_pa(vaddr_t);
     59 extern vaddr_t	dtlb_va_to_pa(vaddr_t);
     60 
     61 static void	tlb_init(void);
     62 static void	tlb_init_sun4u(void);
     63 #ifdef SUN4V
     64 static void	tlb_init_sun4v(void);
     65 #endif
     66 void	sparc64_finalize_tlb_sun4u(u_long);
     67 #ifdef SUN4V
     68 void	sparc64_finalize_tlb_sun4v(u_long);
     69 #endif
     70 static int	mmu_mapin(vaddr_t, vsize_t);
     71 static int	mmu_mapin_sun4u(vaddr_t, vsize_t);
     72 #ifdef SUN4V
     73 static int	mmu_mapin_sun4v(vaddr_t, vsize_t);
     74 #endif
     75 static ssize_t	mmu_read(int, void *, size_t);
     76 static void*	mmu_memcpy(void *, const void *, size_t);
     77 static void*	mmu_memset(void *, int, size_t);
     78 static void	mmu_freeall(void);
     79 
     80 static int	ofw_mapin(vaddr_t, vsize_t);
     81 static ssize_t	ofw_read(int, void *, size_t);
     82 static void*	ofw_memcpy(void *, const void *, size_t);
     83 static void*	ofw_memset(void *, int, size_t);
     84 static void	ofw_freeall(void);
     85 
     86 #if 0
     87 static int	nop_mapin(vaddr_t, vsize_t);
     88 #endif
     89 static ssize_t	nop_read(int, void *, size_t);
     90 static void*	nop_memcpy(void *, const void *, size_t);
     91 static void*	nop_memset(void *, int, size_t);
     92 static void	nop_freeall(void);
     93 
     94 
     95 struct tlb_entry *dtlb_store = 0;
     96 struct tlb_entry *itlb_store = 0;
     97 
     98 int dtlb_slot;
     99 int itlb_slot;
    100 int dtlb_slot_max;
    101 int itlb_slot_max;
    102 
    103 static struct kvamap {
    104 	uint64_t start;
    105 	uint64_t end;
    106 } kvamap[MAXSEGNUM];
    107 
    108 static struct memsw {
    109 	ssize_t	(* read)(int f, void *addr, size_t size);
    110 	void*	(* memcpy)(void *dst, const void *src, size_t size);
    111 	void*	(* memset)(void *dst, int c, size_t size);
    112 	void	(* freeall)(void);
    113 } memswa[] = {
    114 	{ nop_read, nop_memcpy, nop_memset, nop_freeall },
    115 	{ ofw_read, ofw_memcpy, ofw_memset, ofw_freeall },
    116 	{ mmu_read, mmu_memcpy, mmu_memset, mmu_freeall }
    117 };
    118 
    119 static struct memsw *memsw = &memswa[0];
    120 
    121 #ifdef SUN4V
    122 static int sun4v = 0;
    123 #endif
    124 
    125 /*
    126  * Check if a memory region is already mapped. Return length and virtual
    127  * address of unmapped sub-region, if any.
    128  */
    129 static uint64_t
    130 kvamap_extract(vaddr_t va, vsize_t len, vaddr_t *new_va)
    131 {
    132 	int i;
    133 
    134 	*new_va  = va;
    135 	for (i = 0; (len > 0) && (i < MAXSEGNUM); i++) {
    136 		if (kvamap[i].start == NULL)
    137 			break;
    138 		if ((kvamap[i].start <= va) && (va < kvamap[i].end)) {
    139 			uint64_t va_len = kvamap[i].end - va;
    140 			len = (va_len < len) ? len - va_len : 0;
    141 			*new_va = kvamap[i].end;
    142 		}
    143 	}
    144 
    145 	return len;
    146 }
    147 
    148 /*
    149  * Record new kernel mapping.
    150  */
    151 static void
    152 kvamap_enter(uint64_t va, uint64_t len)
    153 {
    154 	int i;
    155 
    156 	DPRINTF(("kvamap_enter: %d@%p\n", (int)len, (void*)(u_long)va));
    157 	for (i = 0; (len > 0) && (i < MAXSEGNUM); i++) {
    158 		if (kvamap[i].start == NULL) {
    159 			kvamap[i].start = va;
    160 			kvamap[i].end = va + len;
    161 			break;
    162 		}
    163 	}
    164 
    165 	if (i == MAXSEGNUM) {
    166 		panic("Too many allocations requested.");
    167 	}
    168 }
    169 
    170 /*
    171  * Initialize TLB as required by MMU mapping functions.
    172  */
    173 static void
    174 tlb_init(void)
    175 {
    176 	phandle_t root;
    177 #ifdef SUN4V
    178 	char buf[128];
    179 #endif
    180 
    181 	if (dtlb_store != NULL) {
    182 		return;
    183 	}
    184 
    185 	if ( (root = prom_findroot()) == -1) {
    186 		panic("tlb_init: prom_findroot()");
    187 	}
    188 #ifdef SUN4V
    189 	if (_prom_getprop(root, "compatible", buf, sizeof(buf)) > 0 &&
    190 		    strcmp(buf, "sun4v") == 0) {
    191 		tlb_init_sun4v();
    192 		sun4v = 1;
    193 	}
    194 	else {
    195 #endif
    196 		tlb_init_sun4u();
    197 #ifdef SUN4V
    198 	}
    199 #endif
    200 
    201 	dtlb_store = alloc(dtlb_slot_max * sizeof(*dtlb_store));
    202 	itlb_store = alloc(itlb_slot_max * sizeof(*itlb_store));
    203 	if (dtlb_store == NULL || itlb_store == NULL) {
    204 		panic("tlb_init: malloc");
    205 	}
    206 
    207 	dtlb_slot = itlb_slot = 0;
    208 }
    209 
    210 /*
    211  * Initialize TLB as required by MMU mapping functions - sun4u.
    212  */
    213 static void
    214 tlb_init_sun4u(void)
    215 {
    216 	phandle_t child;
    217 	phandle_t root;
    218 	char buf[128];
    219 	bool foundcpu = false;
    220 	u_int bootcpu;
    221 	u_int cpu;
    222 
    223 	bootcpu = get_cpuid();
    224 
    225 	if ( (root = prom_findroot()) == -1) {
    226 		panic("tlb_init: prom_findroot()");
    227 	}
    228 
    229 	for (child = prom_firstchild(root); child != 0;
    230 			child = prom_nextsibling(child)) {
    231 		if (child == -1) {
    232 			panic("tlb_init: OF_child");
    233 		}
    234 		if (_prom_getprop(child, "device_type", buf, sizeof(buf)) > 0 &&
    235 		    strcmp(buf, "cpu") == 0) {
    236 			if (_prom_getprop(child, "upa-portid", &cpu,
    237 			    sizeof(cpu)) == -1 && _prom_getprop(child, "portid",
    238 			    &cpu, sizeof(cpu)) == -1)
    239 				panic("tlb_init: prom_getprop");
    240 			foundcpu = true;
    241 			if (cpu == bootcpu)
    242 				break;
    243 		}
    244 	}
    245 	if (!foundcpu)
    246 		panic("tlb_init: no cpu found!");
    247 	if (cpu != bootcpu)
    248 		panic("tlb_init: no node for bootcpu?!?!");
    249 	if (_prom_getprop(child, "#dtlb-entries", &dtlb_slot_max,
    250 	    sizeof(dtlb_slot_max)) == -1 ||
    251 	    _prom_getprop(child, "#itlb-entries", &itlb_slot_max,
    252 	    sizeof(itlb_slot_max)) == -1)
    253 		panic("tlb_init: prom_getprop");
    254 }
    255 
    256 #ifdef SUN4V
    257 /*
    258  * Initialize TLB as required by MMU mapping functions - sun4v.
    259  */
    260 static void
    261 tlb_init_sun4v(void)
    262 {
    263 	psize_t len;
    264 	paddr_t pa;
    265 	int64_t hv_rc;
    266 
    267 	hv_mach_desc((paddr_t)NULL, &len); /* Trick to get actual length */
    268 	if ( !len ) {
    269 		panic("init_tlb: hv_mach_desc() failed");
    270 	}
    271 	pa = OF_alloc_phys(len, 16);
    272 	if ( pa == -1 ) {
    273 		panic("OF_alloc_phys() failed");
    274 	}
    275 	hv_rc = hv_mach_desc(pa, &len);
    276 	if (hv_rc != H_EOK) {
    277 		panic("hv_mach_desc() failed");
    278 	}
    279 	/* XXX dig out TLB node info - 64 is ok for loading the kernel */
    280 	dtlb_slot_max = itlb_slot_max = 64;
    281 }
    282 #endif
    283 
    284 /*
    285  * Map requested memory region with permanent 4MB pages.
    286  */
    287 static int
    288 mmu_mapin(vaddr_t rva, vsize_t len)
    289 {
    290 	len  = roundup2(len + (rva & PAGE_MASK_4M), PAGE_SIZE_4M);
    291 	rva &= ~PAGE_MASK_4M;
    292 
    293 	tlb_init();
    294 
    295 #if SUN4V
    296 	if ( sun4v )
    297 		return mmu_mapin_sun4v(rva, len);
    298 	else
    299 #endif
    300 		return mmu_mapin_sun4u(rva, len);
    301 }
    302 
    303 /*
    304  * Map requested memory region with permanent 4MB pages - sun4u.
    305  */
    306 static int
    307 mmu_mapin_sun4u(vaddr_t rva, vsize_t len)
    308 {
    309 	uint64_t data;
    310 	paddr_t pa;
    311 	vaddr_t va, mva;
    312 
    313 	for (pa = (paddr_t)-1; len > 0; rva = va) {
    314 		if ( (len = kvamap_extract(rva, len, &va)) == 0) {
    315 			/* The rest is already mapped */
    316 			break;
    317 		}
    318 
    319 		if (dtlb_va_to_pa(va) == (u_long)-1 ||
    320 		    itlb_va_to_pa(va) == (u_long)-1) {
    321 			/* Allocate a physical page, claim the virtual area */
    322 			if (pa == (paddr_t)-1) {
    323 				pa = OF_alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M);
    324 				if (pa == (paddr_t)-1)
    325 					panic("out of memory");
    326 				mva = OF_claim_virt(va, PAGE_SIZE_4M);
    327 				if (mva != va) {
    328 					panic("can't claim virtual page "
    329 					    "(wanted %#lx, got %#lx)",
    330 					    va, mva);
    331 				}
    332 				/* The mappings may have changed, be paranoid. */
    333 				continue;
    334 			}
    335 
    336 			/*
    337 			 * Actually, we can only allocate two pages less at
    338 			 * most (depending on the kernel TSB size).
    339 			 */
    340 			if (dtlb_slot >= dtlb_slot_max)
    341 				panic("mmu_mapin: out of dtlb_slots");
    342 			if (itlb_slot >= itlb_slot_max)
    343 				panic("mmu_mapin: out of itlb_slots");
    344 
    345 			DPRINTF(("mmu_mapin: 0x%lx:0x%x.0x%x\n", va,
    346 			    hi(pa), lo(pa)));
    347 
    348 			data = SUN4U_TSB_DATA(0,	/* global */
    349 					PGSZ_4M,	/* 4mb page */
    350 					pa,		/* phys.address */
    351 					1,		/* privileged */
    352 					1,		/* write */
    353 					1,		/* cache */
    354 					1,		/* alias */
    355 					1,		/* valid */
    356 					0		/* endianness */
    357 					);
    358 			data |= SUN4U_TLB_L | SUN4U_TLB_CV; /* locked, virt.cache */
    359 
    360 			dtlb_store[dtlb_slot].te_pa = pa;
    361 			dtlb_store[dtlb_slot].te_va = va;
    362 			dtlb_slot++;
    363 			dtlb_enter(va, hi(data), lo(data));
    364 			pa = (paddr_t)-1;
    365 		}
    366 
    367 		kvamap_enter(va, PAGE_SIZE_4M);
    368 
    369 		len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len;
    370 		va += PAGE_SIZE_4M;
    371 	}
    372 
    373 	if (pa != (paddr_t)-1) {
    374 		OF_free_phys(pa, PAGE_SIZE_4M);
    375 	}
    376 
    377 	return (0);
    378 }
    379 
    380 #ifdef SUN4V
    381 /*
    382  * Map requested memory region with permanent 4MB pages - sun4v.
    383  */
    384 static int
    385 mmu_mapin_sun4v(vaddr_t rva, vsize_t len)
    386 {
    387 	uint64_t data;
    388 	paddr_t pa;
    389 	vaddr_t va, mva;
    390 	int64_t hv_rc;
    391 
    392 	for (pa = (paddr_t)-1; len > 0; rva = va) {
    393 		if ( (len = kvamap_extract(rva, len, &va)) == 0) {
    394 			/* The rest is already mapped */
    395 			break;
    396 		}
    397 
    398 		/* Allocate a physical page, claim the virtual area */
    399 		if (pa == (paddr_t)-1) {
    400 			pa = OF_alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M);
    401 			if (pa == (paddr_t)-1)
    402 				panic("out of memory");
    403 			mva = OF_claim_virt(va, PAGE_SIZE_4M);
    404 			if (mva != va) {
    405 				panic("can't claim virtual page "
    406 				    "(wanted %#lx, got %#lx)",
    407 				    va, mva);
    408 			}
    409 		}
    410 
    411 		/*
    412 		 * Actually, we can only allocate two pages less at
    413 		 * most (depending on the kernel TSB size).
    414 		 */
    415 		if (dtlb_slot >= dtlb_slot_max)
    416 			panic("mmu_mapin: out of dtlb_slots");
    417 		if (itlb_slot >= itlb_slot_max)
    418 			panic("mmu_mapin: out of itlb_slots");
    419 
    420 		DPRINTF(("mmu_mapin: 0x%lx:0x%x.0x%x\n", va,
    421 		    hi(pa), lo(pa)));
    422 
    423 		data = SUN4V_TSB_DATA(
    424 			0,		/* global */
    425 			PGSZ_4M,	/* 4mb page */
    426 			pa,		/* phys.address */
    427 			1,		/* privileged */
    428 			1,		/* write */
    429 			1,		/* cache */
    430 			1,		/* alias */
    431 			1,		/* valid */
    432 			0		/* endianness */
    433 			);
    434 		data |= SUN4V_TLB_CV; /* virt.cache */
    435 
    436 		dtlb_store[dtlb_slot].te_pa = pa;
    437 		dtlb_store[dtlb_slot].te_va = va;
    438 		dtlb_slot++;
    439 		hv_rc = hv_mmu_map_perm_addr(va, data, MAP_DTLB);
    440 		if ( hv_rc != H_EOK ) {
    441 			panic("hv_mmu_map_perm_addr() failed - rc = %ld", hv_rc);
    442 		}
    443 
    444 		kvamap_enter(va, PAGE_SIZE_4M);
    445 
    446 		pa = (paddr_t)-1;
    447 
    448 		len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len;
    449 		va += PAGE_SIZE_4M;
    450 	}
    451 
    452 	if (pa != (paddr_t)-1) {
    453 		OF_free_phys(pa, PAGE_SIZE_4M);
    454 	}
    455 
    456 	return (0);
    457 }
    458 #endif
    459 
    460 static ssize_t
    461 mmu_read(int f, void *addr, size_t size)
    462 {
    463 	mmu_mapin((vaddr_t)addr, size);
    464 	return read(f, addr, size);
    465 }
    466 
    467 static void*
    468 mmu_memcpy(void *dst, const void *src, size_t size)
    469 {
    470 	mmu_mapin((vaddr_t)dst, size);
    471 	return memcpy(dst, src, size);
    472 }
    473 
    474 static void*
    475 mmu_memset(void *dst, int c, size_t size)
    476 {
    477 	mmu_mapin((vaddr_t)dst, size);
    478 	return memset(dst, c, size);
    479 }
    480 
    481 static void
    482 mmu_freeall(void)
    483 {
    484 	int i;
    485 
    486 	dtlb_slot = itlb_slot = 0;
    487 	for (i = 0; i < MAXSEGNUM; i++) {
    488 		/* XXX return all mappings to PROM and unmap the pages! */
    489 		kvamap[i].start = kvamap[i].end = 0;
    490 	}
    491 }
    492 
    493 /*
    494  * Claim requested memory region in OpenFirmware allocation pool.
    495  */
    496 static int
    497 ofw_mapin(vaddr_t rva, vsize_t len)
    498 {
    499 	vaddr_t va;
    500 
    501 	len  = roundup2(len + (rva & PAGE_MASK_4M), PAGE_SIZE_4M);
    502 	rva &= ~PAGE_MASK_4M;
    503 
    504 	if ( (len = kvamap_extract(rva, len, &va)) != 0) {
    505 		if (OF_claim((void *)(long)va, len, PAGE_SIZE_4M) == (void*)-1){
    506 			panic("ofw_mapin: Cannot claim memory.");
    507 		}
    508 		kvamap_enter(va, len);
    509 	}
    510 
    511 	return (0);
    512 }
    513 
    514 static ssize_t
    515 ofw_read(int f, void *addr, size_t size)
    516 {
    517 	ofw_mapin((vaddr_t)addr, size);
    518 	return read(f, addr, size);
    519 }
    520 
    521 static void*
    522 ofw_memcpy(void *dst, const void *src, size_t size)
    523 {
    524 	ofw_mapin((vaddr_t)dst, size);
    525 	return memcpy(dst, src, size);
    526 }
    527 
    528 static void*
    529 ofw_memset(void *dst, int c, size_t size)
    530 {
    531 	ofw_mapin((vaddr_t)dst, size);
    532 	return memset(dst, c, size);
    533 }
    534 
    535 static void
    536 ofw_freeall(void)
    537 {
    538 	int i;
    539 
    540 	dtlb_slot = itlb_slot = 0;
    541 	for (i = 0; i < MAXSEGNUM; i++) {
    542 		OF_release((void*)(u_long)kvamap[i].start,
    543 				(u_int)(kvamap[i].end - kvamap[i].start));
    544 		kvamap[i].start = kvamap[i].end = 0;
    545 	}
    546 }
    547 
    548 /*
    549  * NOP implementation exists solely for kernel header loading sake. Here
    550  * we use alloc() interface to allocate memory and avoid doing some dangerous
    551  * things.
    552  */
    553 static ssize_t
    554 nop_read(int f, void *addr, size_t size)
    555 {
    556 	return read(f, addr, size);
    557 }
    558 
    559 static void*
    560 nop_memcpy(void *dst, const void *src, size_t size)
    561 {
    562 	/*
    563 	 * Real NOP to make LOAD_HDR work: loadfile_elfXX copies ELF headers
    564 	 * right after the highest kernel address which will not be mapped with
    565 	 * nop_XXX operations.
    566 	 */
    567 	return (dst);
    568 }
    569 
    570 static void*
    571 nop_memset(void *dst, int c, size_t size)
    572 {
    573 	return memset(dst, c, size);
    574 }
    575 
    576 static void
    577 nop_freeall(void)
    578 { }
    579 
    580 /*
    581  * loadfile() hooks.
    582  */
    583 ssize_t
    584 sparc64_read(int f, void *addr, size_t size)
    585 {
    586 	return (*memsw->read)(f, addr, size);
    587 }
    588 
    589 void*
    590 sparc64_memcpy(void *dst, const void *src, size_t size)
    591 {
    592 	return (*memsw->memcpy)(dst, src, size);
    593 }
    594 
    595 void*
    596 sparc64_memset(void *dst, int c, size_t size)
    597 {
    598 	return (*memsw->memset)(dst, c, size);
    599 }
    600 
    601 /*
    602  * Remove write permissions from text mappings in the dTLB.
    603  * Add entries in the iTLB.
    604  */
    605 void
    606 sparc64_finalize_tlb(u_long data_va)
    607 {
    608 #ifdef SUN4V
    609 	if ( sun4v )
    610 		sparc64_finalize_tlb_sun4v(data_va);
    611 	else
    612 #endif
    613 		sparc64_finalize_tlb_sun4u(data_va);
    614 }
    615 
    616 /*
    617  * Remove write permissions from text mappings in the dTLB - sun4u.
    618  * Add entries in the iTLB.
    619  */
    620 void
    621 sparc64_finalize_tlb_sun4u(u_long data_va)
    622 {
    623 	int i;
    624 	int64_t data;
    625 	bool writable_text = false;
    626 
    627 	for (i = 0; i < dtlb_slot; i++) {
    628 		if (dtlb_store[i].te_va >= data_va) {
    629 			/*
    630 			 * If (for whatever reason) the start of the
    631 			 * writable section is right at the start of
    632 			 * the kernel, we need to map it into the ITLB
    633 			 * nevertheless (and don't make it readonly).
    634 			 */
    635 			if (i == 0 && dtlb_store[i].te_va == data_va)
    636 				writable_text = true;
    637 			else
    638 				continue;
    639 		}
    640 
    641 		data = SUN4U_TSB_DATA(0,	/* global */
    642 				PGSZ_4M,	/* 4mb page */
    643 				dtlb_store[i].te_pa,	/* phys.address */
    644 				1,		/* privileged */
    645 				0,		/* write */
    646 				1,		/* cache */
    647 				1,		/* alias */
    648 				1,		/* valid */
    649 				0		/* endianness */
    650 				);
    651 		data |= SUN4U_TLB_L | SUN4U_TLB_CV; /* locked, virt.cache */
    652 		if (!writable_text)
    653 			dtlb_replace(dtlb_store[i].te_va, hi(data), lo(data));
    654 		itlb_store[itlb_slot] = dtlb_store[i];
    655 		itlb_slot++;
    656 		itlb_enter(dtlb_store[i].te_va, hi(data), lo(data));
    657 	}
    658 	if (writable_text)
    659 		printf("WARNING: kernel text mapped writable!\n");
    660 
    661 }
    662 
    663 #ifdef SUN4V
    664 /*
    665  * Remove write permissions from text mappings in the dTLB - sun4v.
    666  * Add entries in the iTLB.
    667  */
    668 void
    669 sparc64_finalize_tlb_sun4v(u_long data_va)
    670 {
    671 	int i;
    672 	int64_t data;
    673 	bool writable_text = false;
    674 	int64_t hv_rc;
    675 
    676 	for (i = 0; i < dtlb_slot; i++) {
    677 		if (dtlb_store[i].te_va >= data_va) {
    678 			/*
    679 			 * If (for whatever reason) the start of the
    680 			 * writable section is right at the start of
    681 			 * the kernel, we need to map it into the ITLB
    682 			 * nevertheless (and don't make it readonly).
    683 			 */
    684 			if (i == 0 && dtlb_store[i].te_va == data_va)
    685 				writable_text = true;
    686 			else
    687 				continue;
    688 		}
    689 
    690 		data = SUN4V_TSB_DATA(
    691 			0,		/* global */
    692 			PGSZ_4M,	/* 4mb page */
    693 			dtlb_store[i].te_pa,	/* phys.address */
    694 			1,		/* privileged */
    695 			0,		/* write */
    696 			1,		/* cache */
    697 			1,		/* alias */
    698 			1,		/* valid */
    699 			0		/* endianness */
    700 			);
    701 		data |= SUN4V_TLB_CV|SUN4V_TLB_X; /* virt.cache, executable */
    702 		if (!writable_text) {
    703 			hv_rc = hv_mmu_unmap_perm_addr(dtlb_store[i].te_va,
    704 			                               MAP_DTLB);
    705 			if ( hv_rc != H_EOK ) {
    706 				panic("hv_mmu_unmap_perm_addr() failed - "
    707 				      "rc = %ld", hv_rc);
    708 			}
    709 			hv_rc = hv_mmu_map_perm_addr(dtlb_store[i].te_va, data,
    710 			                             MAP_DTLB);
    711 			if ( hv_rc != H_EOK ) {
    712 				panic("hv_mmu_map_perm_addr() failed - "
    713 				      "rc = %ld", hv_rc);
    714 			}
    715 		}
    716 
    717 		itlb_store[itlb_slot] = dtlb_store[i];
    718 		itlb_slot++;
    719 		hv_rc = hv_mmu_map_perm_addr(dtlb_store[i].te_va, data,
    720 		                             MAP_ITLB);
    721 		if ( hv_rc != H_EOK ) {
    722 			panic("hv_mmu_map_perm_addr() failed - rc = %ld", hv_rc);
    723 		}
    724 	}
    725 	if (writable_text)
    726 		printf("WARNING: kernel text mapped writable!\n");
    727 }
    728 #endif
    729 
    730 /*
    731  * Record kernel mappings in bootinfo structure.
    732  */
    733 void
    734 sparc64_bi_add(void)
    735 {
    736 	int i;
    737 	int itlb_size, dtlb_size;
    738 	struct btinfo_count bi_count;
    739 	struct btinfo_tlb *bi_itlb, *bi_dtlb;
    740 
    741 	bi_count.count = itlb_slot;
    742 	bi_add(&bi_count, BTINFO_ITLB_SLOTS, sizeof(bi_count));
    743 	bi_count.count = dtlb_slot;
    744 	bi_add(&bi_count, BTINFO_DTLB_SLOTS, sizeof(bi_count));
    745 
    746 	itlb_size = sizeof(*bi_itlb) + sizeof(struct tlb_entry) * itlb_slot;
    747 	dtlb_size = sizeof(*bi_dtlb) + sizeof(struct tlb_entry) * dtlb_slot;
    748 
    749 	bi_itlb = alloc(itlb_size);
    750 	bi_dtlb = alloc(dtlb_size);
    751 
    752 	if ((bi_itlb == NULL) || (bi_dtlb == NULL)) {
    753 		panic("Out of memory in sparc64_bi_add.\n");
    754 	}
    755 
    756 	for (i = 0; i < itlb_slot; i++) {
    757 		bi_itlb->tlb[i].te_va = itlb_store[i].te_va;
    758 		bi_itlb->tlb[i].te_pa = itlb_store[i].te_pa;
    759 	}
    760 	bi_add(bi_itlb, BTINFO_ITLB, itlb_size);
    761 
    762 	for (i = 0; i < dtlb_slot; i++) {
    763 		bi_dtlb->tlb[i].te_va = dtlb_store[i].te_va;
    764 		bi_dtlb->tlb[i].te_pa = dtlb_store[i].te_pa;
    765 	}
    766 	bi_add(bi_dtlb, BTINFO_DTLB, dtlb_size);
    767 }
    768 
    769 /*
    770  * Choose kernel image mapping strategy:
    771  *
    772  * LOADFILE_NOP_ALLOCATOR	To load kernel image headers
    773  * LOADFILE_OFW_ALLOCATOR	To map the kernel by OpenFirmware means
    774  * LOADFILE_MMU_ALLOCATOR	To use permanent 4MB mappings
    775  */
    776 void
    777 loadfile_set_allocator(int type)
    778 {
    779 	if (type >= (sizeof(memswa) / sizeof(struct memsw))) {
    780 		panic("Bad allocator request.\n");
    781 	}
    782 
    783 	/*
    784 	 * Release all memory claimed by previous allocator and schedule
    785 	 * another allocator for succeeding memory allocation calls.
    786 	 */
    787 	(*memsw->freeall)();
    788 	memsw = &memswa[type];
    789 }
    790