srt0.s revision 1.2 1 1.2 petrov /* $NetBSD: srt0.s,v 1.2 2002/10/30 01:46:09 petrov Exp $ */
2 1.1 mrg
3 1.1 mrg /*
4 1.1 mrg * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5 1.1 mrg * Copyright (C) 1995, 1996 TooLs GmbH.
6 1.1 mrg * All rights reserved.
7 1.1 mrg *
8 1.1 mrg * Redistribution and use in source and binary forms, with or without
9 1.1 mrg * modification, are permitted provided that the following conditions
10 1.1 mrg * are met:
11 1.1 mrg * 1. Redistributions of source code must retain the above copyright
12 1.1 mrg * notice, this list of conditions and the following disclaimer.
13 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 mrg * notice, this list of conditions and the following disclaimer in the
15 1.1 mrg * documentation and/or other materials provided with the distribution.
16 1.1 mrg * 3. All advertising materials mentioning features or use of this software
17 1.1 mrg * must display the following acknowledgement:
18 1.1 mrg * This product includes software developed by TooLs GmbH.
19 1.1 mrg * 4. The name of TooLs GmbH may not be used to endorse or promote products
20 1.1 mrg * derived from this software without specific prior written permission.
21 1.1 mrg *
22 1.1 mrg * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23 1.1 mrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1 mrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1 mrg * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 1.1 mrg * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27 1.1 mrg * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28 1.1 mrg * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 1.1 mrg * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30 1.1 mrg * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31 1.1 mrg * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.1 mrg */
33 1.1 mrg
34 1.1 mrg #include <machine/psl.h>
35 1.1 mrg #include <machine/param.h>
36 1.1 mrg #include <machine/frame.h>
37 1.1 mrg #include <machine/asm.h>
38 1.2 petrov
39 1.2 petrov .register %g2,#ignore
40 1.2 petrov .register %g3,#ignore
41 1.1 mrg
42 1.1 mrg /*
43 1.1 mrg * Globals
44 1.1 mrg */
45 1.1 mrg .globl _esym
46 1.1 mrg .data
47 1.1 mrg _esym: .word 0 /* end of symbol table */
48 1.1 mrg .globl _C_LABEL(romp)
49 1.1 mrg .align 8
50 1.1 mrg _C_LABEL(romp): .xword 0 /* openfirmware entry point */
51 1.1 mrg
52 1.1 mrg /*
53 1.1 mrg * Startup entry
54 1.1 mrg */
55 1.1 mrg .text
56 1.1 mrg .globl _start, _C_LABEL(kernel_text)
57 1.1 mrg _C_LABEL(kernel_text) = _start
58 1.1 mrg _start:
59 1.1 mrg nop ! For some reason this is needed to fixup the text section
60 1.1 mrg
61 1.1 mrg /*
62 1.1 mrg * Step 1: Save rom entry pointer -- NOTE this probably needs to change
63 1.1 mrg */
64 1.1 mrg
65 1.1 mrg mov %o4, %g7 ! save prom vector pointer
66 1.1 mrg set _C_LABEL(romp), %g1
67 1.1 mrg stx %o4, [%g1] ! It's initialized data, I hope
68 1.1 mrg
69 1.1 mrg /*
70 1.1 mrg * Start by creating a stack for ourselves.
71 1.1 mrg */
72 1.1 mrg #ifdef _LP64
73 1.1 mrg /* 64-bit stack */
74 1.1 mrg btst 1, %sp
75 1.1 mrg set CC64FSZ, %g1 ! Frame Size (negative)
76 1.1 mrg bnz 1f
77 1.1 mrg set BIAS, %g2 ! Bias (negative)
78 1.1 mrg andn %sp, 0x0f, %sp ! 16 byte align, per ELF spec.
79 1.1 mrg add %g1, %g2, %g1 ! Frame + Bias
80 1.1 mrg 1:
81 1.1 mrg sub %sp, %g1, %g1
82 1.1 mrg save %g1, %g0, %sp
83 1.1 mrg #else
84 1.1 mrg /* 32-bit stack */
85 1.1 mrg btst 1, %sp
86 1.1 mrg set CC64FSZ, %g1 ! Frame Size (negative)
87 1.1 mrg bz 1f
88 1.1 mrg set BIAS, %g2
89 1.1 mrg sub %g1, %g2, %g1
90 1.1 mrg 1:
91 1.1 mrg sub %sp, %g1, %g1 ! This is so we properly sign-extend things
92 1.1 mrg andn %g1, 0x7, %g1
93 1.1 mrg save %g1, %g0, %sp
94 1.1 mrg #endif
95 1.1 mrg
96 1.1 mrg ! mov %i0, %i4 ! Apparenty we get our CIF in i0
97 1.1 mrg
98 1.1 mrg /*
99 1.1 mrg * Set the psr into a known state:
100 1.1 mrg * Set supervisor mode, interrupt level >= 13, traps enabled
101 1.1 mrg */
102 1.1 mrg wrpr %g0, 0, %pil ! So I lied
103 1.1 mrg wrpr %g0, PSTATE_PRIV+PSTATE_IE, %pstate
104 1.1 mrg
105 1.1 mrg clr %g4 ! Point %g4 to start of data segment
106 1.1 mrg ! only problem is that apparently the
107 1.1 mrg ! start of the data segment is 0
108 1.1 mrg
109 1.1 mrg /*
110 1.1 mrg * XXXXXXXX Need to determine what params are passed
111 1.1 mrg */
112 1.1 mrg call _C_LABEL(setup)
113 1.1 mrg nop
114 1.1 mrg mov %i1, %o1
115 1.1 mrg call _C_LABEL(main)
116 1.1 mrg mov %i2, %o0
117 1.1 mrg call _C_LABEL(exit)
118 1.1 mrg nop
119 1.1 mrg call _C_LABEL(_rtt)
120 1.1 mrg nop
121 1.1 mrg
122 1.1 mrg /*
123 1.1 mrg * void syncicache(void* start, int size)
124 1.1 mrg *
125 1.1 mrg * I$ flush. Really simple. Just flush over the whole range.
126 1.1 mrg */
127 1.1 mrg .align 8
128 1.1 mrg .globl _C_LABEL(syncicache)
129 1.1 mrg _C_LABEL(syncicache):
130 1.1 mrg dec 4, %o1
131 1.1 mrg flush %o0
132 1.1 mrg brgz,a,pt %o1, _C_LABEL(syncicache)
133 1.1 mrg inc 4, %o0
134 1.1 mrg retl
135 1.1 mrg nop
136 1.1 mrg
137 1.1 mrg /*
138 1.1 mrg * openfirmware(cell* param);
139 1.1 mrg *
140 1.1 mrg * OpenFirmware entry point
141 1.1 mrg *
142 1.1 mrg * If we're running in 32-bit mode we need to convert to a 64-bit stack
143 1.1 mrg * and 64-bit cells. The cells we'll allocate off the stack for simplicity.
144 1.1 mrg */
145 1.1 mrg .align 8
146 1.1 mrg .globl _C_LABEL(openfirmware)
147 1.1 mrg .proc 1
148 1.1 mrg FTYPE(openfirmware)
149 1.1 mrg _C_LABEL(openfirmware):
150 1.1 mrg andcc %sp, 1, %g0
151 1.1 mrg bz,pt %icc, 1f
152 1.1 mrg sethi %hi(_C_LABEL(romp)), %o1
153 1.1 mrg
154 1.1 mrg ldx [%o1+%lo(_C_LABEL(romp))], %o4 ! v9 stack, just load the addr and callit
155 1.1 mrg save %sp, -CC64FSZ, %sp
156 1.1 mrg mov %i0, %o0 ! Copy over our parameter
157 1.1 mrg mov %g1, %l1
158 1.1 mrg mov %g2, %l2
159 1.1 mrg mov %g3, %l3
160 1.1 mrg mov %g4, %l4
161 1.1 mrg mov %g5, %l5
162 1.1 mrg mov %g6, %l6
163 1.1 mrg mov %g7, %l7
164 1.1 mrg rdpr %pstate, %l0
165 1.1 mrg jmpl %i4, %o7
166 1.1 mrg wrpr %g0, PSTATE_PROM|PSTATE_IE, %pstate
167 1.1 mrg wrpr %l0, %g0, %pstate
168 1.1 mrg mov %l1, %g1
169 1.1 mrg mov %l2, %g2
170 1.1 mrg mov %l3, %g3
171 1.1 mrg mov %l4, %g4
172 1.1 mrg mov %l5, %g5
173 1.1 mrg mov %l6, %g6
174 1.1 mrg mov %l7, %g7
175 1.1 mrg ret
176 1.1 mrg restore %o0, %g0, %o0
177 1.1 mrg
178 1.1 mrg 1: ! v8 -- need to screw with stack & params
179 1.1 mrg save %sp, -CC64FSZ, %sp ! Get a new 64-bit stack frame
180 1.1 mrg add %sp, -BIAS, %sp
181 1.1 mrg sethi %hi(_C_LABEL(romp)), %o1
182 1.1 mrg rdpr %pstate, %l0
183 1.1 mrg ldx [%o1+%lo(_C_LABEL(romp))], %o1 ! Do the actual call
184 1.1 mrg srl %sp, 0, %sp
185 1.1 mrg mov %i0, %o0
186 1.1 mrg mov %g1, %l1
187 1.1 mrg mov %g2, %l2
188 1.1 mrg mov %g3, %l3
189 1.1 mrg mov %g4, %l4
190 1.1 mrg mov %g5, %l5
191 1.1 mrg mov %g6, %l6
192 1.1 mrg mov %g7, %l7
193 1.1 mrg jmpl %o1, %o7
194 1.1 mrg wrpr %g0, PSTATE_PROM|PSTATE_IE, %pstate ! Enable 64-bit addresses for the prom
195 1.1 mrg wrpr %l0, 0, %pstate
196 1.1 mrg mov %l1, %g1
197 1.1 mrg mov %l2, %g2
198 1.1 mrg mov %l3, %g3
199 1.1 mrg mov %l4, %g4
200 1.1 mrg mov %l5, %g5
201 1.1 mrg mov %l6, %g6
202 1.1 mrg mov %l7, %g7
203 1.1 mrg ret
204 1.1 mrg restore %o0, %g0, %o0
205 1.1 mrg
206 1.1 mrg #if 0
207 1.1 mrg .data
208 1.1 mrg .align 8
209 1.1 mrg bootstack:
210 1.1 mrg #define STACK_SIZE 0x14000
211 1.1 mrg .skip STACK_SIZE
212 1.1 mrg ebootstack: ! end (top) of boot stack
213 1.1 mrg #endif
214