1 1.8 kamil /* $NetBSD: auxioreg.h,v 1.8 2015/07/11 10:32:46 kamil Exp $ */ 2 1.1 mrg 3 1.1 mrg /* 4 1.2 mrg * Copyright (c) 2000 Matthew R. Green 5 1.1 mrg * All rights reserved. 6 1.1 mrg * 7 1.1 mrg * Redistribution and use in source and binary forms, with or without 8 1.1 mrg * modification, are permitted provided that the following conditions 9 1.1 mrg * are met: 10 1.1 mrg * 1. Redistributions of source code must retain the above copyright 11 1.1 mrg * notice, this list of conditions and the following disclaimer. 12 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 mrg * notice, this list of conditions and the following disclaimer in the 14 1.1 mrg * documentation and/or other materials provided with the distribution. 15 1.1 mrg * 16 1.1 mrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.1 mrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.1 mrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.1 mrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.1 mrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.1 mrg * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.1 mrg * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.1 mrg * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.1 mrg * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1 mrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1 mrg * SUCH DAMAGE. 27 1.1 mrg */ 28 1.1 mrg 29 1.1 mrg /* 30 1.1 mrg * The AUXIO registers; their offset in the Ebus2 address space, plus the 31 1.3 mrg * bits for each register. Note that the fdthree (FD), SUNW,CS4231 (AUDIO) 32 1.8 kamil * and power (POWER) devices on the Ebus2 have their AUXIO registers mapped 33 1.3 mrg * into their own "reg" properties, not the "auxio" device's "reg" properties. 34 1.1 mrg */ 35 1.1 mrg #define AUXIO_FD 0x00720000 36 1.1 mrg #define AUXIO_FD_DENSENSE_INPUT 0x0 37 1.1 mrg #define AUXIO_FD_DENSENSE_OUTPUT 0x1 38 1.1 mrg 39 1.1 mrg #define AUXIO_AUDIO 0x00722000 40 1.1 mrg #define AUXIO_AUDIO_POWERDOWN 0x0 41 1.1 mrg 42 1.1 mrg #define AUXIO_POWER 0x00724000 43 1.1 mrg #define AUXIO_POWER_SYSTEM_OFF 0x0 44 1.1 mrg #define AUXIO_POWER_COURTESY_OFF 0x1 45 1.1 mrg 46 1.5 jnemeth #define AUXIO_LED 0x00726000 47 1.5 jnemeth /* XXX: these may be useless on Ebus2 auxio! find out! */ 48 1.5 jnemeth #define AUXIO_LED_LED 0x01 /* front panel LED */ 49 1.5 jnemeth #define AUXIO_LED_FTC 0x02 /* floppy: drives Terminal Count pin */ 50 1.5 jnemeth #define AUXIO_LED_MMUX 0x04 /* Monitor/Mouse MUX; what is it? */ 51 1.5 jnemeth #define AUXIO_LED_LTE 0x08 /* link-test enable */ 52 1.5 jnemeth #define AUXIO_LED_FHD 0x20 /* floppy: high density (unreliable?)*/ 53 1.5 jnemeth #define AUXIO_LED_FLOPPY_MASK (AUXIO_LED_FTC) 54 1.1 mrg 55 1.1 mrg #define AUXIO_PCI 0x00728000 56 1.1 mrg #define AUXIO_PCI_SLOT0 0x0 /* two bits each */ 57 1.1 mrg #define AUXIO_PCI_SLOT1 0x2 58 1.1 mrg #define AUXIO_PCI_SLOT2 0x4 59 1.1 mrg #define AUXIO_PCI_SLOT3 0x6 60 1.1 mrg #define AUXIO_PCI_MODE 0x8 61 1.1 mrg 62 1.1 mrg #define AUXIO_FREQ 0x0072a000 63 1.1 mrg #define AUXIO_FREQ_FREQ0 0x0 64 1.1 mrg #define AUXIO_FREQ_FREQ1 0x1 65 1.1 mrg #define AUXIO_FREQ_FREQ2 0x2 66 1.1 mrg 67 1.1 mrg #define AUXIO_SCSI 0x0072c000 68 1.1 mrg #define AUXIO_SCSI_INT_OSC_EN 0x0 69 1.1 mrg #define AUXIO_SCSI_EXT_OSC_EN 0x1 70 1.1 mrg 71 1.1 mrg #define AUXIO_TEMP 0x0072f000 72 1.1 mrg #define AUXIO_TEMP_SELECT 0x0 73 1.1 mrg #define AUXIO_TEMP_CLOCK 0x1 74 1.1 mrg #define AUXIO_TEMP_ENABLE 0x2 75 1.1 mrg #define AUXIO_TEMP_DATAOUT 0x3 76 1.1 mrg #define AUXIO_TEMP_DATAINT 0x4 77 1.6 jnemeth 78 1.6 jnemeth #define FTC_FLIP \ 79 1.6 jnemeth do { \ 80 1.6 jnemeth auxio_fd_control(AUXIO_LED_FTC); \ 81 1.6 jnemeth auxio_fd_control(0); \ 82 1.6 jnemeth } while (0) 83
Indexes created Mon Sep 29 18:09:42 GMT 2025