ebus.c revision 1.25 1 1.25 eeh /* $NetBSD: ebus.c,v 1.25 2001/09/10 16:17:06 eeh Exp $ */
2 1.1 mrg
3 1.1 mrg /*
4 1.5 mrg * Copyright (c) 1999, 2000 Matthew R. Green
5 1.1 mrg * All rights reserved.
6 1.1 mrg *
7 1.1 mrg * Redistribution and use in source and binary forms, with or without
8 1.1 mrg * modification, are permitted provided that the following conditions
9 1.1 mrg * are met:
10 1.1 mrg * 1. Redistributions of source code must retain the above copyright
11 1.1 mrg * notice, this list of conditions and the following disclaimer.
12 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 mrg * notice, this list of conditions and the following disclaimer in the
14 1.1 mrg * documentation and/or other materials provided with the distribution.
15 1.1 mrg * 3. The name of the author may not be used to endorse or promote products
16 1.1 mrg * derived from this software without specific prior written permission.
17 1.1 mrg *
18 1.1 mrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 1.1 mrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.1 mrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 1.1 mrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.1 mrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 1.1 mrg * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24 1.1 mrg * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25 1.1 mrg * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 1.1 mrg * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 1.1 mrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 1.1 mrg * SUCH DAMAGE.
29 1.1 mrg */
30 1.1 mrg
31 1.8 mrg #include "opt_ddb.h"
32 1.8 mrg
33 1.1 mrg /*
34 1.1 mrg * UltraSPARC 5 and beyond ebus support.
35 1.8 mrg *
36 1.21 mrg * note that this driver is not complete:
37 1.8 mrg * - ebus2 dma code is completely unwritten
38 1.21 mrg * - interrupt establish is written and appears to work
39 1.8 mrg * - bus map code is written and appears to work
40 1.1 mrg */
41 1.1 mrg
42 1.1 mrg #undef DEBUG
43 1.1 mrg #define DEBUG
44 1.1 mrg
45 1.1 mrg #ifdef DEBUG
46 1.8 mrg #define EDB_PROM 0x01
47 1.8 mrg #define EDB_CHILD 0x02
48 1.8 mrg #define EDB_INTRMAP 0x04
49 1.8 mrg #define EDB_BUSMAP 0x08
50 1.8 mrg #define EDB_BUSDMA 0x10
51 1.8 mrg #define EDB_INTR 0x20
52 1.23 eeh int ebus_debug = 0x0;
53 1.1 mrg #define DPRINTF(l, s) do { if (ebus_debug & l) printf s; } while (0)
54 1.1 mrg #else
55 1.1 mrg #define DPRINTF(l, s)
56 1.1 mrg #endif
57 1.1 mrg
58 1.1 mrg #include <sys/param.h>
59 1.1 mrg #include <sys/conf.h>
60 1.1 mrg #include <sys/device.h>
61 1.8 mrg #include <sys/errno.h>
62 1.8 mrg #include <sys/extent.h>
63 1.1 mrg #include <sys/malloc.h>
64 1.1 mrg #include <sys/systm.h>
65 1.8 mrg #include <sys/time.h>
66 1.1 mrg
67 1.1 mrg #define _SPARC_BUS_DMA_PRIVATE
68 1.1 mrg #include <machine/bus.h>
69 1.1 mrg #include <machine/autoconf.h>
70 1.23 eeh #include <machine/openfirm.h>
71 1.1 mrg
72 1.1 mrg #include <dev/pci/pcivar.h>
73 1.1 mrg #include <dev/pci/pcireg.h>
74 1.1 mrg #include <dev/pci/pcidevs.h>
75 1.1 mrg
76 1.8 mrg #include <sparc64/dev/iommureg.h>
77 1.8 mrg #include <sparc64/dev/iommuvar.h>
78 1.8 mrg #include <sparc64/dev/psychoreg.h>
79 1.8 mrg #include <sparc64/dev/psychovar.h>
80 1.1 mrg #include <sparc64/dev/ebusreg.h>
81 1.1 mrg #include <sparc64/dev/ebusvar.h>
82 1.8 mrg #include <sparc64/sparc64/cache.h>
83 1.1 mrg
84 1.1 mrg int ebus_match __P((struct device *, struct cfdata *, void *));
85 1.1 mrg void ebus_attach __P((struct device *, struct device *, void *));
86 1.1 mrg
87 1.1 mrg struct cfattach ebus_ca = {
88 1.11 eeh sizeof(struct ebus_softc), ebus_match, ebus_attach
89 1.1 mrg };
90 1.1 mrg
91 1.1 mrg int ebus_setup_attach_args __P((struct ebus_softc *, int,
92 1.1 mrg struct ebus_attach_args *));
93 1.1 mrg void ebus_destroy_attach_args __P((struct ebus_attach_args *));
94 1.1 mrg int ebus_print __P((void *, const char *));
95 1.3 mrg void ebus_find_ino __P((struct ebus_softc *, struct ebus_attach_args *));
96 1.10 mrg int ebus_find_node __P((struct pci_attach_args *));
97 1.1 mrg
98 1.8 mrg /*
99 1.8 mrg * here are our bus space and bus dma routines.
100 1.8 mrg */
101 1.8 mrg static int ebus_bus_mmap __P((bus_space_tag_t, bus_type_t, bus_addr_t,
102 1.8 mrg int, bus_space_handle_t *));
103 1.8 mrg static int _ebus_bus_map __P((bus_space_tag_t, bus_type_t, bus_addr_t,
104 1.8 mrg bus_size_t, int, vaddr_t,
105 1.8 mrg bus_space_handle_t *));
106 1.15 pk static void *ebus_intr_establish __P((bus_space_tag_t, int, int, int,
107 1.8 mrg int (*) __P((void *)), void *));
108 1.8 mrg
109 1.8 mrg static int ebus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
110 1.8 mrg bus_size_t, struct proc *, int));
111 1.8 mrg static void ebus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
112 1.8 mrg static void ebus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
113 1.8 mrg bus_size_t, int));
114 1.8 mrg int ebus_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t,
115 1.8 mrg bus_dma_segment_t *, int, int *, int));
116 1.8 mrg void ebus_dmamem_free __P((bus_dma_tag_t, bus_dma_segment_t *, int));
117 1.8 mrg int ebus_dmamem_map __P((bus_dma_tag_t, bus_dma_segment_t *, int, size_t,
118 1.8 mrg caddr_t *, int));
119 1.8 mrg void ebus_dmamem_unmap __P((bus_dma_tag_t, caddr_t, size_t));
120 1.8 mrg
121 1.1 mrg int
122 1.1 mrg ebus_match(parent, match, aux)
123 1.1 mrg struct device *parent;
124 1.1 mrg struct cfdata *match;
125 1.1 mrg void *aux;
126 1.1 mrg {
127 1.1 mrg struct pci_attach_args *pa = aux;
128 1.24 eeh char name[10];
129 1.23 eeh int node;
130 1.1 mrg
131 1.23 eeh /* Only attach if there's a PROM node. */
132 1.23 eeh node = PCITAG_NODE(pa->pa_tag);
133 1.23 eeh if (node == -1) return (0);
134 1.23 eeh
135 1.23 eeh /* Match a real ebus */
136 1.24 eeh OF_getprop(node, "name", &name, sizeof(name));
137 1.1 mrg if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
138 1.16 pk PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
139 1.24 eeh PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS &&
140 1.25 eeh strcmp(name, "ebus") == 0)
141 1.25 eeh return (1);
142 1.25 eeh
143 1.25 eeh /* Or a real ebus III */
144 1.25 eeh OF_getprop(node, "name", &name, sizeof(name));
145 1.25 eeh if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
146 1.25 eeh PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
147 1.25 eeh PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUSIII &&
148 1.24 eeh strcmp(name, "ebus") == 0)
149 1.1 mrg return (1);
150 1.1 mrg
151 1.23 eeh /* Or a PCI-ISA bridge XXX I hope this is on-board. */
152 1.23 eeh if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
153 1.23 eeh PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_ISA) {
154 1.23 eeh return (1);
155 1.23 eeh }
156 1.23 eeh
157 1.1 mrg return (0);
158 1.1 mrg }
159 1.1 mrg
160 1.1 mrg /*
161 1.1 mrg * attach an ebus and all it's children. this code is modeled
162 1.1 mrg * after the sbus code which does similar things.
163 1.1 mrg */
164 1.1 mrg void
165 1.1 mrg ebus_attach(parent, self, aux)
166 1.1 mrg struct device *parent, *self;
167 1.1 mrg void *aux;
168 1.1 mrg {
169 1.1 mrg struct ebus_softc *sc = (struct ebus_softc *)self;
170 1.1 mrg struct pci_attach_args *pa = aux;
171 1.1 mrg struct ebus_attach_args eba;
172 1.1 mrg struct ebus_interrupt_map_mask *immp;
173 1.16 pk int node, nmapmask, error;
174 1.1 mrg char devinfo[256];
175 1.1 mrg
176 1.1 mrg printf("\n");
177 1.1 mrg
178 1.1 mrg pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
179 1.1 mrg printf("%s: %s, revision 0x%02x\n", self->dv_xname, devinfo,
180 1.1 mrg PCI_REVISION(pa->pa_class));
181 1.1 mrg
182 1.5 mrg sc->sc_parent = (struct psycho_softc *)parent;
183 1.23 eeh sc->sc_memtag = pa->pa_memt;
184 1.23 eeh sc->sc_iotag = pa->pa_iot;
185 1.1 mrg sc->sc_childbustag = ebus_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE);
186 1.1 mrg sc->sc_dmatag = ebus_alloc_dma_tag(sc, pa->pa_dmat);
187 1.1 mrg
188 1.23 eeh node = PCITAG_NODE(pa->pa_tag);
189 1.23 eeh if (node == -1)
190 1.1 mrg panic("could not find ebus node");
191 1.1 mrg
192 1.1 mrg sc->sc_node = node;
193 1.1 mrg
194 1.1 mrg /*
195 1.1 mrg * fill in our softc with information from the prom
196 1.1 mrg */
197 1.3 mrg sc->sc_intmap = NULL;
198 1.3 mrg sc->sc_range = NULL;
199 1.16 pk error = getprop(node, "interrupt-map",
200 1.16 pk sizeof(struct ebus_interrupt_map),
201 1.16 pk &sc->sc_nintmap, (void **)&sc->sc_intmap);
202 1.16 pk switch (error) {
203 1.16 pk case 0:
204 1.16 pk immp = &sc->sc_intmapmask;
205 1.16 pk error = getprop(node, "interrupt-map-mask",
206 1.16 pk sizeof(struct ebus_interrupt_map_mask), &nmapmask,
207 1.16 pk (void **)&immp);
208 1.16 pk if (error)
209 1.16 pk panic("could not get ebus interrupt-map-mask");
210 1.16 pk if (nmapmask != 1)
211 1.16 pk panic("ebus interrupt-map-mask is broken");
212 1.16 pk break;
213 1.16 pk case ENOENT:
214 1.16 pk break;
215 1.16 pk default:
216 1.16 pk panic("ebus interrupt-map: error %d", error);
217 1.16 pk break;
218 1.16 pk }
219 1.1 mrg
220 1.16 pk error = getprop(node, "ranges", sizeof(struct ebus_ranges),
221 1.1 mrg &sc->sc_nrange, (void **)&sc->sc_range);
222 1.16 pk if (error)
223 1.16 pk panic("ebus ranges: error %d", error);
224 1.1 mrg
225 1.1 mrg /*
226 1.1 mrg * now attach all our children
227 1.1 mrg */
228 1.1 mrg DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node));
229 1.1 mrg for (node = firstchild(node); node; node = nextsibling(node)) {
230 1.1 mrg char *name = getpropstring(node, "name");
231 1.1 mrg
232 1.1 mrg if (ebus_setup_attach_args(sc, node, &eba) != 0) {
233 1.1 mrg printf("ebus_attach: %s: incomplete\n", name);
234 1.1 mrg continue;
235 1.6 mrg } else {
236 1.21 mrg DPRINTF(EDB_CHILD, ("- found child `%s', attaching\n",
237 1.21 mrg eba.ea_name));
238 1.6 mrg (void)config_found(self, &eba, ebus_print);
239 1.1 mrg }
240 1.1 mrg ebus_destroy_attach_args(&eba);
241 1.1 mrg }
242 1.1 mrg }
243 1.1 mrg
244 1.1 mrg int
245 1.1 mrg ebus_setup_attach_args(sc, node, ea)
246 1.1 mrg struct ebus_softc *sc;
247 1.1 mrg int node;
248 1.1 mrg struct ebus_attach_args *ea;
249 1.1 mrg {
250 1.1 mrg int n, rv;
251 1.1 mrg
252 1.1 mrg bzero(ea, sizeof(struct ebus_attach_args));
253 1.1 mrg rv = getprop(node, "name", 1, &n, (void **)&ea->ea_name);
254 1.1 mrg if (rv != 0)
255 1.1 mrg return (rv);
256 1.1 mrg ea->ea_name[n] = '\0';
257 1.1 mrg
258 1.1 mrg ea->ea_node = node;
259 1.1 mrg ea->ea_bustag = sc->sc_childbustag;
260 1.1 mrg ea->ea_dmatag = sc->sc_dmatag;
261 1.1 mrg
262 1.1 mrg rv = getprop(node, "reg", sizeof(struct ebus_regs), &ea->ea_nregs,
263 1.1 mrg (void **)&ea->ea_regs);
264 1.1 mrg if (rv)
265 1.1 mrg return (rv);
266 1.1 mrg
267 1.7 mrg rv = getprop(node, "address", sizeof(u_int32_t), &ea->ea_nvaddrs,
268 1.1 mrg (void **)&ea->ea_vaddrs);
269 1.1 mrg if (rv != ENOENT) {
270 1.1 mrg if (rv)
271 1.1 mrg return (rv);
272 1.1 mrg
273 1.7 mrg if (ea->ea_nregs != ea->ea_nvaddrs)
274 1.1 mrg printf("ebus loses: device %s: %d regs and %d addrs\n",
275 1.7 mrg ea->ea_name, ea->ea_nregs, ea->ea_nvaddrs);
276 1.3 mrg } else
277 1.7 mrg ea->ea_nvaddrs = 0;
278 1.1 mrg
279 1.3 mrg if (getprop(node, "interrupts", sizeof(u_int32_t), &ea->ea_nintrs,
280 1.3 mrg (void **)&ea->ea_intrs))
281 1.3 mrg ea->ea_nintrs = 0;
282 1.16 pk else
283 1.3 mrg ebus_find_ino(sc, ea);
284 1.1 mrg
285 1.1 mrg return (0);
286 1.1 mrg }
287 1.1 mrg
288 1.1 mrg void
289 1.1 mrg ebus_destroy_attach_args(ea)
290 1.1 mrg struct ebus_attach_args *ea;
291 1.1 mrg {
292 1.1 mrg
293 1.1 mrg if (ea->ea_name)
294 1.1 mrg free((void *)ea->ea_name, M_DEVBUF);
295 1.1 mrg if (ea->ea_regs)
296 1.1 mrg free((void *)ea->ea_regs, M_DEVBUF);
297 1.1 mrg if (ea->ea_intrs)
298 1.1 mrg free((void *)ea->ea_intrs, M_DEVBUF);
299 1.1 mrg if (ea->ea_vaddrs)
300 1.1 mrg free((void *)ea->ea_vaddrs, M_DEVBUF);
301 1.1 mrg }
302 1.1 mrg
303 1.1 mrg int
304 1.1 mrg ebus_print(aux, p)
305 1.1 mrg void *aux;
306 1.1 mrg const char *p;
307 1.1 mrg {
308 1.1 mrg struct ebus_attach_args *ea = aux;
309 1.4 mrg int i;
310 1.1 mrg
311 1.1 mrg if (p)
312 1.1 mrg printf("%s at %s", ea->ea_name, p);
313 1.4 mrg for (i = 0; i < ea->ea_nregs; i++)
314 1.21 mrg printf("%s %x-%x", i == 0 ? " addr" : ",",
315 1.21 mrg ea->ea_regs[i].lo,
316 1.4 mrg ea->ea_regs[i].lo + ea->ea_regs[i].size - 1);
317 1.4 mrg for (i = 0; i < ea->ea_nintrs; i++)
318 1.4 mrg printf(" ipl %d", ea->ea_intrs[i]);
319 1.1 mrg return (UNCONF);
320 1.3 mrg }
321 1.3 mrg
322 1.23 eeh
323 1.3 mrg /*
324 1.3 mrg * find the INO values for each interrupt and fill them in.
325 1.3 mrg *
326 1.3 mrg * for each "reg" property of this device, mask it's hi and lo
327 1.3 mrg * values with the "interrupt-map-mask"'s hi/lo values, and also
328 1.3 mrg * mask the interrupt number with the interrupt mask. search the
329 1.3 mrg * "interrupt-map" list for matching values of hi, lo and interrupt
330 1.3 mrg * to give the INO for this interrupt.
331 1.3 mrg */
332 1.3 mrg void
333 1.3 mrg ebus_find_ino(sc, ea)
334 1.3 mrg struct ebus_softc *sc;
335 1.3 mrg struct ebus_attach_args *ea;
336 1.3 mrg {
337 1.3 mrg u_int32_t hi, lo, intr;
338 1.3 mrg int i, j, k;
339 1.3 mrg
340 1.16 pk if (sc->sc_nintmap == 0) {
341 1.23 eeh for (i = 0; i < ea->ea_nintrs; i++) {
342 1.23 eeh OF_mapintr(ea->ea_node, &ea->ea_intrs[i],
343 1.23 eeh sizeof(ea->ea_intrs[0]),
344 1.23 eeh sizeof(ea->ea_intrs[0]));
345 1.23 eeh }
346 1.16 pk return;
347 1.16 pk }
348 1.16 pk
349 1.21 mrg DPRINTF(EDB_INTRMAP,
350 1.21 mrg ("ebus_find_ino: searching %d interrupts", ea->ea_nintrs));
351 1.16 pk
352 1.3 mrg for (j = 0; j < ea->ea_nintrs; j++) {
353 1.16 pk
354 1.3 mrg intr = ea->ea_intrs[j] & sc->sc_intmapmask.intr;
355 1.3 mrg
356 1.21 mrg DPRINTF(EDB_INTRMAP,
357 1.21 mrg ("; intr %x masked to %x", ea->ea_intrs[j], intr));
358 1.3 mrg for (i = 0; i < ea->ea_nregs; i++) {
359 1.3 mrg hi = ea->ea_regs[i].hi & sc->sc_intmapmask.hi;
360 1.3 mrg lo = ea->ea_regs[i].lo & sc->sc_intmapmask.lo;
361 1.3 mrg
362 1.21 mrg DPRINTF(EDB_INTRMAP,
363 1.21 mrg ("; reg hi.lo %08x.%08x masked to %08x.%08x",
364 1.21 mrg ea->ea_regs[i].hi, ea->ea_regs[i].lo, hi, lo));
365 1.3 mrg for (k = 0; k < sc->sc_nintmap; k++) {
366 1.21 mrg DPRINTF(EDB_INTRMAP,
367 1.21 mrg ("; checking hi.lo %08x.%08x intr %x",
368 1.21 mrg sc->sc_intmap[k].hi, sc->sc_intmap[k].lo,
369 1.21 mrg sc->sc_intmap[k].intr));
370 1.3 mrg if (hi == sc->sc_intmap[k].hi &&
371 1.3 mrg lo == sc->sc_intmap[k].lo &&
372 1.3 mrg intr == sc->sc_intmap[k].intr) {
373 1.16 pk ea->ea_intrs[j] =
374 1.21 mrg sc->sc_intmap[k].cintr;
375 1.21 mrg DPRINTF(EDB_INTRMAP,
376 1.21 mrg ("; FOUND IT! changing to %d\n",
377 1.21 mrg sc->sc_intmap[k].cintr));
378 1.3 mrg goto next_intr;
379 1.3 mrg }
380 1.3 mrg }
381 1.3 mrg }
382 1.22 mrg next_intr:;
383 1.3 mrg }
384 1.1 mrg }
385 1.1 mrg
386 1.8 mrg
387 1.8 mrg /*
388 1.8 mrg * bus space and bus dma below here
389 1.8 mrg */
390 1.8 mrg bus_space_tag_t
391 1.8 mrg ebus_alloc_bus_tag(sc, type)
392 1.8 mrg struct ebus_softc *sc;
393 1.8 mrg int type;
394 1.8 mrg {
395 1.8 mrg bus_space_tag_t bt;
396 1.8 mrg
397 1.8 mrg bt = (bus_space_tag_t)
398 1.8 mrg malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT);
399 1.8 mrg if (bt == NULL)
400 1.8 mrg panic("could not allocate ebus bus tag");
401 1.8 mrg
402 1.8 mrg bzero(bt, sizeof *bt);
403 1.8 mrg bt->cookie = sc;
404 1.23 eeh bt->parent = sc->sc_memtag;
405 1.8 mrg bt->type = type;
406 1.8 mrg bt->sparc_bus_map = _ebus_bus_map;
407 1.8 mrg bt->sparc_bus_mmap = ebus_bus_mmap;
408 1.8 mrg bt->sparc_intr_establish = ebus_intr_establish;
409 1.8 mrg return (bt);
410 1.8 mrg }
411 1.8 mrg
412 1.8 mrg /* XXX? */
413 1.8 mrg bus_dma_tag_t
414 1.8 mrg ebus_alloc_dma_tag(sc, pdt)
415 1.8 mrg struct ebus_softc *sc;
416 1.8 mrg bus_dma_tag_t pdt;
417 1.8 mrg {
418 1.8 mrg bus_dma_tag_t dt;
419 1.8 mrg
420 1.8 mrg dt = (bus_dma_tag_t)
421 1.8 mrg malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT);
422 1.8 mrg if (dt == NULL)
423 1.8 mrg panic("could not allocate ebus dma tag");
424 1.8 mrg
425 1.8 mrg bzero(dt, sizeof *dt);
426 1.8 mrg dt->_cookie = sc;
427 1.8 mrg dt->_parent = pdt;
428 1.8 mrg #define PCOPY(x) dt->x = pdt->x
429 1.8 mrg PCOPY(_dmamap_create);
430 1.8 mrg PCOPY(_dmamap_destroy);
431 1.8 mrg dt->_dmamap_load = ebus_dmamap_load;
432 1.8 mrg PCOPY(_dmamap_load_mbuf);
433 1.8 mrg PCOPY(_dmamap_load_uio);
434 1.8 mrg PCOPY(_dmamap_load_raw);
435 1.8 mrg dt->_dmamap_unload = ebus_dmamap_unload;
436 1.8 mrg dt->_dmamap_sync = ebus_dmamap_sync;
437 1.8 mrg dt->_dmamem_alloc = ebus_dmamem_alloc;
438 1.8 mrg dt->_dmamem_free = ebus_dmamem_free;
439 1.8 mrg dt->_dmamem_map = ebus_dmamem_map;
440 1.8 mrg dt->_dmamem_unmap = ebus_dmamem_unmap;
441 1.8 mrg PCOPY(_dmamem_mmap);
442 1.8 mrg #undef PCOPY
443 1.8 mrg return (dt);
444 1.8 mrg }
445 1.8 mrg
446 1.8 mrg /*
447 1.8 mrg * bus space support. <sparc64/dev/psychoreg.h> has a discussion
448 1.8 mrg * about PCI physical addresses, which also applies to ebus.
449 1.8 mrg */
450 1.8 mrg static int
451 1.8 mrg _ebus_bus_map(t, btype, offset, size, flags, vaddr, hp)
452 1.8 mrg bus_space_tag_t t;
453 1.8 mrg bus_type_t btype;
454 1.8 mrg bus_addr_t offset;
455 1.8 mrg bus_size_t size;
456 1.8 mrg int flags;
457 1.8 mrg vaddr_t vaddr;
458 1.8 mrg bus_space_handle_t *hp;
459 1.8 mrg {
460 1.8 mrg struct ebus_softc *sc = t->cookie;
461 1.8 mrg bus_addr_t hi, lo;
462 1.23 eeh int i, ss;
463 1.8 mrg
464 1.21 mrg DPRINTF(EDB_BUSMAP,
465 1.21 mrg ("\n_ebus_bus_map: type %d off %016llx sz %x flags %d va %p",
466 1.21 mrg (int)t->type, (unsigned long long)offset, (int)size, (int)flags,
467 1.21 mrg (void *)vaddr));
468 1.8 mrg
469 1.8 mrg hi = offset >> 32UL;
470 1.8 mrg lo = offset & 0xffffffff;
471 1.8 mrg DPRINTF(EDB_BUSMAP, (" (hi %08x lo %08x)", (u_int)hi, (u_int)lo));
472 1.8 mrg for (i = 0; i < sc->sc_nrange; i++) {
473 1.8 mrg bus_addr_t pciaddr;
474 1.8 mrg
475 1.8 mrg if (hi != sc->sc_range[i].child_hi)
476 1.8 mrg continue;
477 1.8 mrg if (lo < sc->sc_range[i].child_lo ||
478 1.21 mrg (lo + size) >
479 1.21 mrg (sc->sc_range[i].child_lo + sc->sc_range[i].size))
480 1.8 mrg continue;
481 1.8 mrg
482 1.23 eeh /* Isolate address space and find the right tag */
483 1.23 eeh ss = (sc->sc_range[i].phys_hi>>24)&3;
484 1.23 eeh switch (ss) {
485 1.23 eeh case 1: /* I/O space */
486 1.23 eeh t = sc->sc_iotag;
487 1.23 eeh break;
488 1.23 eeh case 2: /* Memory space */
489 1.23 eeh t = sc->sc_memtag;
490 1.23 eeh break;
491 1.23 eeh case 0: /* Config space */
492 1.23 eeh case 3: /* 64-bit Memory space */
493 1.23 eeh default: /* WTF? */
494 1.23 eeh /* We don't handle these */
495 1.23 eeh panic("_ebus_bus_map: illegal space %x", ss);
496 1.23 eeh break;
497 1.23 eeh }
498 1.8 mrg pciaddr = ((bus_addr_t)sc->sc_range[i].phys_mid << 32UL) |
499 1.8 mrg sc->sc_range[i].phys_lo;
500 1.8 mrg pciaddr += lo;
501 1.21 mrg DPRINTF(EDB_BUSMAP,
502 1.23 eeh ("\n_ebus_bus_map: mapping space %x paddr offset %qx pciaddr %qx\n",
503 1.23 eeh ss, (unsigned long long)offset, (unsigned long long)pciaddr));
504 1.8 mrg /* pass it onto the psycho */
505 1.23 eeh return (bus_space_map2(t, sc->sc_range[i].phys_hi,
506 1.23 eeh pciaddr, size, flags, vaddr, hp));
507 1.8 mrg }
508 1.8 mrg DPRINTF(EDB_BUSMAP, (": FAILED\n"));
509 1.8 mrg return (EINVAL);
510 1.8 mrg }
511 1.8 mrg
512 1.8 mrg static int
513 1.8 mrg ebus_bus_mmap(t, btype, paddr, flags, hp)
514 1.8 mrg bus_space_tag_t t;
515 1.8 mrg bus_type_t btype;
516 1.8 mrg bus_addr_t paddr;
517 1.8 mrg int flags;
518 1.8 mrg bus_space_handle_t *hp;
519 1.8 mrg {
520 1.8 mrg bus_addr_t offset = paddr;
521 1.8 mrg struct ebus_softc *sc = t->cookie;
522 1.8 mrg int i;
523 1.8 mrg
524 1.8 mrg for (i = 0; i < sc->sc_nrange; i++) {
525 1.8 mrg bus_addr_t paddr = ((bus_addr_t)sc->sc_range[i].child_hi << 32) |
526 1.8 mrg sc->sc_range[i].child_lo;
527 1.8 mrg
528 1.8 mrg if (offset != paddr)
529 1.8 mrg continue;
530 1.8 mrg
531 1.21 mrg DPRINTF(EDB_BUSMAP, ("\n_ebus_bus_mmap: mapping paddr %qx\n",
532 1.21 mrg (unsigned long long)paddr));
533 1.23 eeh return (bus_space_mmap(sc->sc_memtag, 0, paddr,
534 1.8 mrg flags, hp));
535 1.8 mrg }
536 1.8 mrg
537 1.8 mrg return (-1);
538 1.8 mrg }
539 1.8 mrg
540 1.8 mrg /*
541 1.8 mrg * install an interrupt handler for a PCI device
542 1.8 mrg */
543 1.8 mrg void *
544 1.15 pk ebus_intr_establish(t, pri, level, flags, handler, arg)
545 1.8 mrg bus_space_tag_t t;
546 1.15 pk int pri;
547 1.8 mrg int level;
548 1.8 mrg int flags;
549 1.8 mrg int (*handler) __P((void *));
550 1.8 mrg void *arg;
551 1.8 mrg {
552 1.15 pk return (bus_intr_establish(t->parent, pri, level, flags, handler, arg));
553 1.8 mrg }
554 1.8 mrg
555 1.8 mrg /*
556 1.8 mrg * bus dma support
557 1.8 mrg */
558 1.8 mrg int
559 1.8 mrg ebus_dmamap_load(t, map, buf, buflen, p, flags)
560 1.8 mrg bus_dma_tag_t t;
561 1.8 mrg bus_dmamap_t map;
562 1.8 mrg void *buf;
563 1.8 mrg bus_size_t buflen;
564 1.8 mrg struct proc *p;
565 1.8 mrg int flags;
566 1.8 mrg {
567 1.8 mrg struct ebus_softc *sc = t->_cookie;
568 1.8 mrg
569 1.17 mrg return (iommu_dvmamap_load(t, sc->sc_parent->sc_is, map, buf, buflen,
570 1.8 mrg p, flags));
571 1.8 mrg }
572 1.8 mrg
573 1.8 mrg void
574 1.8 mrg ebus_dmamap_unload(t, map)
575 1.8 mrg bus_dma_tag_t t;
576 1.8 mrg bus_dmamap_t map;
577 1.8 mrg {
578 1.8 mrg struct ebus_softc *sc = t->_cookie;
579 1.8 mrg
580 1.17 mrg iommu_dvmamap_unload(t, sc->sc_parent->sc_is, map);
581 1.8 mrg }
582 1.8 mrg
583 1.8 mrg void
584 1.8 mrg ebus_dmamap_sync(t, map, offset, len, ops)
585 1.8 mrg bus_dma_tag_t t;
586 1.8 mrg bus_dmamap_t map;
587 1.8 mrg bus_addr_t offset;
588 1.8 mrg bus_size_t len;
589 1.8 mrg int ops;
590 1.8 mrg {
591 1.8 mrg struct ebus_softc *sc = t->_cookie;
592 1.8 mrg
593 1.17 mrg iommu_dvmamap_sync(t, sc->sc_parent->sc_is, map, offset, len, ops);
594 1.8 mrg bus_dmamap_sync(t->_parent, map, offset, len, ops);
595 1.8 mrg }
596 1.8 mrg
597 1.8 mrg int
598 1.8 mrg ebus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
599 1.8 mrg bus_dma_tag_t t;
600 1.8 mrg bus_size_t size;
601 1.8 mrg bus_size_t alignment;
602 1.8 mrg bus_size_t boundary;
603 1.8 mrg bus_dma_segment_t *segs;
604 1.8 mrg int nsegs;
605 1.8 mrg int *rsegs;
606 1.8 mrg int flags;
607 1.8 mrg {
608 1.8 mrg struct ebus_softc *sc = t->_cookie;
609 1.8 mrg
610 1.17 mrg return (iommu_dvmamem_alloc(t, sc->sc_parent->sc_is, size, alignment,
611 1.8 mrg boundary, segs, nsegs, rsegs, flags));
612 1.8 mrg }
613 1.8 mrg
614 1.8 mrg void
615 1.8 mrg ebus_dmamem_free(t, segs, nsegs)
616 1.8 mrg bus_dma_tag_t t;
617 1.8 mrg bus_dma_segment_t *segs;
618 1.8 mrg int nsegs;
619 1.8 mrg {
620 1.8 mrg struct ebus_softc *sc = t->_cookie;
621 1.8 mrg
622 1.17 mrg iommu_dvmamem_free(t, sc->sc_parent->sc_is, segs, nsegs);
623 1.8 mrg }
624 1.8 mrg
625 1.8 mrg int
626 1.8 mrg ebus_dmamem_map(t, segs, nsegs, size, kvap, flags)
627 1.8 mrg bus_dma_tag_t t;
628 1.8 mrg bus_dma_segment_t *segs;
629 1.8 mrg int nsegs;
630 1.8 mrg size_t size;
631 1.8 mrg caddr_t *kvap;
632 1.8 mrg int flags;
633 1.8 mrg {
634 1.8 mrg struct ebus_softc *sc = t->_cookie;
635 1.8 mrg
636 1.17 mrg return (iommu_dvmamem_map(t, sc->sc_parent->sc_is, segs, nsegs,
637 1.8 mrg size, kvap, flags));
638 1.8 mrg }
639 1.8 mrg
640 1.8 mrg void
641 1.8 mrg ebus_dmamem_unmap(t, kva, size)
642 1.8 mrg bus_dma_tag_t t;
643 1.8 mrg caddr_t kva;
644 1.8 mrg size_t size;
645 1.8 mrg {
646 1.8 mrg struct ebus_softc *sc = t->_cookie;
647 1.8 mrg
648 1.17 mrg iommu_dvmamem_unmap(t, sc->sc_parent->sc_is, kva, size);
649 1.1 mrg }
650