ebus.c revision 1.28 1 1.28 eeh /* $NetBSD: ebus.c,v 1.28 2001/09/26 20:53:10 eeh Exp $ */
2 1.1 mrg
3 1.1 mrg /*
4 1.5 mrg * Copyright (c) 1999, 2000 Matthew R. Green
5 1.1 mrg * All rights reserved.
6 1.1 mrg *
7 1.1 mrg * Redistribution and use in source and binary forms, with or without
8 1.1 mrg * modification, are permitted provided that the following conditions
9 1.1 mrg * are met:
10 1.1 mrg * 1. Redistributions of source code must retain the above copyright
11 1.1 mrg * notice, this list of conditions and the following disclaimer.
12 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 mrg * notice, this list of conditions and the following disclaimer in the
14 1.1 mrg * documentation and/or other materials provided with the distribution.
15 1.1 mrg * 3. The name of the author may not be used to endorse or promote products
16 1.1 mrg * derived from this software without specific prior written permission.
17 1.1 mrg *
18 1.1 mrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 1.1 mrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.1 mrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 1.1 mrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.1 mrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 1.1 mrg * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24 1.1 mrg * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25 1.1 mrg * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 1.1 mrg * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 1.1 mrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 1.1 mrg * SUCH DAMAGE.
29 1.1 mrg */
30 1.1 mrg
31 1.8 mrg #include "opt_ddb.h"
32 1.8 mrg
33 1.1 mrg /*
34 1.1 mrg * UltraSPARC 5 and beyond ebus support.
35 1.8 mrg *
36 1.21 mrg * note that this driver is not complete:
37 1.8 mrg * - ebus2 dma code is completely unwritten
38 1.21 mrg * - interrupt establish is written and appears to work
39 1.8 mrg * - bus map code is written and appears to work
40 1.1 mrg */
41 1.1 mrg
42 1.1 mrg #undef DEBUG
43 1.1 mrg #define DEBUG
44 1.1 mrg
45 1.1 mrg #ifdef DEBUG
46 1.8 mrg #define EDB_PROM 0x01
47 1.8 mrg #define EDB_CHILD 0x02
48 1.8 mrg #define EDB_INTRMAP 0x04
49 1.8 mrg #define EDB_BUSMAP 0x08
50 1.8 mrg #define EDB_BUSDMA 0x10
51 1.8 mrg #define EDB_INTR 0x20
52 1.23 eeh int ebus_debug = 0x0;
53 1.1 mrg #define DPRINTF(l, s) do { if (ebus_debug & l) printf s; } while (0)
54 1.1 mrg #else
55 1.1 mrg #define DPRINTF(l, s)
56 1.1 mrg #endif
57 1.1 mrg
58 1.1 mrg #include <sys/param.h>
59 1.1 mrg #include <sys/conf.h>
60 1.1 mrg #include <sys/device.h>
61 1.8 mrg #include <sys/errno.h>
62 1.8 mrg #include <sys/extent.h>
63 1.1 mrg #include <sys/malloc.h>
64 1.1 mrg #include <sys/systm.h>
65 1.8 mrg #include <sys/time.h>
66 1.1 mrg
67 1.1 mrg #define _SPARC_BUS_DMA_PRIVATE
68 1.1 mrg #include <machine/bus.h>
69 1.1 mrg #include <machine/autoconf.h>
70 1.23 eeh #include <machine/openfirm.h>
71 1.1 mrg
72 1.1 mrg #include <dev/pci/pcivar.h>
73 1.1 mrg #include <dev/pci/pcireg.h>
74 1.1 mrg #include <dev/pci/pcidevs.h>
75 1.1 mrg
76 1.8 mrg #include <sparc64/dev/iommureg.h>
77 1.8 mrg #include <sparc64/dev/iommuvar.h>
78 1.8 mrg #include <sparc64/dev/psychoreg.h>
79 1.8 mrg #include <sparc64/dev/psychovar.h>
80 1.1 mrg #include <sparc64/dev/ebusreg.h>
81 1.1 mrg #include <sparc64/dev/ebusvar.h>
82 1.8 mrg #include <sparc64/sparc64/cache.h>
83 1.1 mrg
84 1.1 mrg int ebus_match __P((struct device *, struct cfdata *, void *));
85 1.1 mrg void ebus_attach __P((struct device *, struct device *, void *));
86 1.1 mrg
87 1.1 mrg struct cfattach ebus_ca = {
88 1.11 eeh sizeof(struct ebus_softc), ebus_match, ebus_attach
89 1.1 mrg };
90 1.1 mrg
91 1.1 mrg int ebus_setup_attach_args __P((struct ebus_softc *, int,
92 1.1 mrg struct ebus_attach_args *));
93 1.1 mrg void ebus_destroy_attach_args __P((struct ebus_attach_args *));
94 1.1 mrg int ebus_print __P((void *, const char *));
95 1.3 mrg void ebus_find_ino __P((struct ebus_softc *, struct ebus_attach_args *));
96 1.10 mrg int ebus_find_node __P((struct pci_attach_args *));
97 1.1 mrg
98 1.8 mrg /*
99 1.8 mrg * here are our bus space and bus dma routines.
100 1.8 mrg */
101 1.27 eeh static paddr_t ebus_bus_mmap __P((bus_space_tag_t, bus_addr_t, off_t, int, int));
102 1.8 mrg static int _ebus_bus_map __P((bus_space_tag_t, bus_type_t, bus_addr_t,
103 1.8 mrg bus_size_t, int, vaddr_t,
104 1.8 mrg bus_space_handle_t *));
105 1.15 pk static void *ebus_intr_establish __P((bus_space_tag_t, int, int, int,
106 1.8 mrg int (*) __P((void *)), void *));
107 1.8 mrg
108 1.8 mrg static int ebus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
109 1.8 mrg bus_size_t, struct proc *, int));
110 1.8 mrg static void ebus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
111 1.8 mrg static void ebus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
112 1.8 mrg bus_size_t, int));
113 1.8 mrg int ebus_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t,
114 1.8 mrg bus_dma_segment_t *, int, int *, int));
115 1.8 mrg void ebus_dmamem_free __P((bus_dma_tag_t, bus_dma_segment_t *, int));
116 1.8 mrg int ebus_dmamem_map __P((bus_dma_tag_t, bus_dma_segment_t *, int, size_t,
117 1.8 mrg caddr_t *, int));
118 1.8 mrg void ebus_dmamem_unmap __P((bus_dma_tag_t, caddr_t, size_t));
119 1.8 mrg
120 1.1 mrg int
121 1.1 mrg ebus_match(parent, match, aux)
122 1.1 mrg struct device *parent;
123 1.1 mrg struct cfdata *match;
124 1.1 mrg void *aux;
125 1.1 mrg {
126 1.1 mrg struct pci_attach_args *pa = aux;
127 1.24 eeh char name[10];
128 1.23 eeh int node;
129 1.1 mrg
130 1.23 eeh /* Only attach if there's a PROM node. */
131 1.23 eeh node = PCITAG_NODE(pa->pa_tag);
132 1.23 eeh if (node == -1) return (0);
133 1.23 eeh
134 1.23 eeh /* Match a real ebus */
135 1.24 eeh OF_getprop(node, "name", &name, sizeof(name));
136 1.1 mrg if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
137 1.16 pk PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
138 1.24 eeh PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS &&
139 1.25 eeh strcmp(name, "ebus") == 0)
140 1.25 eeh return (1);
141 1.25 eeh
142 1.25 eeh /* Or a real ebus III */
143 1.25 eeh if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
144 1.25 eeh PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
145 1.25 eeh PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUSIII &&
146 1.24 eeh strcmp(name, "ebus") == 0)
147 1.1 mrg return (1);
148 1.1 mrg
149 1.23 eeh /* Or a PCI-ISA bridge XXX I hope this is on-board. */
150 1.23 eeh if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
151 1.23 eeh PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_ISA) {
152 1.23 eeh return (1);
153 1.23 eeh }
154 1.23 eeh
155 1.1 mrg return (0);
156 1.1 mrg }
157 1.1 mrg
158 1.1 mrg /*
159 1.1 mrg * attach an ebus and all it's children. this code is modeled
160 1.1 mrg * after the sbus code which does similar things.
161 1.1 mrg */
162 1.1 mrg void
163 1.1 mrg ebus_attach(parent, self, aux)
164 1.1 mrg struct device *parent, *self;
165 1.1 mrg void *aux;
166 1.1 mrg {
167 1.1 mrg struct ebus_softc *sc = (struct ebus_softc *)self;
168 1.1 mrg struct pci_attach_args *pa = aux;
169 1.1 mrg struct ebus_attach_args eba;
170 1.1 mrg struct ebus_interrupt_map_mask *immp;
171 1.16 pk int node, nmapmask, error;
172 1.1 mrg char devinfo[256];
173 1.1 mrg
174 1.1 mrg printf("\n");
175 1.1 mrg
176 1.1 mrg pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
177 1.1 mrg printf("%s: %s, revision 0x%02x\n", self->dv_xname, devinfo,
178 1.1 mrg PCI_REVISION(pa->pa_class));
179 1.1 mrg
180 1.5 mrg sc->sc_parent = (struct psycho_softc *)parent;
181 1.23 eeh sc->sc_memtag = pa->pa_memt;
182 1.23 eeh sc->sc_iotag = pa->pa_iot;
183 1.1 mrg sc->sc_childbustag = ebus_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE);
184 1.1 mrg sc->sc_dmatag = ebus_alloc_dma_tag(sc, pa->pa_dmat);
185 1.1 mrg
186 1.23 eeh node = PCITAG_NODE(pa->pa_tag);
187 1.23 eeh if (node == -1)
188 1.1 mrg panic("could not find ebus node");
189 1.1 mrg
190 1.1 mrg sc->sc_node = node;
191 1.1 mrg
192 1.1 mrg /*
193 1.1 mrg * fill in our softc with information from the prom
194 1.1 mrg */
195 1.3 mrg sc->sc_intmap = NULL;
196 1.3 mrg sc->sc_range = NULL;
197 1.28 eeh error = PROM_getprop(node, "interrupt-map",
198 1.16 pk sizeof(struct ebus_interrupt_map),
199 1.16 pk &sc->sc_nintmap, (void **)&sc->sc_intmap);
200 1.16 pk switch (error) {
201 1.16 pk case 0:
202 1.16 pk immp = &sc->sc_intmapmask;
203 1.28 eeh error = PROM_getprop(node, "interrupt-map-mask",
204 1.16 pk sizeof(struct ebus_interrupt_map_mask), &nmapmask,
205 1.16 pk (void **)&immp);
206 1.16 pk if (error)
207 1.16 pk panic("could not get ebus interrupt-map-mask");
208 1.16 pk if (nmapmask != 1)
209 1.16 pk panic("ebus interrupt-map-mask is broken");
210 1.16 pk break;
211 1.16 pk case ENOENT:
212 1.16 pk break;
213 1.16 pk default:
214 1.16 pk panic("ebus interrupt-map: error %d", error);
215 1.16 pk break;
216 1.16 pk }
217 1.1 mrg
218 1.28 eeh error = PROM_getprop(node, "ranges", sizeof(struct ebus_ranges),
219 1.1 mrg &sc->sc_nrange, (void **)&sc->sc_range);
220 1.16 pk if (error)
221 1.16 pk panic("ebus ranges: error %d", error);
222 1.1 mrg
223 1.1 mrg /*
224 1.1 mrg * now attach all our children
225 1.1 mrg */
226 1.1 mrg DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node));
227 1.1 mrg for (node = firstchild(node); node; node = nextsibling(node)) {
228 1.28 eeh char *name = PROM_getpropstring(node, "name");
229 1.1 mrg
230 1.1 mrg if (ebus_setup_attach_args(sc, node, &eba) != 0) {
231 1.1 mrg printf("ebus_attach: %s: incomplete\n", name);
232 1.1 mrg continue;
233 1.6 mrg } else {
234 1.21 mrg DPRINTF(EDB_CHILD, ("- found child `%s', attaching\n",
235 1.21 mrg eba.ea_name));
236 1.6 mrg (void)config_found(self, &eba, ebus_print);
237 1.1 mrg }
238 1.1 mrg ebus_destroy_attach_args(&eba);
239 1.1 mrg }
240 1.1 mrg }
241 1.1 mrg
242 1.1 mrg int
243 1.1 mrg ebus_setup_attach_args(sc, node, ea)
244 1.1 mrg struct ebus_softc *sc;
245 1.1 mrg int node;
246 1.1 mrg struct ebus_attach_args *ea;
247 1.1 mrg {
248 1.1 mrg int n, rv;
249 1.1 mrg
250 1.1 mrg bzero(ea, sizeof(struct ebus_attach_args));
251 1.28 eeh rv = PROM_getprop(node, "name", 1, &n, (void **)&ea->ea_name);
252 1.1 mrg if (rv != 0)
253 1.1 mrg return (rv);
254 1.1 mrg ea->ea_name[n] = '\0';
255 1.1 mrg
256 1.1 mrg ea->ea_node = node;
257 1.1 mrg ea->ea_bustag = sc->sc_childbustag;
258 1.1 mrg ea->ea_dmatag = sc->sc_dmatag;
259 1.1 mrg
260 1.28 eeh rv = PROM_getprop(node, "reg", sizeof(struct ebus_regs), &ea->ea_nregs,
261 1.1 mrg (void **)&ea->ea_regs);
262 1.1 mrg if (rv)
263 1.1 mrg return (rv);
264 1.1 mrg
265 1.28 eeh rv = PROM_getprop(node, "address", sizeof(u_int32_t), &ea->ea_nvaddrs,
266 1.1 mrg (void **)&ea->ea_vaddrs);
267 1.1 mrg if (rv != ENOENT) {
268 1.1 mrg if (rv)
269 1.1 mrg return (rv);
270 1.1 mrg
271 1.7 mrg if (ea->ea_nregs != ea->ea_nvaddrs)
272 1.1 mrg printf("ebus loses: device %s: %d regs and %d addrs\n",
273 1.7 mrg ea->ea_name, ea->ea_nregs, ea->ea_nvaddrs);
274 1.3 mrg } else
275 1.7 mrg ea->ea_nvaddrs = 0;
276 1.1 mrg
277 1.28 eeh if (PROM_getprop(node, "interrupts", sizeof(u_int32_t), &ea->ea_nintrs,
278 1.3 mrg (void **)&ea->ea_intrs))
279 1.3 mrg ea->ea_nintrs = 0;
280 1.16 pk else
281 1.3 mrg ebus_find_ino(sc, ea);
282 1.1 mrg
283 1.1 mrg return (0);
284 1.1 mrg }
285 1.1 mrg
286 1.1 mrg void
287 1.1 mrg ebus_destroy_attach_args(ea)
288 1.1 mrg struct ebus_attach_args *ea;
289 1.1 mrg {
290 1.1 mrg
291 1.1 mrg if (ea->ea_name)
292 1.1 mrg free((void *)ea->ea_name, M_DEVBUF);
293 1.1 mrg if (ea->ea_regs)
294 1.1 mrg free((void *)ea->ea_regs, M_DEVBUF);
295 1.1 mrg if (ea->ea_intrs)
296 1.1 mrg free((void *)ea->ea_intrs, M_DEVBUF);
297 1.1 mrg if (ea->ea_vaddrs)
298 1.1 mrg free((void *)ea->ea_vaddrs, M_DEVBUF);
299 1.1 mrg }
300 1.1 mrg
301 1.1 mrg int
302 1.1 mrg ebus_print(aux, p)
303 1.1 mrg void *aux;
304 1.1 mrg const char *p;
305 1.1 mrg {
306 1.1 mrg struct ebus_attach_args *ea = aux;
307 1.4 mrg int i;
308 1.1 mrg
309 1.1 mrg if (p)
310 1.1 mrg printf("%s at %s", ea->ea_name, p);
311 1.4 mrg for (i = 0; i < ea->ea_nregs; i++)
312 1.21 mrg printf("%s %x-%x", i == 0 ? " addr" : ",",
313 1.21 mrg ea->ea_regs[i].lo,
314 1.4 mrg ea->ea_regs[i].lo + ea->ea_regs[i].size - 1);
315 1.4 mrg for (i = 0; i < ea->ea_nintrs; i++)
316 1.4 mrg printf(" ipl %d", ea->ea_intrs[i]);
317 1.1 mrg return (UNCONF);
318 1.3 mrg }
319 1.3 mrg
320 1.23 eeh
321 1.3 mrg /*
322 1.3 mrg * find the INO values for each interrupt and fill them in.
323 1.3 mrg *
324 1.3 mrg * for each "reg" property of this device, mask it's hi and lo
325 1.3 mrg * values with the "interrupt-map-mask"'s hi/lo values, and also
326 1.3 mrg * mask the interrupt number with the interrupt mask. search the
327 1.3 mrg * "interrupt-map" list for matching values of hi, lo and interrupt
328 1.3 mrg * to give the INO for this interrupt.
329 1.3 mrg */
330 1.3 mrg void
331 1.3 mrg ebus_find_ino(sc, ea)
332 1.3 mrg struct ebus_softc *sc;
333 1.3 mrg struct ebus_attach_args *ea;
334 1.3 mrg {
335 1.3 mrg u_int32_t hi, lo, intr;
336 1.3 mrg int i, j, k;
337 1.3 mrg
338 1.16 pk if (sc->sc_nintmap == 0) {
339 1.23 eeh for (i = 0; i < ea->ea_nintrs; i++) {
340 1.23 eeh OF_mapintr(ea->ea_node, &ea->ea_intrs[i],
341 1.23 eeh sizeof(ea->ea_intrs[0]),
342 1.23 eeh sizeof(ea->ea_intrs[0]));
343 1.23 eeh }
344 1.16 pk return;
345 1.16 pk }
346 1.16 pk
347 1.21 mrg DPRINTF(EDB_INTRMAP,
348 1.21 mrg ("ebus_find_ino: searching %d interrupts", ea->ea_nintrs));
349 1.16 pk
350 1.3 mrg for (j = 0; j < ea->ea_nintrs; j++) {
351 1.16 pk
352 1.3 mrg intr = ea->ea_intrs[j] & sc->sc_intmapmask.intr;
353 1.3 mrg
354 1.21 mrg DPRINTF(EDB_INTRMAP,
355 1.21 mrg ("; intr %x masked to %x", ea->ea_intrs[j], intr));
356 1.3 mrg for (i = 0; i < ea->ea_nregs; i++) {
357 1.3 mrg hi = ea->ea_regs[i].hi & sc->sc_intmapmask.hi;
358 1.3 mrg lo = ea->ea_regs[i].lo & sc->sc_intmapmask.lo;
359 1.3 mrg
360 1.21 mrg DPRINTF(EDB_INTRMAP,
361 1.21 mrg ("; reg hi.lo %08x.%08x masked to %08x.%08x",
362 1.21 mrg ea->ea_regs[i].hi, ea->ea_regs[i].lo, hi, lo));
363 1.3 mrg for (k = 0; k < sc->sc_nintmap; k++) {
364 1.21 mrg DPRINTF(EDB_INTRMAP,
365 1.21 mrg ("; checking hi.lo %08x.%08x intr %x",
366 1.21 mrg sc->sc_intmap[k].hi, sc->sc_intmap[k].lo,
367 1.21 mrg sc->sc_intmap[k].intr));
368 1.3 mrg if (hi == sc->sc_intmap[k].hi &&
369 1.3 mrg lo == sc->sc_intmap[k].lo &&
370 1.3 mrg intr == sc->sc_intmap[k].intr) {
371 1.16 pk ea->ea_intrs[j] =
372 1.21 mrg sc->sc_intmap[k].cintr;
373 1.21 mrg DPRINTF(EDB_INTRMAP,
374 1.21 mrg ("; FOUND IT! changing to %d\n",
375 1.21 mrg sc->sc_intmap[k].cintr));
376 1.3 mrg goto next_intr;
377 1.3 mrg }
378 1.3 mrg }
379 1.3 mrg }
380 1.22 mrg next_intr:;
381 1.3 mrg }
382 1.1 mrg }
383 1.1 mrg
384 1.8 mrg
385 1.8 mrg /*
386 1.8 mrg * bus space and bus dma below here
387 1.8 mrg */
388 1.8 mrg bus_space_tag_t
389 1.8 mrg ebus_alloc_bus_tag(sc, type)
390 1.8 mrg struct ebus_softc *sc;
391 1.8 mrg int type;
392 1.8 mrg {
393 1.8 mrg bus_space_tag_t bt;
394 1.8 mrg
395 1.8 mrg bt = (bus_space_tag_t)
396 1.8 mrg malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT);
397 1.8 mrg if (bt == NULL)
398 1.8 mrg panic("could not allocate ebus bus tag");
399 1.8 mrg
400 1.8 mrg bzero(bt, sizeof *bt);
401 1.8 mrg bt->cookie = sc;
402 1.23 eeh bt->parent = sc->sc_memtag;
403 1.8 mrg bt->type = type;
404 1.8 mrg bt->sparc_bus_map = _ebus_bus_map;
405 1.8 mrg bt->sparc_bus_mmap = ebus_bus_mmap;
406 1.8 mrg bt->sparc_intr_establish = ebus_intr_establish;
407 1.8 mrg return (bt);
408 1.8 mrg }
409 1.8 mrg
410 1.8 mrg /* XXX? */
411 1.8 mrg bus_dma_tag_t
412 1.8 mrg ebus_alloc_dma_tag(sc, pdt)
413 1.8 mrg struct ebus_softc *sc;
414 1.8 mrg bus_dma_tag_t pdt;
415 1.8 mrg {
416 1.8 mrg bus_dma_tag_t dt;
417 1.8 mrg
418 1.8 mrg dt = (bus_dma_tag_t)
419 1.8 mrg malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT);
420 1.8 mrg if (dt == NULL)
421 1.8 mrg panic("could not allocate ebus dma tag");
422 1.8 mrg
423 1.8 mrg bzero(dt, sizeof *dt);
424 1.8 mrg dt->_cookie = sc;
425 1.8 mrg dt->_parent = pdt;
426 1.8 mrg #define PCOPY(x) dt->x = pdt->x
427 1.8 mrg PCOPY(_dmamap_create);
428 1.8 mrg PCOPY(_dmamap_destroy);
429 1.8 mrg dt->_dmamap_load = ebus_dmamap_load;
430 1.8 mrg PCOPY(_dmamap_load_mbuf);
431 1.8 mrg PCOPY(_dmamap_load_uio);
432 1.8 mrg PCOPY(_dmamap_load_raw);
433 1.8 mrg dt->_dmamap_unload = ebus_dmamap_unload;
434 1.8 mrg dt->_dmamap_sync = ebus_dmamap_sync;
435 1.8 mrg dt->_dmamem_alloc = ebus_dmamem_alloc;
436 1.8 mrg dt->_dmamem_free = ebus_dmamem_free;
437 1.8 mrg dt->_dmamem_map = ebus_dmamem_map;
438 1.8 mrg dt->_dmamem_unmap = ebus_dmamem_unmap;
439 1.8 mrg PCOPY(_dmamem_mmap);
440 1.8 mrg #undef PCOPY
441 1.8 mrg return (dt);
442 1.8 mrg }
443 1.8 mrg
444 1.8 mrg /*
445 1.8 mrg * bus space support. <sparc64/dev/psychoreg.h> has a discussion
446 1.8 mrg * about PCI physical addresses, which also applies to ebus.
447 1.8 mrg */
448 1.8 mrg static int
449 1.8 mrg _ebus_bus_map(t, btype, offset, size, flags, vaddr, hp)
450 1.8 mrg bus_space_tag_t t;
451 1.8 mrg bus_type_t btype;
452 1.8 mrg bus_addr_t offset;
453 1.8 mrg bus_size_t size;
454 1.8 mrg int flags;
455 1.8 mrg vaddr_t vaddr;
456 1.8 mrg bus_space_handle_t *hp;
457 1.8 mrg {
458 1.8 mrg struct ebus_softc *sc = t->cookie;
459 1.8 mrg bus_addr_t hi, lo;
460 1.23 eeh int i, ss;
461 1.8 mrg
462 1.21 mrg DPRINTF(EDB_BUSMAP,
463 1.21 mrg ("\n_ebus_bus_map: type %d off %016llx sz %x flags %d va %p",
464 1.21 mrg (int)t->type, (unsigned long long)offset, (int)size, (int)flags,
465 1.21 mrg (void *)vaddr));
466 1.8 mrg
467 1.8 mrg hi = offset >> 32UL;
468 1.8 mrg lo = offset & 0xffffffff;
469 1.8 mrg DPRINTF(EDB_BUSMAP, (" (hi %08x lo %08x)", (u_int)hi, (u_int)lo));
470 1.8 mrg for (i = 0; i < sc->sc_nrange; i++) {
471 1.8 mrg bus_addr_t pciaddr;
472 1.8 mrg
473 1.8 mrg if (hi != sc->sc_range[i].child_hi)
474 1.8 mrg continue;
475 1.8 mrg if (lo < sc->sc_range[i].child_lo ||
476 1.21 mrg (lo + size) >
477 1.21 mrg (sc->sc_range[i].child_lo + sc->sc_range[i].size))
478 1.8 mrg continue;
479 1.8 mrg
480 1.23 eeh /* Isolate address space and find the right tag */
481 1.23 eeh ss = (sc->sc_range[i].phys_hi>>24)&3;
482 1.23 eeh switch (ss) {
483 1.23 eeh case 1: /* I/O space */
484 1.23 eeh t = sc->sc_iotag;
485 1.23 eeh break;
486 1.23 eeh case 2: /* Memory space */
487 1.23 eeh t = sc->sc_memtag;
488 1.23 eeh break;
489 1.23 eeh case 0: /* Config space */
490 1.23 eeh case 3: /* 64-bit Memory space */
491 1.23 eeh default: /* WTF? */
492 1.23 eeh /* We don't handle these */
493 1.23 eeh panic("_ebus_bus_map: illegal space %x", ss);
494 1.23 eeh break;
495 1.23 eeh }
496 1.8 mrg pciaddr = ((bus_addr_t)sc->sc_range[i].phys_mid << 32UL) |
497 1.8 mrg sc->sc_range[i].phys_lo;
498 1.8 mrg pciaddr += lo;
499 1.21 mrg DPRINTF(EDB_BUSMAP,
500 1.23 eeh ("\n_ebus_bus_map: mapping space %x paddr offset %qx pciaddr %qx\n",
501 1.23 eeh ss, (unsigned long long)offset, (unsigned long long)pciaddr));
502 1.8 mrg /* pass it onto the psycho */
503 1.23 eeh return (bus_space_map2(t, sc->sc_range[i].phys_hi,
504 1.23 eeh pciaddr, size, flags, vaddr, hp));
505 1.8 mrg }
506 1.8 mrg DPRINTF(EDB_BUSMAP, (": FAILED\n"));
507 1.8 mrg return (EINVAL);
508 1.8 mrg }
509 1.8 mrg
510 1.27 eeh static paddr_t
511 1.27 eeh ebus_bus_mmap(t, paddr, off, prot, flags)
512 1.8 mrg bus_space_tag_t t;
513 1.8 mrg bus_addr_t paddr;
514 1.27 eeh off_t off;
515 1.27 eeh int prot;
516 1.8 mrg int flags;
517 1.8 mrg {
518 1.8 mrg bus_addr_t offset = paddr;
519 1.8 mrg struct ebus_softc *sc = t->cookie;
520 1.8 mrg int i;
521 1.8 mrg
522 1.8 mrg for (i = 0; i < sc->sc_nrange; i++) {
523 1.8 mrg bus_addr_t paddr = ((bus_addr_t)sc->sc_range[i].child_hi << 32) |
524 1.8 mrg sc->sc_range[i].child_lo;
525 1.8 mrg
526 1.8 mrg if (offset != paddr)
527 1.8 mrg continue;
528 1.8 mrg
529 1.21 mrg DPRINTF(EDB_BUSMAP, ("\n_ebus_bus_mmap: mapping paddr %qx\n",
530 1.21 mrg (unsigned long long)paddr));
531 1.27 eeh return (bus_space_mmap(sc->sc_memtag, paddr, off,
532 1.27 eeh prot, flags));
533 1.8 mrg }
534 1.8 mrg
535 1.8 mrg return (-1);
536 1.8 mrg }
537 1.8 mrg
538 1.8 mrg /*
539 1.8 mrg * install an interrupt handler for a PCI device
540 1.8 mrg */
541 1.8 mrg void *
542 1.15 pk ebus_intr_establish(t, pri, level, flags, handler, arg)
543 1.8 mrg bus_space_tag_t t;
544 1.15 pk int pri;
545 1.8 mrg int level;
546 1.8 mrg int flags;
547 1.8 mrg int (*handler) __P((void *));
548 1.8 mrg void *arg;
549 1.8 mrg {
550 1.15 pk return (bus_intr_establish(t->parent, pri, level, flags, handler, arg));
551 1.8 mrg }
552 1.8 mrg
553 1.8 mrg /*
554 1.8 mrg * bus dma support
555 1.8 mrg */
556 1.8 mrg int
557 1.8 mrg ebus_dmamap_load(t, map, buf, buflen, p, flags)
558 1.8 mrg bus_dma_tag_t t;
559 1.8 mrg bus_dmamap_t map;
560 1.8 mrg void *buf;
561 1.8 mrg bus_size_t buflen;
562 1.8 mrg struct proc *p;
563 1.8 mrg int flags;
564 1.8 mrg {
565 1.8 mrg struct ebus_softc *sc = t->_cookie;
566 1.8 mrg
567 1.17 mrg return (iommu_dvmamap_load(t, sc->sc_parent->sc_is, map, buf, buflen,
568 1.8 mrg p, flags));
569 1.8 mrg }
570 1.8 mrg
571 1.8 mrg void
572 1.8 mrg ebus_dmamap_unload(t, map)
573 1.8 mrg bus_dma_tag_t t;
574 1.8 mrg bus_dmamap_t map;
575 1.8 mrg {
576 1.8 mrg struct ebus_softc *sc = t->_cookie;
577 1.8 mrg
578 1.17 mrg iommu_dvmamap_unload(t, sc->sc_parent->sc_is, map);
579 1.8 mrg }
580 1.8 mrg
581 1.8 mrg void
582 1.8 mrg ebus_dmamap_sync(t, map, offset, len, ops)
583 1.8 mrg bus_dma_tag_t t;
584 1.8 mrg bus_dmamap_t map;
585 1.8 mrg bus_addr_t offset;
586 1.8 mrg bus_size_t len;
587 1.8 mrg int ops;
588 1.8 mrg {
589 1.8 mrg struct ebus_softc *sc = t->_cookie;
590 1.8 mrg
591 1.17 mrg iommu_dvmamap_sync(t, sc->sc_parent->sc_is, map, offset, len, ops);
592 1.8 mrg bus_dmamap_sync(t->_parent, map, offset, len, ops);
593 1.8 mrg }
594 1.8 mrg
595 1.8 mrg int
596 1.8 mrg ebus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
597 1.8 mrg bus_dma_tag_t t;
598 1.8 mrg bus_size_t size;
599 1.8 mrg bus_size_t alignment;
600 1.8 mrg bus_size_t boundary;
601 1.8 mrg bus_dma_segment_t *segs;
602 1.8 mrg int nsegs;
603 1.8 mrg int *rsegs;
604 1.8 mrg int flags;
605 1.8 mrg {
606 1.8 mrg struct ebus_softc *sc = t->_cookie;
607 1.8 mrg
608 1.17 mrg return (iommu_dvmamem_alloc(t, sc->sc_parent->sc_is, size, alignment,
609 1.8 mrg boundary, segs, nsegs, rsegs, flags));
610 1.8 mrg }
611 1.8 mrg
612 1.8 mrg void
613 1.8 mrg ebus_dmamem_free(t, segs, nsegs)
614 1.8 mrg bus_dma_tag_t t;
615 1.8 mrg bus_dma_segment_t *segs;
616 1.8 mrg int nsegs;
617 1.8 mrg {
618 1.8 mrg struct ebus_softc *sc = t->_cookie;
619 1.8 mrg
620 1.17 mrg iommu_dvmamem_free(t, sc->sc_parent->sc_is, segs, nsegs);
621 1.8 mrg }
622 1.8 mrg
623 1.8 mrg int
624 1.8 mrg ebus_dmamem_map(t, segs, nsegs, size, kvap, flags)
625 1.8 mrg bus_dma_tag_t t;
626 1.8 mrg bus_dma_segment_t *segs;
627 1.8 mrg int nsegs;
628 1.8 mrg size_t size;
629 1.8 mrg caddr_t *kvap;
630 1.8 mrg int flags;
631 1.8 mrg {
632 1.8 mrg struct ebus_softc *sc = t->_cookie;
633 1.8 mrg
634 1.17 mrg return (iommu_dvmamem_map(t, sc->sc_parent->sc_is, segs, nsegs,
635 1.8 mrg size, kvap, flags));
636 1.8 mrg }
637 1.8 mrg
638 1.8 mrg void
639 1.8 mrg ebus_dmamem_unmap(t, kva, size)
640 1.8 mrg bus_dma_tag_t t;
641 1.8 mrg caddr_t kva;
642 1.8 mrg size_t size;
643 1.8 mrg {
644 1.8 mrg struct ebus_softc *sc = t->_cookie;
645 1.8 mrg
646 1.17 mrg iommu_dvmamem_unmap(t, sc->sc_parent->sc_is, kva, size);
647 1.1 mrg }
648