ebus.c revision 1.23 1 /* $NetBSD: ebus.c,v 1.23 2001/07/20 00:07:12 eeh Exp $ */
2
3 /*
4 * Copyright (c) 1999, 2000 Matthew R. Green
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 #include "opt_ddb.h"
32
33 /*
34 * UltraSPARC 5 and beyond ebus support.
35 *
36 * note that this driver is not complete:
37 * - ebus2 dma code is completely unwritten
38 * - interrupt establish is written and appears to work
39 * - bus map code is written and appears to work
40 */
41
42 #undef DEBUG
43 #define DEBUG
44
45 #ifdef DEBUG
46 #define EDB_PROM 0x01
47 #define EDB_CHILD 0x02
48 #define EDB_INTRMAP 0x04
49 #define EDB_BUSMAP 0x08
50 #define EDB_BUSDMA 0x10
51 #define EDB_INTR 0x20
52 int ebus_debug = 0x0;
53 #define DPRINTF(l, s) do { if (ebus_debug & l) printf s; } while (0)
54 #else
55 #define DPRINTF(l, s)
56 #endif
57
58 #include <sys/param.h>
59 #include <sys/conf.h>
60 #include <sys/device.h>
61 #include <sys/errno.h>
62 #include <sys/extent.h>
63 #include <sys/malloc.h>
64 #include <sys/systm.h>
65 #include <sys/time.h>
66
67 #define _SPARC_BUS_DMA_PRIVATE
68 #include <machine/bus.h>
69 #include <machine/autoconf.h>
70 #include <machine/openfirm.h>
71
72 #include <dev/pci/pcivar.h>
73 #include <dev/pci/pcireg.h>
74 #include <dev/pci/pcidevs.h>
75
76 #include <sparc64/dev/iommureg.h>
77 #include <sparc64/dev/iommuvar.h>
78 #include <sparc64/dev/psychoreg.h>
79 #include <sparc64/dev/psychovar.h>
80 #include <sparc64/dev/ebusreg.h>
81 #include <sparc64/dev/ebusvar.h>
82 #include <sparc64/sparc64/cache.h>
83
84 int ebus_match __P((struct device *, struct cfdata *, void *));
85 void ebus_attach __P((struct device *, struct device *, void *));
86
87 struct cfattach ebus_ca = {
88 sizeof(struct ebus_softc), ebus_match, ebus_attach
89 };
90
91 int ebus_setup_attach_args __P((struct ebus_softc *, int,
92 struct ebus_attach_args *));
93 void ebus_destroy_attach_args __P((struct ebus_attach_args *));
94 int ebus_print __P((void *, const char *));
95 void ebus_find_ino __P((struct ebus_softc *, struct ebus_attach_args *));
96 int ebus_find_node __P((struct pci_attach_args *));
97
98 /*
99 * here are our bus space and bus dma routines.
100 */
101 static int ebus_bus_mmap __P((bus_space_tag_t, bus_type_t, bus_addr_t,
102 int, bus_space_handle_t *));
103 static int _ebus_bus_map __P((bus_space_tag_t, bus_type_t, bus_addr_t,
104 bus_size_t, int, vaddr_t,
105 bus_space_handle_t *));
106 static void *ebus_intr_establish __P((bus_space_tag_t, int, int, int,
107 int (*) __P((void *)), void *));
108
109 static int ebus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
110 bus_size_t, struct proc *, int));
111 static void ebus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
112 static void ebus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
113 bus_size_t, int));
114 int ebus_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t,
115 bus_dma_segment_t *, int, int *, int));
116 void ebus_dmamem_free __P((bus_dma_tag_t, bus_dma_segment_t *, int));
117 int ebus_dmamem_map __P((bus_dma_tag_t, bus_dma_segment_t *, int, size_t,
118 caddr_t *, int));
119 void ebus_dmamem_unmap __P((bus_dma_tag_t, caddr_t, size_t));
120
121 int
122 ebus_match(parent, match, aux)
123 struct device *parent;
124 struct cfdata *match;
125 void *aux;
126 {
127 struct pci_attach_args *pa = aux;
128 int node;
129
130 /* Only attach if there's a PROM node. */
131 node = PCITAG_NODE(pa->pa_tag);
132 if (node == -1) return (0);
133
134 /* Match a real ebus */
135 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
136 PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
137 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS)
138 return (1);
139
140 /* Or a PCI-ISA bridge XXX I hope this is on-board. */
141 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
142 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_ISA) {
143 return (1);
144 }
145
146 return (0);
147 }
148
149 /*
150 * attach an ebus and all it's children. this code is modeled
151 * after the sbus code which does similar things.
152 */
153 void
154 ebus_attach(parent, self, aux)
155 struct device *parent, *self;
156 void *aux;
157 {
158 struct ebus_softc *sc = (struct ebus_softc *)self;
159 struct pci_attach_args *pa = aux;
160 struct ebus_attach_args eba;
161 struct ebus_interrupt_map_mask *immp;
162 int node, nmapmask, error;
163 char devinfo[256];
164
165 printf("\n");
166
167 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
168 printf("%s: %s, revision 0x%02x\n", self->dv_xname, devinfo,
169 PCI_REVISION(pa->pa_class));
170
171 sc->sc_parent = (struct psycho_softc *)parent;
172 sc->sc_memtag = pa->pa_memt;
173 sc->sc_iotag = pa->pa_iot;
174 sc->sc_childbustag = ebus_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE);
175 sc->sc_dmatag = ebus_alloc_dma_tag(sc, pa->pa_dmat);
176
177 node = PCITAG_NODE(pa->pa_tag);
178 if (node == -1)
179 panic("could not find ebus node");
180
181 sc->sc_node = node;
182
183 /*
184 * fill in our softc with information from the prom
185 */
186 sc->sc_intmap = NULL;
187 sc->sc_range = NULL;
188 error = getprop(node, "interrupt-map",
189 sizeof(struct ebus_interrupt_map),
190 &sc->sc_nintmap, (void **)&sc->sc_intmap);
191 switch (error) {
192 case 0:
193 immp = &sc->sc_intmapmask;
194 error = getprop(node, "interrupt-map-mask",
195 sizeof(struct ebus_interrupt_map_mask), &nmapmask,
196 (void **)&immp);
197 if (error)
198 panic("could not get ebus interrupt-map-mask");
199 if (nmapmask != 1)
200 panic("ebus interrupt-map-mask is broken");
201 break;
202 case ENOENT:
203 break;
204 default:
205 panic("ebus interrupt-map: error %d", error);
206 break;
207 }
208
209 error = getprop(node, "ranges", sizeof(struct ebus_ranges),
210 &sc->sc_nrange, (void **)&sc->sc_range);
211 if (error)
212 panic("ebus ranges: error %d", error);
213
214 /*
215 * now attach all our children
216 */
217 DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node));
218 for (node = firstchild(node); node; node = nextsibling(node)) {
219 char *name = getpropstring(node, "name");
220
221 if (ebus_setup_attach_args(sc, node, &eba) != 0) {
222 printf("ebus_attach: %s: incomplete\n", name);
223 continue;
224 } else {
225 DPRINTF(EDB_CHILD, ("- found child `%s', attaching\n",
226 eba.ea_name));
227 (void)config_found(self, &eba, ebus_print);
228 }
229 ebus_destroy_attach_args(&eba);
230 }
231 }
232
233 int
234 ebus_setup_attach_args(sc, node, ea)
235 struct ebus_softc *sc;
236 int node;
237 struct ebus_attach_args *ea;
238 {
239 int n, rv;
240
241 bzero(ea, sizeof(struct ebus_attach_args));
242 rv = getprop(node, "name", 1, &n, (void **)&ea->ea_name);
243 if (rv != 0)
244 return (rv);
245 ea->ea_name[n] = '\0';
246
247 ea->ea_node = node;
248 ea->ea_bustag = sc->sc_childbustag;
249 ea->ea_dmatag = sc->sc_dmatag;
250
251 rv = getprop(node, "reg", sizeof(struct ebus_regs), &ea->ea_nregs,
252 (void **)&ea->ea_regs);
253 if (rv)
254 return (rv);
255
256 rv = getprop(node, "address", sizeof(u_int32_t), &ea->ea_nvaddrs,
257 (void **)&ea->ea_vaddrs);
258 if (rv != ENOENT) {
259 if (rv)
260 return (rv);
261
262 if (ea->ea_nregs != ea->ea_nvaddrs)
263 printf("ebus loses: device %s: %d regs and %d addrs\n",
264 ea->ea_name, ea->ea_nregs, ea->ea_nvaddrs);
265 } else
266 ea->ea_nvaddrs = 0;
267
268 if (getprop(node, "interrupts", sizeof(u_int32_t), &ea->ea_nintrs,
269 (void **)&ea->ea_intrs))
270 ea->ea_nintrs = 0;
271 else
272 ebus_find_ino(sc, ea);
273
274 return (0);
275 }
276
277 void
278 ebus_destroy_attach_args(ea)
279 struct ebus_attach_args *ea;
280 {
281
282 if (ea->ea_name)
283 free((void *)ea->ea_name, M_DEVBUF);
284 if (ea->ea_regs)
285 free((void *)ea->ea_regs, M_DEVBUF);
286 if (ea->ea_intrs)
287 free((void *)ea->ea_intrs, M_DEVBUF);
288 if (ea->ea_vaddrs)
289 free((void *)ea->ea_vaddrs, M_DEVBUF);
290 }
291
292 int
293 ebus_print(aux, p)
294 void *aux;
295 const char *p;
296 {
297 struct ebus_attach_args *ea = aux;
298 int i;
299
300 if (p)
301 printf("%s at %s", ea->ea_name, p);
302 for (i = 0; i < ea->ea_nregs; i++)
303 printf("%s %x-%x", i == 0 ? " addr" : ",",
304 ea->ea_regs[i].lo,
305 ea->ea_regs[i].lo + ea->ea_regs[i].size - 1);
306 for (i = 0; i < ea->ea_nintrs; i++)
307 printf(" ipl %d", ea->ea_intrs[i]);
308 return (UNCONF);
309 }
310
311
312 /*
313 * find the INO values for each interrupt and fill them in.
314 *
315 * for each "reg" property of this device, mask it's hi and lo
316 * values with the "interrupt-map-mask"'s hi/lo values, and also
317 * mask the interrupt number with the interrupt mask. search the
318 * "interrupt-map" list for matching values of hi, lo and interrupt
319 * to give the INO for this interrupt.
320 */
321 void
322 ebus_find_ino(sc, ea)
323 struct ebus_softc *sc;
324 struct ebus_attach_args *ea;
325 {
326 u_int32_t hi, lo, intr;
327 int i, j, k;
328
329 if (sc->sc_nintmap == 0) {
330 for (i = 0; i < ea->ea_nintrs; i++) {
331 OF_mapintr(ea->ea_node, &ea->ea_intrs[i],
332 sizeof(ea->ea_intrs[0]),
333 sizeof(ea->ea_intrs[0]));
334 }
335 return;
336 }
337
338 DPRINTF(EDB_INTRMAP,
339 ("ebus_find_ino: searching %d interrupts", ea->ea_nintrs));
340
341 for (j = 0; j < ea->ea_nintrs; j++) {
342
343 intr = ea->ea_intrs[j] & sc->sc_intmapmask.intr;
344
345 DPRINTF(EDB_INTRMAP,
346 ("; intr %x masked to %x", ea->ea_intrs[j], intr));
347 for (i = 0; i < ea->ea_nregs; i++) {
348 hi = ea->ea_regs[i].hi & sc->sc_intmapmask.hi;
349 lo = ea->ea_regs[i].lo & sc->sc_intmapmask.lo;
350
351 DPRINTF(EDB_INTRMAP,
352 ("; reg hi.lo %08x.%08x masked to %08x.%08x",
353 ea->ea_regs[i].hi, ea->ea_regs[i].lo, hi, lo));
354 for (k = 0; k < sc->sc_nintmap; k++) {
355 DPRINTF(EDB_INTRMAP,
356 ("; checking hi.lo %08x.%08x intr %x",
357 sc->sc_intmap[k].hi, sc->sc_intmap[k].lo,
358 sc->sc_intmap[k].intr));
359 if (hi == sc->sc_intmap[k].hi &&
360 lo == sc->sc_intmap[k].lo &&
361 intr == sc->sc_intmap[k].intr) {
362 ea->ea_intrs[j] =
363 sc->sc_intmap[k].cintr;
364 DPRINTF(EDB_INTRMAP,
365 ("; FOUND IT! changing to %d\n",
366 sc->sc_intmap[k].cintr));
367 goto next_intr;
368 }
369 }
370 }
371 next_intr:;
372 }
373 }
374
375
376 /*
377 * bus space and bus dma below here
378 */
379 bus_space_tag_t
380 ebus_alloc_bus_tag(sc, type)
381 struct ebus_softc *sc;
382 int type;
383 {
384 bus_space_tag_t bt;
385
386 bt = (bus_space_tag_t)
387 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT);
388 if (bt == NULL)
389 panic("could not allocate ebus bus tag");
390
391 bzero(bt, sizeof *bt);
392 bt->cookie = sc;
393 bt->parent = sc->sc_memtag;
394 bt->type = type;
395 bt->sparc_bus_map = _ebus_bus_map;
396 bt->sparc_bus_mmap = ebus_bus_mmap;
397 bt->sparc_intr_establish = ebus_intr_establish;
398 return (bt);
399 }
400
401 /* XXX? */
402 bus_dma_tag_t
403 ebus_alloc_dma_tag(sc, pdt)
404 struct ebus_softc *sc;
405 bus_dma_tag_t pdt;
406 {
407 bus_dma_tag_t dt;
408
409 dt = (bus_dma_tag_t)
410 malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT);
411 if (dt == NULL)
412 panic("could not allocate ebus dma tag");
413
414 bzero(dt, sizeof *dt);
415 dt->_cookie = sc;
416 dt->_parent = pdt;
417 #define PCOPY(x) dt->x = pdt->x
418 PCOPY(_dmamap_create);
419 PCOPY(_dmamap_destroy);
420 dt->_dmamap_load = ebus_dmamap_load;
421 PCOPY(_dmamap_load_mbuf);
422 PCOPY(_dmamap_load_uio);
423 PCOPY(_dmamap_load_raw);
424 dt->_dmamap_unload = ebus_dmamap_unload;
425 dt->_dmamap_sync = ebus_dmamap_sync;
426 dt->_dmamem_alloc = ebus_dmamem_alloc;
427 dt->_dmamem_free = ebus_dmamem_free;
428 dt->_dmamem_map = ebus_dmamem_map;
429 dt->_dmamem_unmap = ebus_dmamem_unmap;
430 PCOPY(_dmamem_mmap);
431 #undef PCOPY
432 return (dt);
433 }
434
435 /*
436 * bus space support. <sparc64/dev/psychoreg.h> has a discussion
437 * about PCI physical addresses, which also applies to ebus.
438 */
439 static int
440 _ebus_bus_map(t, btype, offset, size, flags, vaddr, hp)
441 bus_space_tag_t t;
442 bus_type_t btype;
443 bus_addr_t offset;
444 bus_size_t size;
445 int flags;
446 vaddr_t vaddr;
447 bus_space_handle_t *hp;
448 {
449 struct ebus_softc *sc = t->cookie;
450 bus_addr_t hi, lo;
451 int i, ss;
452
453 DPRINTF(EDB_BUSMAP,
454 ("\n_ebus_bus_map: type %d off %016llx sz %x flags %d va %p",
455 (int)t->type, (unsigned long long)offset, (int)size, (int)flags,
456 (void *)vaddr));
457
458 hi = offset >> 32UL;
459 lo = offset & 0xffffffff;
460 DPRINTF(EDB_BUSMAP, (" (hi %08x lo %08x)", (u_int)hi, (u_int)lo));
461 for (i = 0; i < sc->sc_nrange; i++) {
462 bus_addr_t pciaddr;
463
464 if (hi != sc->sc_range[i].child_hi)
465 continue;
466 if (lo < sc->sc_range[i].child_lo ||
467 (lo + size) >
468 (sc->sc_range[i].child_lo + sc->sc_range[i].size))
469 continue;
470
471 /* Isolate address space and find the right tag */
472 ss = (sc->sc_range[i].phys_hi>>24)&3;
473 switch (ss) {
474 case 1: /* I/O space */
475 t = sc->sc_iotag;
476 break;
477 case 2: /* Memory space */
478 t = sc->sc_memtag;
479 break;
480 case 0: /* Config space */
481 case 3: /* 64-bit Memory space */
482 default: /* WTF? */
483 /* We don't handle these */
484 panic("_ebus_bus_map: illegal space %x", ss);
485 break;
486 }
487 pciaddr = ((bus_addr_t)sc->sc_range[i].phys_mid << 32UL) |
488 sc->sc_range[i].phys_lo;
489 pciaddr += lo;
490 DPRINTF(EDB_BUSMAP,
491 ("\n_ebus_bus_map: mapping space %x paddr offset %qx pciaddr %qx\n",
492 ss, (unsigned long long)offset, (unsigned long long)pciaddr));
493 /* pass it onto the psycho */
494 return (bus_space_map2(t, sc->sc_range[i].phys_hi,
495 pciaddr, size, flags, vaddr, hp));
496 }
497 DPRINTF(EDB_BUSMAP, (": FAILED\n"));
498 return (EINVAL);
499 }
500
501 static int
502 ebus_bus_mmap(t, btype, paddr, flags, hp)
503 bus_space_tag_t t;
504 bus_type_t btype;
505 bus_addr_t paddr;
506 int flags;
507 bus_space_handle_t *hp;
508 {
509 bus_addr_t offset = paddr;
510 struct ebus_softc *sc = t->cookie;
511 int i;
512
513 for (i = 0; i < sc->sc_nrange; i++) {
514 bus_addr_t paddr = ((bus_addr_t)sc->sc_range[i].child_hi << 32) |
515 sc->sc_range[i].child_lo;
516
517 if (offset != paddr)
518 continue;
519
520 DPRINTF(EDB_BUSMAP, ("\n_ebus_bus_mmap: mapping paddr %qx\n",
521 (unsigned long long)paddr));
522 return (bus_space_mmap(sc->sc_memtag, 0, paddr,
523 flags, hp));
524 }
525
526 return (-1);
527 }
528
529 /*
530 * install an interrupt handler for a PCI device
531 */
532 void *
533 ebus_intr_establish(t, pri, level, flags, handler, arg)
534 bus_space_tag_t t;
535 int pri;
536 int level;
537 int flags;
538 int (*handler) __P((void *));
539 void *arg;
540 {
541 return (bus_intr_establish(t->parent, pri, level, flags, handler, arg));
542 }
543
544 /*
545 * bus dma support
546 */
547 int
548 ebus_dmamap_load(t, map, buf, buflen, p, flags)
549 bus_dma_tag_t t;
550 bus_dmamap_t map;
551 void *buf;
552 bus_size_t buflen;
553 struct proc *p;
554 int flags;
555 {
556 struct ebus_softc *sc = t->_cookie;
557
558 return (iommu_dvmamap_load(t, sc->sc_parent->sc_is, map, buf, buflen,
559 p, flags));
560 }
561
562 void
563 ebus_dmamap_unload(t, map)
564 bus_dma_tag_t t;
565 bus_dmamap_t map;
566 {
567 struct ebus_softc *sc = t->_cookie;
568
569 iommu_dvmamap_unload(t, sc->sc_parent->sc_is, map);
570 }
571
572 void
573 ebus_dmamap_sync(t, map, offset, len, ops)
574 bus_dma_tag_t t;
575 bus_dmamap_t map;
576 bus_addr_t offset;
577 bus_size_t len;
578 int ops;
579 {
580 struct ebus_softc *sc = t->_cookie;
581
582 iommu_dvmamap_sync(t, sc->sc_parent->sc_is, map, offset, len, ops);
583 bus_dmamap_sync(t->_parent, map, offset, len, ops);
584 }
585
586 int
587 ebus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
588 bus_dma_tag_t t;
589 bus_size_t size;
590 bus_size_t alignment;
591 bus_size_t boundary;
592 bus_dma_segment_t *segs;
593 int nsegs;
594 int *rsegs;
595 int flags;
596 {
597 struct ebus_softc *sc = t->_cookie;
598
599 return (iommu_dvmamem_alloc(t, sc->sc_parent->sc_is, size, alignment,
600 boundary, segs, nsegs, rsegs, flags));
601 }
602
603 void
604 ebus_dmamem_free(t, segs, nsegs)
605 bus_dma_tag_t t;
606 bus_dma_segment_t *segs;
607 int nsegs;
608 {
609 struct ebus_softc *sc = t->_cookie;
610
611 iommu_dvmamem_free(t, sc->sc_parent->sc_is, segs, nsegs);
612 }
613
614 int
615 ebus_dmamem_map(t, segs, nsegs, size, kvap, flags)
616 bus_dma_tag_t t;
617 bus_dma_segment_t *segs;
618 int nsegs;
619 size_t size;
620 caddr_t *kvap;
621 int flags;
622 {
623 struct ebus_softc *sc = t->_cookie;
624
625 return (iommu_dvmamem_map(t, sc->sc_parent->sc_is, segs, nsegs,
626 size, kvap, flags));
627 }
628
629 void
630 ebus_dmamem_unmap(t, kva, size)
631 bus_dma_tag_t t;
632 caddr_t kva;
633 size_t size;
634 {
635 struct ebus_softc *sc = t->_cookie;
636
637 iommu_dvmamem_unmap(t, sc->sc_parent->sc_is, kva, size);
638 }
639