ebus.c revision 1.67.4.1 1 /* $NetBSD: ebus.c,v 1.67.4.1 2021/08/04 02:57:07 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1999, 2000, 2001 Matthew R. Green
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: ebus.c,v 1.67.4.1 2021/08/04 02:57:07 thorpej Exp $");
31
32 #include "opt_ddb.h"
33
34 /*
35 * UltraSPARC 5 and beyond ebus support.
36 *
37 * note that this driver is not complete:
38 * - interrupt establish is written and appears to work
39 * - bus map code is written and appears to work
40 * - ebus2 DMA code is completely unwritten, we just punt to
41 * the iommu.
42 */
43
44 #ifdef DEBUG
45 #define EDB_PROM 0x01
46 #define EDB_CHILD 0x02
47 #define EDB_INTRMAP 0x04
48 #define EDB_BUSMAP 0x08
49 #define EDB_BUSDMA 0x10
50 #define EDB_INTR 0x20
51 int ebus_debug = 0x0;
52 #define DPRINTF(l, s) do { if (ebus_debug & l) printf s; } while (0)
53 #else
54 #define DPRINTF(l, s)
55 #endif
56
57 #include <sys/param.h>
58 #include <sys/conf.h>
59 #include <sys/device.h>
60 #include <sys/errno.h>
61 #include <sys/extent.h>
62 #include <sys/malloc.h>
63 #include <sys/kmem.h>
64 #include <sys/systm.h>
65 #include <sys/time.h>
66
67 #define _SPARC_BUS_DMA_PRIVATE
68 #include <sys/bus.h>
69 #include <machine/autoconf.h>
70 #include <machine/openfirm.h>
71
72 #include <dev/pci/pcivar.h>
73 #include <dev/pci/pcireg.h>
74 #include <dev/pci/pcidevs.h>
75
76 #include <dev/ebus/ebusreg.h>
77 #include <dev/ebus/ebusvar.h>
78 #include <sparc64/dev/ebusvar.h>
79
80 int ebus_match(device_t, cfdata_t, void *);
81 void ebus_attach(device_t, device_t, void *);
82
83 CFATTACH_DECL_NEW(ebus, sizeof(struct ebus_softc),
84 ebus_match, ebus_attach, NULL, NULL);
85
86 /*
87 * here are our bus space and bus DMA routines.
88 */
89 static int _ebus_bus_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, vaddr_t,
90 bus_space_handle_t *);
91 static void *ebus_intr_establish(bus_space_tag_t, int, int, int (*)(void *),
92 void *, void(*)(void));
93
94 int
95 ebus_match(device_t parent, cfdata_t match, void *aux)
96 {
97 struct pci_attach_args *pa = aux;
98 char *name;
99 int node;
100
101 /* Only attach if there's a PROM node. */
102 node = PCITAG_NODE(pa->pa_tag);
103 if (node == -1)
104 return (0);
105
106 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
107 return (0);
108
109 /* Match a real ebus */
110 name = prom_getpropstring(node, "name");
111 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
112 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS &&
113 strcmp(name, "ebus") == 0)
114 return (1);
115
116 /* Or a real ebus III */
117 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
118 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUSIII &&
119 strcmp(name, "ebus") == 0)
120 return (1);
121
122 /* Or a PCI-ISA bridge XXX I hope this is on-board. */
123 if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_ISA) {
124 return (1);
125 }
126
127 /* Or the Altera bridge on SPARCle */
128 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALTERA &&
129 PCI_PRODUCT(pa->pa_id) == 0 &&
130 strcmp(name, "ebus") == 0)
131 return (1);
132
133 return (0);
134 }
135
136 /*
137 * attach an ebus and all its children. this code is modeled
138 * after the sbus code which does similar things.
139 */
140 void
141 ebus_attach(device_t parent, device_t self, void *aux)
142 {
143 struct ebus_softc *sc = device_private(self);
144 struct pci_attach_args *pa = aux;
145 struct ebus_attach_args eba;
146 struct ebus_interrupt_map_mask *immp;
147 int node, nmapmask, error;
148 char devinfo[256];
149
150 sc->sc_dev = self;
151
152 aprint_naive("\n");
153
154 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
155 aprint_normal(": %s, revision 0x%02x\n", devinfo,
156 PCI_REVISION(pa->pa_class));
157
158 sc->sc_memtag = pa->pa_memt;
159 sc->sc_iotag = pa->pa_iot;
160 sc->sc_childbustag = ebus_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE);
161 sc->sc_dmatag = pa->pa_dmat;
162
163 node = PCITAG_NODE(pa->pa_tag);
164 if (node == -1)
165 panic("could not find ebus node");
166
167 sc->sc_node = node;
168
169 /*
170 * fill in our softc with information from the prom
171 */
172 sc->sc_intmap = NULL;
173 sc->sc_range = NULL;
174 sc->sc_nintmap = 0;
175 error = prom_getprop(node, "interrupt-map",
176 sizeof(struct ebus_interrupt_map),
177 &sc->sc_nintmap, &sc->sc_intmap);
178 switch (error) {
179 case 0:
180 immp = &sc->sc_intmapmask;
181 nmapmask = sizeof(*immp);
182 error = prom_getprop(node, "interrupt-map-mask",
183 sizeof(struct ebus_interrupt_map_mask), &nmapmask,
184 &immp);
185 if (error)
186 panic("could not get ebus interrupt-map-mask, error %d",
187 error);
188 if (nmapmask != 1)
189 panic("ebus interrupt-map-mask is broken");
190 break;
191 case ENOENT:
192 break;
193 default:
194 panic("ebus interrupt-map: error %d", error);
195 break;
196 }
197
198 error = prom_getprop(node, "ranges", sizeof(struct ebus_ranges),
199 &sc->sc_nrange, &sc->sc_range);
200 if (error)
201 panic("ebus ranges: error %d", error);
202
203 /*
204 * now attach all our children
205 */
206 DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node));
207 for (node = firstchild(node); node; node = nextsibling(node)) {
208 char *name = prom_getpropstring(node, "name");
209
210 if (ebus_setup_attach_args(sc, node, &eba) != 0) {
211 aprint_error("ebus_attach: %s: incomplete\n", name);
212 continue;
213 } else {
214 DPRINTF(EDB_CHILD, ("- found child `%s', attaching\n",
215 eba.ea_name));
216 (void)config_found(self, &eba, ebus_print,
217 CFARGS(.devhandle = prom_node_to_devhandle(node)));
218 }
219 ebus_destroy_attach_args(&eba);
220 }
221 }
222
223 int ebus_setup_attach_args(struct ebus_softc *, int,
224 struct ebus_attach_args *);
225 int
226 ebus_setup_attach_args(struct ebus_softc *sc, int node,
227 struct ebus_attach_args *ea)
228 {
229 int n, rv;
230
231 memset(ea, 0, sizeof(struct ebus_attach_args));
232 n = 0;
233 rv = prom_getprop(node, "name", 1, &n, &ea->ea_name);
234 if (rv != 0)
235 return (rv);
236 KASSERT(ea->ea_name[n-1] == '\0');
237
238 ea->ea_node = node;
239 ea->ea_bustag = sc->sc_childbustag;
240 ea->ea_dmatag = sc->sc_dmatag;
241
242 rv = prom_getprop(node, "reg", sizeof(struct ebus_regs), &ea->ea_nreg,
243 &ea->ea_reg);
244 if (rv)
245 return (rv);
246
247 rv = prom_getprop(node, "address", sizeof(uint32_t), &ea->ea_nvaddr,
248 &ea->ea_vaddr);
249 if (rv != ENOENT) {
250 if (rv)
251 return (rv);
252
253 if (ea->ea_nreg != ea->ea_nvaddr)
254 printf("ebus loses: device %s: %d regs and %d addrs\n",
255 ea->ea_name, ea->ea_nreg, ea->ea_nvaddr);
256 } else
257 ea->ea_nvaddr = 0;
258
259 if (prom_getprop(node, "interrupts", sizeof(uint32_t), &ea->ea_nintr,
260 &ea->ea_intr))
261 ea->ea_nintr = 0;
262 else
263 ebus_find_ino(sc, ea);
264
265 return (0);
266 }
267
268 void
269 ebus_destroy_attach_args(struct ebus_attach_args *ea)
270 {
271
272 if (ea->ea_name)
273 free((void *)ea->ea_name, M_DEVBUF);
274 if (ea->ea_reg)
275 free((void *)ea->ea_reg, M_DEVBUF);
276 if (ea->ea_intr)
277 free((void *)ea->ea_intr, M_DEVBUF);
278 if (ea->ea_vaddr)
279 free((void *)ea->ea_vaddr, M_DEVBUF);
280 }
281
282 int
283 ebus_print(void *aux, const char *p)
284 {
285 struct ebus_attach_args *ea = aux;
286 int i;
287
288 if (p)
289 aprint_normal("%s at %s", ea->ea_name, p);
290 for (i = 0; i < ea->ea_nreg; i++)
291 aprint_normal("%s %x-%x", i == 0 ? " addr" : ",",
292 ea->ea_reg[i].lo,
293 ea->ea_reg[i].lo + ea->ea_reg[i].size - 1);
294 for (i = 0; i < ea->ea_nintr; i++)
295 aprint_normal(" ipl %x", ea->ea_intr[i]);
296 return (UNCONF);
297 }
298
299
300 /*
301 * find the INO values for each interrupt and fill them in.
302 *
303 * for each "reg" property of this device, mask its hi and lo
304 * values with the "interrupt-map-mask"'s hi/lo values, and also
305 * mask the interrupt number with the interrupt mask. search the
306 * "interrupt-map" list for matching values of hi, lo and interrupt
307 * to give the INO for this interrupt.
308 */
309 void
310 ebus_find_ino(struct ebus_softc *sc, struct ebus_attach_args *ea)
311 {
312 uint32_t hi, lo, intr;
313 int i, j, k;
314
315 if (sc->sc_nintmap == 0) {
316 for (i = 0; i < ea->ea_nintr; i++) {
317 OF_mapintr(ea->ea_node, &ea->ea_intr[i],
318 sizeof(ea->ea_intr[0]),
319 sizeof(ea->ea_intr[0]));
320 }
321 return;
322 }
323
324 DPRINTF(EDB_INTRMAP,
325 ("ebus_find_ino: searching %d interrupts", ea->ea_nintr));
326
327 for (j = 0; j < ea->ea_nintr; j++) {
328
329 intr = ea->ea_intr[j] & sc->sc_intmapmask.intr;
330
331 DPRINTF(EDB_INTRMAP,
332 ("; intr %x masked to %x", ea->ea_intr[j], intr));
333 for (i = 0; i < ea->ea_nreg; i++) {
334 hi = ea->ea_reg[i].hi & sc->sc_intmapmask.hi;
335 lo = ea->ea_reg[i].lo & sc->sc_intmapmask.lo;
336
337 DPRINTF(EDB_INTRMAP,
338 ("; reg hi.lo %08x.%08x masked to %08x.%08x",
339 ea->ea_reg[i].hi, ea->ea_reg[i].lo, hi, lo));
340 for (k = 0; k < sc->sc_nintmap; k++) {
341 DPRINTF(EDB_INTRMAP,
342 ("; checking hi.lo %08x.%08x intr %x",
343 sc->sc_intmap[k].hi, sc->sc_intmap[k].lo,
344 sc->sc_intmap[k].intr));
345 if (hi == sc->sc_intmap[k].hi &&
346 lo == sc->sc_intmap[k].lo &&
347 intr == sc->sc_intmap[k].intr) {
348 ea->ea_intr[j] =
349 sc->sc_intmap[k].cintr;
350 DPRINTF(EDB_INTRMAP,
351 ("; FOUND IT! changing to %d\n",
352 sc->sc_intmap[k].cintr));
353 goto next_intr;
354 }
355 }
356 }
357 next_intr:;
358 }
359 }
360
361 /*
362 * bus space support. <sparc64/dev/psychoreg.h> has a discussion
363 * about PCI physical addresses, which also applies to ebus.
364 */
365 bus_space_tag_t
366 ebus_alloc_bus_tag(struct ebus_softc *sc, int type)
367 {
368 bus_space_tag_t bt;
369
370 bt = kmem_zalloc(sizeof(*bt), KM_SLEEP);
371 bt->cookie = sc;
372 bt->parent = sc->sc_memtag;
373 bt->type = type;
374 bt->sparc_bus_map = _ebus_bus_map;
375 bt->sparc_bus_mmap = ebus_bus_mmap;
376 bt->sparc_intr_establish = ebus_intr_establish;
377 return (bt);
378 }
379
380 static int
381 _ebus_bus_map(bus_space_tag_t t, bus_addr_t ba, bus_size_t size, int flags,
382 vaddr_t va, bus_space_handle_t *hp)
383 {
384 struct ebus_softc *sc = t->cookie;
385 paddr_t offset;
386 u_int bar;
387 int i, ss;
388
389 bar = BUS_ADDR_IOSPACE(ba);
390 offset = BUS_ADDR_PADDR(ba);
391
392 DPRINTF(EDB_BUSMAP,
393 ("\n_ebus_bus_map: bar %d offset %08x sz %x flags %x va %p\n",
394 (int)bar, (uint32_t)offset, (uint32_t)size,
395 flags, (void *)va));
396
397 for (i = 0; i < sc->sc_nrange; i++) {
398 bus_addr_t pciaddr;
399
400 if (bar != sc->sc_range[i].child_hi)
401 continue;
402 if (offset < sc->sc_range[i].child_lo ||
403 (offset + size) >
404 (sc->sc_range[i].child_lo + sc->sc_range[i].size))
405 continue;
406
407 /* Isolate address space and find the right tag */
408 ss = (sc->sc_range[i].phys_hi>>24)&3;
409 switch (ss) {
410 case 1: /* I/O space */
411 t = sc->sc_iotag;
412 break;
413 case 2: /* Memory space */
414 t = sc->sc_memtag;
415 break;
416 case 0: /* Config space */
417 case 3: /* 64-bit Memory space */
418 default: /* WTF? */
419 /* We don't handle these */
420 panic("_ebus_bus_map: illegal space %x", ss);
421 break;
422 }
423 pciaddr = ((bus_addr_t)sc->sc_range[i].phys_mid << 32UL) |
424 sc->sc_range[i].phys_lo;
425 pciaddr += offset;
426
427 DPRINTF(EDB_BUSMAP,
428 ("_ebus_bus_map: mapping to PCI addr %x\n",
429 (uint32_t)pciaddr));
430
431 /* pass it onto the psycho */
432 return (bus_space_map(t, pciaddr, size, flags, hp));
433 }
434 DPRINTF(EDB_BUSMAP, (": FAILED\n"));
435 return (EINVAL);
436 }
437
438 paddr_t
439 ebus_bus_mmap(bus_space_tag_t t, bus_addr_t paddr, off_t off, int prot,
440 int flags)
441 {
442 bus_addr_t offset = paddr;
443 struct ebus_softc *sc = t->cookie;
444 int i;
445
446 for (i = 0; i < sc->sc_nrange; i++) {
447 bus_addr_t paddr1 =
448 ((bus_addr_t)sc->sc_range[i].child_hi << 32) |
449 sc->sc_range[i].child_lo;
450
451 if (offset != paddr1)
452 continue;
453
454 DPRINTF(EDB_BUSMAP, ("\n_ebus_bus_mmap: mapping paddr %qx\n",
455 (unsigned long long)paddr1));
456 return (bus_space_mmap(sc->sc_memtag, paddr1, off,
457 prot, flags));
458 }
459
460 return (-1);
461 }
462
463 /*
464 * install an interrupt handler for a ebus device
465 */
466 void *
467 ebus_intr_establish(bus_space_tag_t t, int pri, int level,
468 int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */)
469 {
470
471 return (bus_intr_establish(t->parent, pri, level, handler, arg));
472 }
473