ffb.c revision 1.49 1 1.49 macallan /* $NetBSD: ffb.c,v 1.49 2011/12/22 05:08:05 macallan Exp $ */
2 1.1 petrov /* $OpenBSD: creator.c,v 1.20 2002/07/30 19:48:15 jason Exp $ */
3 1.1 petrov
4 1.1 petrov /*
5 1.1 petrov * Copyright (c) 2002 Jason L. Wright (jason (at) thought.net)
6 1.1 petrov * All rights reserved.
7 1.1 petrov *
8 1.1 petrov * Redistribution and use in source and binary forms, with or without
9 1.1 petrov * modification, are permitted provided that the following conditions
10 1.1 petrov * are met:
11 1.1 petrov * 1. Redistributions of source code must retain the above copyright
12 1.1 petrov * notice, this list of conditions and the following disclaimer.
13 1.1 petrov * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 petrov * notice, this list of conditions and the following disclaimer in the
15 1.1 petrov * documentation and/or other materials provided with the distribution.
16 1.1 petrov * 3. All advertising materials mentioning features or use of this software
17 1.1 petrov * must display the following acknowledgement:
18 1.1 petrov * This product includes software developed by Jason L. Wright
19 1.1 petrov * 4. The name of the author may not be used to endorse or promote products
20 1.1 petrov * derived from this software without specific prior written permission.
21 1.1 petrov *
22 1.1 petrov * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.1 petrov * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 1.1 petrov * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 1.1 petrov * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
26 1.1 petrov * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27 1.1 petrov * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 1.1 petrov * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 1.1 petrov * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
30 1.1 petrov * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
31 1.1 petrov * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 1.1 petrov * POSSIBILITY OF SUCH DAMAGE.
33 1.1 petrov */
34 1.3 lukem
35 1.3 lukem #include <sys/cdefs.h>
36 1.49 macallan __KERNEL_RCSID(0, "$NetBSD: ffb.c,v 1.49 2011/12/22 05:08:05 macallan Exp $");
37 1.1 petrov
38 1.1 petrov #include <sys/types.h>
39 1.1 petrov #include <sys/param.h>
40 1.1 petrov #include <sys/systm.h>
41 1.1 petrov #include <sys/kernel.h>
42 1.1 petrov #include <sys/device.h>
43 1.1 petrov #include <sys/conf.h>
44 1.16 macallan #include <sys/ioctl.h>
45 1.16 macallan #include <sys/malloc.h>
46 1.16 macallan #include <sys/mman.h>
47 1.1 petrov
48 1.44 dyoung #include <sys/bus.h>
49 1.1 petrov #include <machine/autoconf.h>
50 1.1 petrov #include <machine/openfirm.h>
51 1.11 martin #include <machine/vmparam.h>
52 1.1 petrov
53 1.1 petrov #include <dev/wscons/wsconsio.h>
54 1.11 martin #include <dev/sun/fbio.h>
55 1.11 martin #include <dev/sun/fbvar.h>
56 1.1 petrov
57 1.30 martin #include <dev/wsfont/wsfont.h>
58 1.30 martin #include <dev/wscons/wsdisplay_vconsvar.h>
59 1.30 martin
60 1.48 jdc #include <prop/proplib.h>
61 1.48 jdc
62 1.39 jdc #include <dev/i2c/i2cvar.h>
63 1.39 jdc #include <dev/i2c/i2c_bitbang.h>
64 1.39 jdc #include <dev/i2c/ddcvar.h>
65 1.39 jdc
66 1.1 petrov #include <sparc64/dev/ffbreg.h>
67 1.1 petrov #include <sparc64/dev/ffbvar.h>
68 1.1 petrov
69 1.38 macallan #include "opt_wsdisplay_compat.h"
70 1.38 macallan #include "opt_ffb.h"
71 1.38 macallan
72 1.16 macallan #ifndef WS_DEFAULT_BG
73 1.16 macallan /* Sun -> background should be white */
74 1.16 macallan #define WS_DEFAULT_BG 0xf
75 1.16 macallan #endif
76 1.16 macallan
77 1.38 macallan #ifdef FFB_SYNC
78 1.38 macallan #define SYNC ffb_ras_wait(sc)
79 1.38 macallan #else
80 1.38 macallan #define SYNC
81 1.38 macallan #endif
82 1.38 macallan
83 1.39 jdc /* Debugging */
84 1.39 jdc #if !defined FFB_DEBUG
85 1.39 jdc #define FFB_DEBUG 0
86 1.39 jdc #endif
87 1.39 jdc #define DPRINTF(x) if (ffb_debug) printf x
88 1.39 jdc /* Patchable */
89 1.39 jdc extern int ffb_debug;
90 1.39 jdc #if FFB_DEBUG > 0
91 1.39 jdc int ffb_debug = 1;
92 1.39 jdc #else
93 1.39 jdc int ffb_debug = 0;
94 1.39 jdc #endif
95 1.39 jdc
96 1.11 martin extern struct cfdriver ffb_cd;
97 1.11 martin
98 1.1 petrov struct wsscreen_descr ffb_stdscreen = {
99 1.6 heas "sunffb",
100 1.1 petrov 0, 0, /* will be filled in -- XXX shouldn't, it's global. */
101 1.1 petrov 0,
102 1.1 petrov 0, 0,
103 1.31 martin WSSCREEN_REVERSE | WSSCREEN_WSCOLORS,
104 1.31 martin NULL /* modecookie */
105 1.1 petrov };
106 1.1 petrov
107 1.1 petrov const struct wsscreen_descr *ffb_scrlist[] = {
108 1.1 petrov &ffb_stdscreen,
109 1.1 petrov /* XXX other formats? */
110 1.1 petrov };
111 1.1 petrov
112 1.1 petrov struct wsscreen_list ffb_screenlist = {
113 1.1 petrov sizeof(ffb_scrlist) / sizeof(struct wsscreen_descr *),
114 1.1 petrov ffb_scrlist
115 1.1 petrov };
116 1.1 petrov
117 1.30 martin static struct vcons_screen ffb_console_screen;
118 1.16 macallan
119 1.32 christos int ffb_ioctl(void *, void *, u_long, void *, int, struct lwp *);
120 1.7 heas static int ffb_blank(struct ffb_softc *, u_long, u_int *);
121 1.24 jmmv paddr_t ffb_mmap(void *, void *, off_t, int);
122 1.1 petrov void ffb_ras_fifo_wait(struct ffb_softc *, int);
123 1.1 petrov void ffb_ras_wait(struct ffb_softc *);
124 1.1 petrov void ffb_ras_init(struct ffb_softc *);
125 1.1 petrov void ffb_ras_copyrows(void *, int, int, int);
126 1.1 petrov void ffb_ras_erasecols(void *, int, int, int, long int);
127 1.1 petrov void ffb_ras_eraserows(void *, int, int, long int);
128 1.1 petrov void ffb_ras_do_cursor(struct rasops_info *);
129 1.1 petrov void ffb_ras_fill(struct ffb_softc *);
130 1.38 macallan static void ffb_ras_setfg(struct ffb_softc *, int32_t);
131 1.38 macallan static void ffb_ras_setbg(struct ffb_softc *, int32_t);
132 1.1 petrov
133 1.16 macallan void ffb_clearscreen(struct ffb_softc *);
134 1.16 macallan int ffb_load_font(void *, void *, struct wsdisplay_font *);
135 1.30 martin void ffb_init_screen(void *, struct vcons_screen *, int,
136 1.16 macallan long *);
137 1.16 macallan int ffb_allocattr(void *, int, int, int, long *);
138 1.16 macallan void ffb_putchar(void *, int, int, u_int, long);
139 1.16 macallan void ffb_cursor(void *, int, int, int);
140 1.16 macallan
141 1.11 martin /* frame buffer generic driver */
142 1.43 christos static void ffbfb_unblank(device_t);
143 1.11 martin dev_type_open(ffbfb_open);
144 1.11 martin dev_type_close(ffbfb_close);
145 1.11 martin dev_type_ioctl(ffbfb_ioctl);
146 1.11 martin dev_type_mmap(ffbfb_mmap);
147 1.16 macallan
148 1.11 martin static struct fbdriver ffb_fbdriver = {
149 1.11 martin ffbfb_unblank, ffbfb_open, ffbfb_close, ffbfb_ioctl, nopoll,
150 1.11 martin ffbfb_mmap, nokqfilter
151 1.11 martin };
152 1.11 martin
153 1.1 petrov struct wsdisplay_accessops ffb_accessops = {
154 1.30 martin .ioctl = ffb_ioctl,
155 1.30 martin .mmap = ffb_mmap,
156 1.1 petrov };
157 1.1 petrov
158 1.39 jdc /* I2C glue */
159 1.39 jdc static int ffb_i2c_acquire_bus(void *, int);
160 1.39 jdc static void ffb_i2c_release_bus(void *, int);
161 1.39 jdc static int ffb_i2c_send_start(void *, int);
162 1.39 jdc static int ffb_i2c_send_stop(void *, int);
163 1.39 jdc static int ffb_i2c_initiate_xfer(void *, i2c_addr_t, int);
164 1.39 jdc static int ffb_i2c_read_byte(void *, uint8_t *, int);
165 1.39 jdc static int ffb_i2c_write_byte(void *, uint8_t, int);
166 1.39 jdc
167 1.39 jdc /* I2C bitbang glue */
168 1.39 jdc static void ffb_i2cbb_set_bits(void *, uint32_t);
169 1.39 jdc static void ffb_i2cbb_set_dir(void *, uint32_t);
170 1.39 jdc static uint32_t ffb_i2cbb_read(void *);
171 1.39 jdc
172 1.39 jdc static const struct i2c_bitbang_ops ffb_i2cbb_ops = {
173 1.39 jdc ffb_i2cbb_set_bits,
174 1.39 jdc ffb_i2cbb_set_dir,
175 1.39 jdc ffb_i2cbb_read,
176 1.39 jdc {
177 1.39 jdc FFB_DAC_CFG_MPDATA_SDA,
178 1.39 jdc FFB_DAC_CFG_MPDATA_SCL,
179 1.39 jdc 0,
180 1.39 jdc 0
181 1.39 jdc }
182 1.39 jdc };
183 1.39 jdc
184 1.39 jdc void ffb_attach_i2c(struct ffb_softc *);
185 1.39 jdc
186 1.39 jdc /* Video mode setting */
187 1.39 jdc int ffb_tgc_disable(struct ffb_softc *);
188 1.39 jdc void ffb_get_pclk(int, uint32_t *, int *);
189 1.39 jdc int ffb_set_vmode(struct ffb_softc *, struct videomode *, int, int *, int *);
190 1.39 jdc
191 1.39 jdc
192 1.1 petrov void
193 1.48 jdc ffb_attach(device_t self)
194 1.1 petrov {
195 1.48 jdc struct ffb_softc *sc = device_private(self);
196 1.1 petrov struct wsemuldisplaydev_attach_args waa;
197 1.16 macallan struct rasops_info *ri;
198 1.16 macallan long defattr;
199 1.39 jdc const char *model, *out_dev;
200 1.1 petrov int btype;
201 1.30 martin uint32_t dac;
202 1.4 pk int maxrow, maxcol;
203 1.7 heas u_int blank = WSDISPLAYIO_VIDEO_ON;
204 1.4 pk char buf[6+1];
205 1.39 jdc int i, try_edid;
206 1.48 jdc prop_data_t data;
207 1.1 petrov
208 1.1 petrov printf(":");
209 1.38 macallan
210 1.1 petrov if (sc->sc_type == FFB_CREATOR) {
211 1.5 pk btype = prom_getpropint(sc->sc_node, "board_type", 0);
212 1.1 petrov if ((btype & 7) == 3)
213 1.1 petrov printf(" Creator3D");
214 1.1 petrov else
215 1.1 petrov printf(" Creator");
216 1.39 jdc } else {
217 1.1 petrov printf(" Elite3D");
218 1.39 jdc btype = 0;
219 1.39 jdc }
220 1.1 petrov
221 1.5 pk model = prom_getpropstring(sc->sc_node, "model");
222 1.1 petrov if (model == NULL || strlen(model) == 0)
223 1.1 petrov model = "unknown";
224 1.1 petrov
225 1.1 petrov sc->sc_depth = 24;
226 1.1 petrov sc->sc_linebytes = 8192;
227 1.39 jdc /* We might alter these during EDID mode setting */
228 1.5 pk sc->sc_height = prom_getpropint(sc->sc_node, "height", 0);
229 1.5 pk sc->sc_width = prom_getpropint(sc->sc_node, "width", 0);
230 1.30 martin
231 1.30 martin sc->sc_locked = 0;
232 1.30 martin sc->sc_mode = WSDISPLAYIO_MODE_EMUL;
233 1.30 martin
234 1.4 pk maxcol = (prom_getoption("screen-#columns", buf, sizeof buf) == 0)
235 1.4 pk ? strtoul(buf, NULL, 10)
236 1.4 pk : 80;
237 1.4 pk
238 1.30 martin maxrow = (prom_getoption("screen-#rows", buf, sizeof buf) != 0)
239 1.4 pk ? strtoul(buf, NULL, 10)
240 1.4 pk : 34;
241 1.4 pk
242 1.8 heas /* collect DAC version, as Elite3D cursor enable bit is reversed */
243 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_DEVID);
244 1.30 martin dac = DAC_READ(sc, FFB_DAC_VALUE);
245 1.30 martin sc->sc_dacrev = (dac >> 28) & 0xf;
246 1.8 heas
247 1.30 martin if (sc->sc_type == FFB_AFB) {
248 1.8 heas sc->sc_dacrev = 10;
249 1.30 martin sc->sc_needredraw = 0;
250 1.30 martin } else {
251 1.30 martin /* see what kind of DAC we have */
252 1.30 martin int pnum = (dac & 0x0ffff000) >> 12;
253 1.30 martin if (pnum == 0x236e) {
254 1.30 martin sc->sc_needredraw = 0;
255 1.30 martin } else {
256 1.30 martin sc->sc_needredraw = 1;
257 1.30 martin }
258 1.30 martin }
259 1.8 heas printf(", model %s, dac %u\n", model, sc->sc_dacrev);
260 1.30 martin if (sc->sc_needredraw)
261 1.30 martin printf("%s: found old DAC, enabling redraw on unblank\n",
262 1.43 christos device_xname(sc->sc_dev));
263 1.8 heas
264 1.39 jdc /* Check if a console resolution "<device>:r<res>" is set. */
265 1.39 jdc if (sc->sc_console) {
266 1.39 jdc out_dev = prom_getpropstring(sc->sc_node, "output_device");
267 1.39 jdc if (out_dev != NULL && strlen(out_dev) != 0 &&
268 1.39 jdc strstr(out_dev, ":r") != NULL)
269 1.39 jdc try_edid = 0;
270 1.39 jdc else
271 1.39 jdc try_edid = 1;
272 1.39 jdc } else
273 1.39 jdc try_edid = 1;
274 1.39 jdc
275 1.46 macallan #if FFB_DEBUG > 0
276 1.45 macallan DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_TGC);
277 1.45 macallan printf("tgc: %08x\n", DAC_READ(sc, FFB_DAC_VALUE));
278 1.45 macallan DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_DAC_CTRL);
279 1.45 macallan printf("dcl: %08x\n", DAC_READ(sc, FFB_DAC_VALUE));
280 1.45 macallan #endif
281 1.39 jdc ffb_attach_i2c(sc);
282 1.39 jdc
283 1.39 jdc /* Need to set asynchronous blank during DDC write/read */
284 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_USR_CTRL);
285 1.39 jdc dac = DAC_READ(sc, FFB_DAC_VALUE);
286 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_USR_CTRL);
287 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, dac | FFB_DAC_USR_CTRL_BLANK);
288 1.39 jdc
289 1.39 jdc /* Some monitors don't respond first time */
290 1.39 jdc i = 0;
291 1.39 jdc while (sc->sc_edid_data[1] == 0 && i++ < 3)
292 1.39 jdc ddc_read_edid(&sc->sc_i2c, sc->sc_edid_data, EDID_DATA_LEN);
293 1.39 jdc
294 1.39 jdc /* Remove asynchronous blank */
295 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_USR_CTRL);
296 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, dac);
297 1.39 jdc
298 1.39 jdc if (edid_parse(&sc->sc_edid_data[0], &sc->sc_edid_info) != -1) {
299 1.39 jdc sort_modes(sc->sc_edid_info.edid_modes,
300 1.39 jdc &sc->sc_edid_info.edid_preferred_mode,
301 1.39 jdc sc->sc_edid_info.edid_nmodes);
302 1.43 christos DPRINTF(("%s: EDID data:\n ", device_xname(sc->sc_dev)));
303 1.39 jdc for (i = 0; i < EDID_DATA_LEN; i++) {
304 1.39 jdc if (i && !(i % 32))
305 1.39 jdc DPRINTF(("\n "));
306 1.39 jdc if (i && !(i % 4))
307 1.39 jdc DPRINTF((" "));
308 1.39 jdc DPRINTF(("%02x", sc->sc_edid_data[i]));
309 1.39 jdc }
310 1.39 jdc DPRINTF(("\n"));
311 1.39 jdc if (ffb_debug)
312 1.39 jdc edid_print(&sc->sc_edid_info);
313 1.39 jdc
314 1.48 jdc data = prop_data_create_data(sc->sc_edid_data, EDID_DATA_LEN);
315 1.48 jdc prop_dictionary_set(device_properties(self), "EDID", data);
316 1.48 jdc prop_object_release(data);
317 1.48 jdc
318 1.39 jdc if (try_edid)
319 1.39 jdc for (i = 0; i < sc->sc_edid_info.edid_nmodes; i++) {
320 1.39 jdc if (ffb_set_vmode(sc,
321 1.39 jdc &(sc->sc_edid_info.edid_modes[i]), btype,
322 1.39 jdc &(sc->sc_width), &(sc->sc_height)))
323 1.39 jdc break;
324 1.39 jdc }
325 1.39 jdc } else {
326 1.43 christos DPRINTF(("%s: No EDID data.\n", device_xname(sc->sc_dev)));
327 1.39 jdc }
328 1.39 jdc
329 1.39 jdc ffb_ras_init(sc);
330 1.39 jdc
331 1.7 heas ffb_blank(sc, WSDISPLAYIO_SVIDEO, &blank);
332 1.7 heas
333 1.43 christos sc->sc_accel = ((device_cfdata(sc->sc_dev)->cf_flags &
334 1.23 thorpej FFB_CFFLAG_NOACCEL) == 0);
335 1.16 macallan
336 1.16 macallan wsfont_init();
337 1.16 macallan
338 1.30 martin vcons_init(&sc->vd, sc, &ffb_stdscreen, &ffb_accessops);
339 1.30 martin sc->vd.init_screen = ffb_init_screen;
340 1.30 martin
341 1.19 jdc /* we mess with ffb_console_screen only once */
342 1.19 jdc if (sc->sc_console) {
343 1.30 martin vcons_init_screen(&sc->vd, &ffb_console_screen, 1, &defattr);
344 1.30 martin SCREEN_VISIBLE((&ffb_console_screen));
345 1.30 martin /*
346 1.30 martin * XXX we shouldn't use a global variable for the console
347 1.30 martin * screen
348 1.30 martin */
349 1.30 martin sc->vd.active = &ffb_console_screen;
350 1.30 martin ffb_console_screen.scr_flags = VCONS_SCREEN_IS_STATIC;
351 1.30 martin } else {
352 1.30 martin if (ffb_console_screen.scr_ri.ri_rows == 0) {
353 1.30 martin /* do some minimal setup to avoid weirdnesses later */
354 1.30 martin vcons_init_screen(&sc->vd, &ffb_console_screen, 1, &defattr);
355 1.30 martin }
356 1.19 jdc }
357 1.30 martin ri = &ffb_console_screen.scr_ri;
358 1.16 macallan
359 1.16 macallan ffb_stdscreen.nrows = ri->ri_rows;
360 1.16 macallan ffb_stdscreen.ncols = ri->ri_cols;
361 1.16 macallan ffb_stdscreen.textops = &ri->ri_ops;
362 1.16 macallan ffb_stdscreen.capabilities = ri->ri_caps;
363 1.16 macallan
364 1.11 martin sc->sc_fb.fb_driver = &ffb_fbdriver;
365 1.11 martin sc->sc_fb.fb_type.fb_cmsize = 0;
366 1.11 martin sc->sc_fb.fb_type.fb_size = maxrow * sc->sc_linebytes;
367 1.11 martin sc->sc_fb.fb_type.fb_type = FBTYPE_CREATOR;
368 1.12 mhitch sc->sc_fb.fb_type.fb_width = sc->sc_width;
369 1.12 mhitch sc->sc_fb.fb_type.fb_depth = sc->sc_depth;
370 1.12 mhitch sc->sc_fb.fb_type.fb_height = sc->sc_height;
371 1.43 christos sc->sc_fb.fb_device = sc->sc_dev;
372 1.11 martin fb_attach(&sc->sc_fb, sc->sc_console);
373 1.11 martin
374 1.37 macallan ffb_clearscreen(sc);
375 1.37 macallan
376 1.1 petrov if (sc->sc_console) {
377 1.16 macallan wsdisplay_cnattach(&ffb_stdscreen, ri, 0, 0, defattr);
378 1.37 macallan vcons_replay_msgbuf(&ffb_console_screen);
379 1.1 petrov }
380 1.16 macallan
381 1.1 petrov waa.console = sc->sc_console;
382 1.1 petrov waa.scrdata = &ffb_screenlist;
383 1.1 petrov waa.accessops = &ffb_accessops;
384 1.30 martin waa.accesscookie = &sc->vd;
385 1.43 christos config_found(sc->sc_dev, &waa, wsemuldisplaydevprint);
386 1.1 petrov }
387 1.1 petrov
388 1.39 jdc void
389 1.39 jdc ffb_attach_i2c(struct ffb_softc *sc)
390 1.39 jdc {
391 1.39 jdc
392 1.39 jdc /* Fill in the i2c tag */
393 1.39 jdc sc->sc_i2c.ic_cookie = sc;
394 1.39 jdc sc->sc_i2c.ic_acquire_bus = ffb_i2c_acquire_bus;
395 1.39 jdc sc->sc_i2c.ic_release_bus = ffb_i2c_release_bus;
396 1.39 jdc sc->sc_i2c.ic_send_start = ffb_i2c_send_start;
397 1.39 jdc sc->sc_i2c.ic_send_stop = ffb_i2c_send_stop;
398 1.39 jdc sc->sc_i2c.ic_initiate_xfer = ffb_i2c_initiate_xfer;
399 1.39 jdc sc->sc_i2c.ic_read_byte = ffb_i2c_read_byte;
400 1.39 jdc sc->sc_i2c.ic_write_byte = ffb_i2c_write_byte;
401 1.39 jdc sc->sc_i2c.ic_exec = NULL;
402 1.39 jdc }
403 1.39 jdc
404 1.1 petrov int
405 1.32 christos ffb_ioctl(void *v, void *vs, u_long cmd, void *data, int flags, struct lwp *l)
406 1.1 petrov {
407 1.30 martin struct vcons_data *vd = v;
408 1.30 martin struct ffb_softc *sc = vd->cookie;
409 1.1 petrov struct wsdisplay_fbinfo *wdf;
410 1.30 martin struct vcons_screen *ms = vd->active;
411 1.39 jdc
412 1.39 jdc DPRINTF(("ffb_ioctl: %s cmd _IO%s%s('%c', %lu)\n",
413 1.43 christos device_xname(sc->sc_dev),
414 1.1 petrov (cmd & IOC_IN) ? "W" : "", (cmd & IOC_OUT) ? "R" : "",
415 1.39 jdc (char)IOCGROUP(cmd), cmd & 0xff));
416 1.1 petrov
417 1.1 petrov switch (cmd) {
418 1.11 martin case FBIOGTYPE:
419 1.11 martin *(struct fbtype *)data = sc->sc_fb.fb_type;
420 1.11 martin break;
421 1.11 martin case FBIOGATTR:
422 1.11 martin #define fba ((struct fbgattr *)data)
423 1.11 martin fba->real_type = sc->sc_fb.fb_type.fb_type;
424 1.11 martin fba->owner = 0; /* XXX ??? */
425 1.11 martin fba->fbtype = sc->sc_fb.fb_type;
426 1.11 martin fba->sattr.flags = 0;
427 1.11 martin fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type;
428 1.11 martin fba->sattr.dev_specific[0] = -1;
429 1.11 martin fba->emu_types[0] = sc->sc_fb.fb_type.fb_type;
430 1.11 martin fba->emu_types[1] = -1;
431 1.11 martin #undef fba
432 1.11 martin break;
433 1.11 martin
434 1.11 martin case FBIOGETCMAP:
435 1.11 martin case FBIOPUTCMAP:
436 1.11 martin return EIO;
437 1.11 martin
438 1.11 martin case FBIOGVIDEO:
439 1.11 martin case FBIOSVIDEO:
440 1.11 martin return ffb_blank(sc, cmd == FBIOGVIDEO?
441 1.11 martin WSDISPLAYIO_GVIDEO : WSDISPLAYIO_SVIDEO,
442 1.11 martin (u_int *)data);
443 1.11 martin break;
444 1.11 martin case FBIOGCURSOR:
445 1.11 martin case FBIOSCURSOR:
446 1.13 martin /* the console driver is not using the hardware cursor */
447 1.13 martin break;
448 1.11 martin case FBIOGCURPOS:
449 1.43 christos printf("%s: FBIOGCURPOS not implemented\n",
450 1.43 christos device_xname(sc->sc_dev));
451 1.11 martin return EIO;
452 1.11 martin case FBIOSCURPOS:
453 1.43 christos printf("%s: FBIOSCURPOS not implemented\n",
454 1.43 christos device_xname(sc->sc_dev));
455 1.11 martin return EIO;
456 1.11 martin case FBIOGCURMAX:
457 1.43 christos printf("%s: FBIOGCURMAX not implemented\n",
458 1.43 christos device_xname(sc->sc_dev));
459 1.11 martin return EIO;
460 1.11 martin
461 1.1 petrov case WSDISPLAYIO_GTYPE:
462 1.6 heas *(u_int *)data = WSDISPLAY_TYPE_SUNFFB;
463 1.1 petrov break;
464 1.1 petrov case WSDISPLAYIO_SMODE:
465 1.16 macallan {
466 1.16 macallan if (sc->sc_mode != *(u_int *)data) {
467 1.16 macallan sc->sc_mode = *(u_int *)data;
468 1.30 martin if ((sc->sc_mode == WSDISPLAYIO_MODE_EMUL) &&
469 1.30 martin (sc->sc_locked == 0)) {
470 1.16 macallan ffb_ras_init(sc);
471 1.30 martin vcons_redraw_screen(ms);
472 1.16 macallan }
473 1.16 macallan }
474 1.16 macallan }
475 1.1 petrov break;
476 1.1 petrov case WSDISPLAYIO_GINFO:
477 1.1 petrov wdf = (void *)data;
478 1.1 petrov wdf->height = sc->sc_height;
479 1.1 petrov wdf->width = sc->sc_width;
480 1.1 petrov wdf->depth = 32;
481 1.1 petrov wdf->cmsize = 256; /* XXX */
482 1.1 petrov break;
483 1.1 petrov #ifdef WSDISPLAYIO_LINEBYTES
484 1.1 petrov case WSDISPLAYIO_LINEBYTES:
485 1.1 petrov *(u_int *)data = sc->sc_linebytes;
486 1.1 petrov break;
487 1.1 petrov #endif
488 1.1 petrov case WSDISPLAYIO_GETCMAP:
489 1.1 petrov break;/* XXX */
490 1.1 petrov
491 1.1 petrov case WSDISPLAYIO_PUTCMAP:
492 1.1 petrov break;/* XXX */
493 1.1 petrov
494 1.1 petrov case WSDISPLAYIO_SVIDEO:
495 1.1 petrov case WSDISPLAYIO_GVIDEO:
496 1.7 heas return(ffb_blank(sc, cmd, (u_int *)data));
497 1.7 heas break;
498 1.1 petrov case WSDISPLAYIO_GCURPOS:
499 1.1 petrov case WSDISPLAYIO_SCURPOS:
500 1.1 petrov case WSDISPLAYIO_GCURMAX:
501 1.1 petrov case WSDISPLAYIO_GCURSOR:
502 1.1 petrov case WSDISPLAYIO_SCURSOR:
503 1.9 martin return EIO; /* not supported yet */
504 1.48 jdc break;
505 1.48 jdc case WSDISPLAYIO_GET_EDID: {
506 1.48 jdc struct wsdisplayio_edid_info *d = data;
507 1.48 jdc return wsdisplayio_get_edid(sc->sc_dev, d);
508 1.48 jdc }
509 1.1 petrov default:
510 1.9 martin return EPASSTHROUGH;
511 1.39 jdc }
512 1.1 petrov
513 1.1 petrov return (0);
514 1.1 petrov }
515 1.1 petrov
516 1.7 heas /* blank/unblank the screen */
517 1.7 heas static int
518 1.7 heas ffb_blank(struct ffb_softc *sc, u_long cmd, u_int *data)
519 1.7 heas {
520 1.30 martin struct vcons_screen *ms = sc->vd.active;
521 1.7 heas u_int val;
522 1.30 martin
523 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_TGC);
524 1.7 heas val = DAC_READ(sc, FFB_DAC_VALUE);
525 1.7 heas
526 1.7 heas switch (cmd) {
527 1.7 heas case WSDISPLAYIO_GVIDEO:
528 1.7 heas *data = val & 1;
529 1.7 heas return(0);
530 1.7 heas break;
531 1.7 heas case WSDISPLAYIO_SVIDEO:
532 1.7 heas if (*data == WSDISPLAYIO_VIDEO_OFF)
533 1.7 heas val &= ~1;
534 1.7 heas else if (*data == WSDISPLAYIO_VIDEO_ON)
535 1.7 heas val |= 1;
536 1.7 heas else
537 1.7 heas return(EINVAL);
538 1.7 heas break;
539 1.7 heas default:
540 1.7 heas return(EINVAL);
541 1.7 heas }
542 1.7 heas
543 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_TGC);
544 1.7 heas DAC_WRITE(sc, FFB_DAC_VALUE, val);
545 1.30 martin
546 1.30 martin if ((val & 1) && sc->sc_needredraw) {
547 1.30 martin if (ms != NULL) {
548 1.30 martin if ((sc->sc_mode == WSDISPLAYIO_MODE_EMUL) &&
549 1.30 martin (sc->sc_locked == 0)) {
550 1.30 martin ffb_ras_init(sc);
551 1.30 martin vcons_redraw_screen(ms);
552 1.30 martin }
553 1.30 martin }
554 1.30 martin }
555 1.7 heas
556 1.7 heas return(0);
557 1.7 heas }
558 1.7 heas
559 1.1 petrov paddr_t
560 1.24 jmmv ffb_mmap(void *vsc, void *vs, off_t off, int prot)
561 1.1 petrov {
562 1.30 martin struct vcons_data *vd = vsc;
563 1.30 martin struct ffb_softc *sc = vd->cookie;
564 1.1 petrov int i;
565 1.1 petrov
566 1.1 petrov switch (sc->sc_mode) {
567 1.1 petrov case WSDISPLAYIO_MODE_MAPPED:
568 1.1 petrov for (i = 0; i < sc->sc_nreg; i++) {
569 1.1 petrov /* Before this set? */
570 1.1 petrov if (off < sc->sc_addrs[i])
571 1.1 petrov continue;
572 1.1 petrov /* After this set? */
573 1.1 petrov if (off >= (sc->sc_addrs[i] + sc->sc_sizes[i]))
574 1.1 petrov continue;
575 1.1 petrov
576 1.1 petrov return (bus_space_mmap(sc->sc_bt, sc->sc_addrs[i],
577 1.1 petrov off - sc->sc_addrs[i], prot, BUS_SPACE_MAP_LINEAR));
578 1.1 petrov }
579 1.1 petrov break;
580 1.1 petrov #ifdef WSDISPLAYIO_MODE_DUMBFB
581 1.1 petrov case WSDISPLAYIO_MODE_DUMBFB:
582 1.1 petrov if (sc->sc_nreg < FFB_REG_DFB24)
583 1.1 petrov break;
584 1.1 petrov if (off >= 0 && off < sc->sc_sizes[FFB_REG_DFB24])
585 1.1 petrov return (bus_space_mmap(sc->sc_bt,
586 1.1 petrov sc->sc_addrs[FFB_REG_DFB24], off, prot,
587 1.1 petrov BUS_SPACE_MAP_LINEAR));
588 1.1 petrov break;
589 1.1 petrov #endif
590 1.1 petrov }
591 1.1 petrov return (-1);
592 1.1 petrov }
593 1.1 petrov
594 1.1 petrov void
595 1.10 martin ffb_ras_fifo_wait(struct ffb_softc *sc, int n)
596 1.1 petrov {
597 1.1 petrov int32_t cache = sc->sc_fifo_cache;
598 1.1 petrov
599 1.1 petrov if (cache < n) {
600 1.1 petrov do {
601 1.1 petrov cache = FBC_READ(sc, FFB_FBC_UCSR);
602 1.1 petrov cache = (cache & FBC_UCSR_FIFO_MASK) - 8;
603 1.1 petrov } while (cache < n);
604 1.1 petrov }
605 1.1 petrov sc->sc_fifo_cache = cache - n;
606 1.1 petrov }
607 1.1 petrov
608 1.1 petrov void
609 1.10 martin ffb_ras_wait(struct ffb_softc *sc)
610 1.1 petrov {
611 1.22 cdi uint32_t ucsr, r;
612 1.1 petrov
613 1.1 petrov while (1) {
614 1.1 petrov ucsr = FBC_READ(sc, FFB_FBC_UCSR);
615 1.1 petrov if ((ucsr & (FBC_UCSR_FB_BUSY|FBC_UCSR_RP_BUSY)) == 0)
616 1.1 petrov break;
617 1.1 petrov r = ucsr & (FBC_UCSR_READ_ERR | FBC_UCSR_FIFO_OVFL);
618 1.1 petrov if (r != 0)
619 1.1 petrov FBC_WRITE(sc, FFB_FBC_UCSR, r);
620 1.1 petrov }
621 1.1 petrov }
622 1.1 petrov
623 1.1 petrov void
624 1.10 martin ffb_ras_init(struct ffb_softc *sc)
625 1.1 petrov {
626 1.39 jdc uint32_t fbc;
627 1.39 jdc
628 1.39 jdc if (sc->sc_width > 1280) {
629 1.39 jdc DPRINTF(("ffb_ras_init: high resolution.\n"));
630 1.45 macallan fbc = FFB_FBC_WM_COMBINED | FFB_FBC_WE_FORCEON |
631 1.39 jdc FFB_FBC_ZE_OFF | FFB_FBC_YE_OFF | FFB_FBC_XE_ON;
632 1.39 jdc } else {
633 1.39 jdc DPRINTF(("ffb_ras_init: standard resolution.\n"));
634 1.39 jdc fbc = FFB_FBC_XE_OFF;
635 1.39 jdc }
636 1.49 macallan ffb_ras_fifo_wait(sc, 11);
637 1.45 macallan DPRINTF(("WID: %08x\n", FBC_READ(sc, FFB_FBC_WID)));
638 1.45 macallan FBC_WRITE(sc, FFB_FBC_WID, 0x0);
639 1.1 petrov FBC_WRITE(sc, FFB_FBC_PPC,
640 1.38 macallan FBC_PPC_VCE_DIS | FBC_PPC_TBE_OPAQUE | FBC_PPC_ACE_DIS |
641 1.45 macallan FBC_PPC_APE_DIS | FBC_PPC_DCE_DIS | FBC_PPC_CS_CONST |
642 1.49 macallan FBC_PPC_ABE_DIS | FBC_PPC_XS_WID);
643 1.45 macallan
644 1.45 macallan fbc |= FFB_FBC_WB_A | FFB_FBC_RB_A | FFB_FBC_SB_BOTH |
645 1.45 macallan FFB_FBC_RGBE_MASK;
646 1.45 macallan DPRINTF(("%s: fbc is %08x\n", __func__, fbc));
647 1.45 macallan FBC_WRITE(sc, FFB_FBC_FBC, fbc);
648 1.1 petrov FBC_WRITE(sc, FFB_FBC_ROP, FBC_ROP_NEW);
649 1.1 petrov FBC_WRITE(sc, FFB_FBC_DRAWOP, FBC_DRAWOP_RECTANGLE);
650 1.1 petrov FBC_WRITE(sc, FFB_FBC_PMASK, 0xffffffff);
651 1.1 petrov FBC_WRITE(sc, FFB_FBC_FONTINC, 0x10000);
652 1.1 petrov sc->sc_fg_cache = 0;
653 1.1 petrov FBC_WRITE(sc, FFB_FBC_FG, sc->sc_fg_cache);
654 1.49 macallan FBC_WRITE(sc, FFB_FBC_BLENDC, FFB_BLENDC_FORCE_ONE |
655 1.49 macallan FFB_BLENDC_DF_ONE_M_A |
656 1.49 macallan FFB_BLENDC_SF_A);
657 1.49 macallan FBC_WRITE(sc, FFB_FBC_BLENDC1, 0);
658 1.49 macallan FBC_WRITE(sc, FFB_FBC_BLENDC2, 0);
659 1.1 petrov ffb_ras_wait(sc);
660 1.1 petrov }
661 1.1 petrov
662 1.1 petrov void
663 1.10 martin ffb_ras_eraserows(void *cookie, int row, int n, long attr)
664 1.1 petrov {
665 1.1 petrov struct rasops_info *ri = cookie;
666 1.30 martin struct vcons_screen *scr = ri->ri_hw;
667 1.30 martin struct ffb_softc *sc = scr->scr_cookie;
668 1.1 petrov
669 1.30 martin if (row < 0) {
670 1.30 martin n += row;
671 1.30 martin row = 0;
672 1.30 martin }
673 1.30 martin if (row + n > ri->ri_rows)
674 1.30 martin n = ri->ri_rows - row;
675 1.30 martin if (n <= 0)
676 1.30 martin return;
677 1.16 macallan
678 1.30 martin ffb_ras_fill(sc);
679 1.30 martin ffb_ras_setfg(sc, ri->ri_devcmap[(attr >> 16) & 0xf]);
680 1.30 martin ffb_ras_fifo_wait(sc, 4);
681 1.30 martin if ((n == ri->ri_rows) && (ri->ri_flg & RI_FULLCLEAR)) {
682 1.30 martin FBC_WRITE(sc, FFB_FBC_BY, 0);
683 1.30 martin FBC_WRITE(sc, FFB_FBC_BX, 0);
684 1.30 martin FBC_WRITE(sc, FFB_FBC_BH, ri->ri_height);
685 1.30 martin FBC_WRITE(sc, FFB_FBC_BW, ri->ri_width);
686 1.30 martin } else {
687 1.30 martin row *= ri->ri_font->fontheight;
688 1.30 martin FBC_WRITE(sc, FFB_FBC_BY, ri->ri_yorigin + row);
689 1.30 martin FBC_WRITE(sc, FFB_FBC_BX, ri->ri_xorigin);
690 1.30 martin FBC_WRITE(sc, FFB_FBC_BH, n * ri->ri_font->fontheight);
691 1.30 martin FBC_WRITE(sc, FFB_FBC_BW, ri->ri_emuwidth);
692 1.1 petrov }
693 1.38 macallan SYNC;
694 1.1 petrov }
695 1.1 petrov
696 1.1 petrov void
697 1.10 martin ffb_ras_erasecols(void *cookie, int row, int col, int n, long attr)
698 1.1 petrov {
699 1.1 petrov struct rasops_info *ri = cookie;
700 1.30 martin struct vcons_screen *scr = ri->ri_hw;
701 1.30 martin struct ffb_softc *sc = scr->scr_cookie;
702 1.30 martin
703 1.30 martin if ((row < 0) || (row >= ri->ri_rows))
704 1.30 martin return;
705 1.30 martin if (col < 0) {
706 1.30 martin n += col;
707 1.30 martin col = 0;
708 1.30 martin }
709 1.30 martin if (col + n > ri->ri_cols)
710 1.30 martin n = ri->ri_cols - col;
711 1.30 martin if (n <= 0)
712 1.30 martin return;
713 1.30 martin n *= ri->ri_font->fontwidth;
714 1.30 martin col *= ri->ri_font->fontwidth;
715 1.30 martin row *= ri->ri_font->fontheight;
716 1.1 petrov
717 1.30 martin ffb_ras_fill(sc);
718 1.30 martin ffb_ras_setfg(sc, ri->ri_devcmap[(attr >> 16) & 0xf]);
719 1.30 martin ffb_ras_fifo_wait(sc, 4);
720 1.30 martin FBC_WRITE(sc, FFB_FBC_BY, ri->ri_yorigin + row);
721 1.30 martin FBC_WRITE(sc, FFB_FBC_BX, ri->ri_xorigin + col);
722 1.30 martin FBC_WRITE(sc, FFB_FBC_BH, ri->ri_font->fontheight);
723 1.30 martin FBC_WRITE(sc, FFB_FBC_BW, n - 1);
724 1.38 macallan SYNC;
725 1.1 petrov }
726 1.1 petrov
727 1.1 petrov void
728 1.10 martin ffb_ras_fill(struct ffb_softc *sc)
729 1.1 petrov {
730 1.49 macallan ffb_ras_fifo_wait(sc, 3);
731 1.49 macallan FBC_WRITE(sc, FFB_FBC_PPC,
732 1.49 macallan FBC_PPC_VCE_DIS | FBC_PPC_TBE_OPAQUE | FBC_PPC_ACE_DIS |
733 1.49 macallan FBC_PPC_APE_DIS | FBC_PPC_DCE_DIS | FBC_PPC_CS_CONST |
734 1.49 macallan FBC_PPC_ABE_DIS | FBC_PPC_XS_WID);
735 1.1 petrov FBC_WRITE(sc, FFB_FBC_ROP, FBC_ROP_NEW);
736 1.1 petrov FBC_WRITE(sc, FFB_FBC_DRAWOP, FBC_DRAWOP_RECTANGLE);
737 1.38 macallan SYNC;
738 1.1 petrov }
739 1.1 petrov
740 1.1 petrov void
741 1.10 martin ffb_ras_copyrows(void *cookie, int src, int dst, int n)
742 1.1 petrov {
743 1.1 petrov struct rasops_info *ri = cookie;
744 1.30 martin struct vcons_screen *scr = ri->ri_hw;
745 1.30 martin struct ffb_softc *sc = scr->scr_cookie;
746 1.1 petrov
747 1.30 martin if (dst == src)
748 1.30 martin return;
749 1.30 martin if (src < 0) {
750 1.30 martin n += src;
751 1.30 martin src = 0;
752 1.30 martin }
753 1.30 martin if ((src + n) > ri->ri_rows)
754 1.30 martin n = ri->ri_rows - src;
755 1.30 martin if (dst < 0) {
756 1.30 martin n += dst;
757 1.30 martin dst = 0;
758 1.30 martin }
759 1.30 martin if ((dst + n) > ri->ri_rows)
760 1.30 martin n = ri->ri_rows - dst;
761 1.30 martin if (n <= 0)
762 1.30 martin return;
763 1.30 martin n *= ri->ri_font->fontheight;
764 1.30 martin src *= ri->ri_font->fontheight;
765 1.30 martin dst *= ri->ri_font->fontheight;
766 1.30 martin
767 1.49 macallan ffb_ras_fifo_wait(sc, 9);
768 1.49 macallan FBC_WRITE(sc, FFB_FBC_PPC,
769 1.49 macallan FBC_PPC_VCE_DIS | FBC_PPC_TBE_OPAQUE | FBC_PPC_ACE_DIS |
770 1.49 macallan FBC_PPC_APE_DIS | FBC_PPC_DCE_DIS | FBC_PPC_CS_CONST |
771 1.49 macallan FBC_PPC_ABE_DIS | FBC_PPC_XS_WID);
772 1.30 martin FBC_WRITE(sc, FFB_FBC_ROP, FBC_ROP_OLD | (FBC_ROP_OLD << 8));
773 1.30 martin FBC_WRITE(sc, FFB_FBC_DRAWOP, FBC_DRAWOP_VSCROLL);
774 1.30 martin FBC_WRITE(sc, FFB_FBC_BY, ri->ri_yorigin + src);
775 1.30 martin FBC_WRITE(sc, FFB_FBC_BX, ri->ri_xorigin);
776 1.30 martin FBC_WRITE(sc, FFB_FBC_DY, ri->ri_yorigin + dst);
777 1.30 martin FBC_WRITE(sc, FFB_FBC_DX, ri->ri_xorigin);
778 1.30 martin FBC_WRITE(sc, FFB_FBC_BH, n);
779 1.30 martin FBC_WRITE(sc, FFB_FBC_BW, ri->ri_emuwidth);
780 1.38 macallan SYNC;
781 1.1 petrov }
782 1.1 petrov
783 1.38 macallan static void
784 1.10 martin ffb_ras_setfg(struct ffb_softc *sc, int32_t fg)
785 1.1 petrov {
786 1.1 petrov ffb_ras_fifo_wait(sc, 1);
787 1.1 petrov if (fg == sc->sc_fg_cache)
788 1.1 petrov return;
789 1.1 petrov sc->sc_fg_cache = fg;
790 1.1 petrov FBC_WRITE(sc, FFB_FBC_FG, fg);
791 1.38 macallan SYNC;
792 1.38 macallan }
793 1.38 macallan
794 1.38 macallan static void
795 1.38 macallan ffb_ras_setbg(struct ffb_softc *sc, int32_t bg)
796 1.38 macallan {
797 1.38 macallan ffb_ras_fifo_wait(sc, 1);
798 1.38 macallan if (bg == sc->sc_bg_cache)
799 1.38 macallan return;
800 1.38 macallan sc->sc_bg_cache = bg;
801 1.38 macallan FBC_WRITE(sc, FFB_FBC_BG, bg);
802 1.38 macallan SYNC;
803 1.1 petrov }
804 1.11 martin
805 1.11 martin /* frame buffer generic driver support functions */
806 1.11 martin static void
807 1.43 christos ffbfb_unblank(device_t dev)
808 1.11 martin {
809 1.35 martin struct ffb_softc *sc = device_private(dev);
810 1.30 martin struct vcons_screen *ms = sc->vd.active;
811 1.29 martin u_int on = 1;
812 1.30 martin int redraw = 0;
813 1.30 martin
814 1.30 martin ffb_ras_init(sc);
815 1.30 martin if (sc->sc_locked) {
816 1.30 martin sc->sc_locked = 0;
817 1.30 martin redraw = 1;
818 1.30 martin }
819 1.30 martin
820 1.36 macallan ffb_blank(sc, WSDISPLAYIO_SVIDEO, &on);
821 1.36 macallan #if 0
822 1.30 martin if ((sc->vd.active != &ffb_console_screen) &&
823 1.30 martin (ffb_console_screen.scr_flags & VCONS_SCREEN_IS_STATIC)) {
824 1.30 martin /*
825 1.30 martin * force-switch to the console screen.
826 1.30 martin * Caveat: the higher layer will think we're still on the
827 1.30 martin * other screen
828 1.30 martin */
829 1.30 martin
830 1.30 martin SCREEN_INVISIBLE(sc->vd.active);
831 1.30 martin sc->vd.active = &ffb_console_screen;
832 1.30 martin SCREEN_VISIBLE(sc->vd.active);
833 1.30 martin ms = sc->vd.active;
834 1.30 martin redraw = 1;
835 1.30 martin }
836 1.36 macallan #endif
837 1.30 martin if (redraw) {
838 1.30 martin vcons_redraw_screen(ms);
839 1.30 martin }
840 1.11 martin }
841 1.11 martin
842 1.11 martin int
843 1.21 christos ffbfb_open(dev_t dev, int flags, int mode, struct lwp *l)
844 1.11 martin {
845 1.30 martin struct ffb_softc *sc;
846 1.11 martin
847 1.34 cegger sc = device_lookup_private(&ffb_cd, minor(dev));
848 1.34 cegger if (sc == NULL)
849 1.11 martin return ENXIO;
850 1.30 martin
851 1.30 martin sc->sc_locked = 1;
852 1.11 martin return 0;
853 1.11 martin }
854 1.11 martin
855 1.11 martin int
856 1.21 christos ffbfb_close(dev_t dev, int flags, int mode, struct lwp *l)
857 1.11 martin {
858 1.34 cegger struct ffb_softc *sc = device_lookup_private(&ffb_cd, minor(dev));
859 1.30 martin struct vcons_screen *ms = sc->vd.active;
860 1.30 martin
861 1.30 martin sc->sc_locked = 0;
862 1.30 martin if (ms != NULL) {
863 1.30 martin if ((sc->sc_mode == WSDISPLAYIO_MODE_EMUL) &&
864 1.30 martin (sc->sc_locked == 0)) {
865 1.30 martin ffb_ras_init(sc);
866 1.30 martin vcons_redraw_screen(ms);
867 1.30 martin }
868 1.30 martin }
869 1.11 martin return 0;
870 1.11 martin }
871 1.11 martin
872 1.11 martin int
873 1.32 christos ffbfb_ioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l)
874 1.11 martin {
875 1.34 cegger struct ffb_softc *sc = device_lookup_private(&ffb_cd, minor(dev));
876 1.11 martin
877 1.30 martin return ffb_ioctl(&sc->vd, NULL, cmd, data, flags, l);
878 1.11 martin }
879 1.11 martin
880 1.11 martin paddr_t
881 1.11 martin ffbfb_mmap(dev_t dev, off_t off, int prot)
882 1.11 martin {
883 1.34 cegger struct ffb_softc *sc = device_lookup_private(&ffb_cd, minor(dev));
884 1.14 macallan uint64_t size;
885 1.11 martin int i, reg;
886 1.11 martin off_t o;
887 1.11 martin
888 1.11 martin /*
889 1.11 martin * off is a magic cookie (see xfree86/drivers/sunffb/ffb.h),
890 1.11 martin * which we map to an index into the "reg" property, and use
891 1.11 martin * our copy of the firmware data as arguments for the real
892 1.11 martin * mapping.
893 1.11 martin */
894 1.11 martin static struct { unsigned long voff; int reg; } map[] = {
895 1.11 martin { 0x00000000, FFB_REG_SFB8R },
896 1.11 martin { 0x00400000, FFB_REG_SFB8G },
897 1.11 martin { 0x00800000, FFB_REG_SFB8B },
898 1.11 martin { 0x00c00000, FFB_REG_SFB8X },
899 1.11 martin { 0x01000000, FFB_REG_SFB32 },
900 1.11 martin { 0x02000000, FFB_REG_SFB64 },
901 1.11 martin { 0x04000000, FFB_REG_FBC },
902 1.11 martin { 0x04004000, FFB_REG_DFB8R },
903 1.11 martin { 0x04404000, FFB_REG_DFB8G },
904 1.11 martin { 0x04804000, FFB_REG_DFB8B },
905 1.11 martin { 0x04c04000, FFB_REG_DFB8X },
906 1.11 martin { 0x05004000, FFB_REG_DFB24 },
907 1.11 martin { 0x06004000, FFB_REG_DFB32 },
908 1.11 martin { 0x07004000, FFB_REG_DFB422A },
909 1.11 martin { 0x0bc06000, FFB_REG_DAC },
910 1.11 martin { 0x0bc08000, FFB_REG_PROM },
911 1.14 macallan { 0x0bc18000, 0 }
912 1.11 martin };
913 1.11 martin
914 1.11 martin /* special value "FFB_EXP_VOFF" - not backed by any "reg" entry */
915 1.11 martin if (off == 0x0bc18000)
916 1.11 martin return bus_space_mmap(sc->sc_bt, sc->sc_addrs[FFB_REG_PROM],
917 1.11 martin 0x00200000, prot, BUS_SPACE_MAP_LINEAR);
918 1.14 macallan
919 1.14 macallan /*
920 1.14 macallan * FFB_VOFF_FBC_KREGS - used by afbinit to upload firmware. We should
921 1.14 macallan * probably mmap them only on afb boards
922 1.14 macallan */
923 1.14 macallan if ((off >= 0x0bc04000) && (off < 0x0bc06000))
924 1.14 macallan return bus_space_mmap(sc->sc_bt, sc->sc_addrs[FFB_REG_PROM],
925 1.14 macallan 0x00610000 + (off - 0x0bc04000), prot,
926 1.14 macallan BUS_SPACE_MAP_LINEAR);
927 1.14 macallan
928 1.11 martin #define NELEMS(arr) (sizeof(arr)/sizeof((arr)[0]))
929 1.11 martin
930 1.11 martin /* the map is ordered by voff */
931 1.14 macallan for (i = 0; i < NELEMS(map)-1; i++) {
932 1.11 martin reg = map[i].reg;
933 1.16 macallan /* the number of entries in reg seems to vary */
934 1.14 macallan if (reg < sc->sc_nreg) {
935 1.14 macallan size = min((map[i + 1].voff - map[i].voff),
936 1.14 macallan sc->sc_sizes[reg]);
937 1.14 macallan if ((off >= map[i].voff) &&
938 1.14 macallan (off < (map[i].voff + size))) {
939 1.14 macallan o = off - map[i].voff;
940 1.14 macallan return bus_space_mmap(sc->sc_bt,
941 1.14 macallan sc->sc_addrs[reg], o, prot,
942 1.14 macallan BUS_SPACE_MAP_LINEAR);
943 1.14 macallan }
944 1.14 macallan }
945 1.11 martin }
946 1.11 martin
947 1.11 martin return -1;
948 1.11 martin }
949 1.16 macallan
950 1.16 macallan void
951 1.16 macallan ffb_clearscreen(struct ffb_softc *sc)
952 1.16 macallan {
953 1.30 martin struct rasops_info *ri = &ffb_console_screen.scr_ri;
954 1.16 macallan ffb_ras_fill(sc);
955 1.16 macallan ffb_ras_setfg(sc, ri->ri_devcmap[WS_DEFAULT_BG]);
956 1.16 macallan ffb_ras_fifo_wait(sc, 4);
957 1.16 macallan FBC_WRITE(sc, FFB_FBC_BY, 0);
958 1.16 macallan FBC_WRITE(sc, FFB_FBC_BX, 0);
959 1.30 martin FBC_WRITE(sc, FFB_FBC_BH, sc->sc_height);
960 1.30 martin FBC_WRITE(sc, FFB_FBC_BW, sc->sc_width);
961 1.16 macallan }
962 1.16 macallan
963 1.16 macallan void
964 1.16 macallan ffb_cursor(void *cookie, int on, int row, int col)
965 1.16 macallan {
966 1.16 macallan struct rasops_info *ri = cookie;
967 1.30 martin struct vcons_screen *scr;
968 1.30 martin struct ffb_softc *sc;
969 1.16 macallan int x, y, wi, he, coffset;
970 1.16 macallan
971 1.30 martin if (cookie != NULL) {
972 1.30 martin scr = ri->ri_hw;
973 1.30 martin sc = scr->scr_cookie;
974 1.30 martin
975 1.30 martin wi = ri->ri_font->fontwidth;
976 1.30 martin he = ri->ri_font->fontheight;
977 1.30 martin
978 1.30 martin if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) {
979 1.30 martin x = ri->ri_ccol * wi + ri->ri_xorigin;
980 1.30 martin y = ri->ri_crow * he + ri->ri_yorigin;
981 1.30 martin
982 1.30 martin if (ri->ri_flg & RI_CURSOR) {
983 1.30 martin /* remove cursor */
984 1.30 martin coffset = ri->ri_ccol + (ri->ri_crow *
985 1.30 martin ri->ri_cols);
986 1.36 macallan #ifdef WSDISPLAY_SCROLLSUPPORT
987 1.36 macallan coffset += scr->scr_offset_to_zero;
988 1.36 macallan #endif
989 1.30 martin ffb_ras_wait(sc);
990 1.38 macallan ffb_putchar(cookie, ri->ri_crow,
991 1.30 martin ri->ri_ccol, scr->scr_chars[coffset],
992 1.30 martin scr->scr_attrs[coffset]);
993 1.30 martin ri->ri_flg &= ~RI_CURSOR;
994 1.30 martin }
995 1.30 martin ri->ri_crow = row;
996 1.30 martin ri->ri_ccol = col;
997 1.30 martin if (on)
998 1.30 martin {
999 1.30 martin long attr, revattr;
1000 1.30 martin x = ri->ri_ccol * wi + ri->ri_xorigin;
1001 1.30 martin y = ri->ri_crow * he + ri->ri_yorigin;
1002 1.30 martin coffset = col + (row * ri->ri_cols);
1003 1.36 macallan #ifdef WSDISPLAY_SCROLLSUPPORT
1004 1.36 macallan coffset += scr->scr_offset_to_zero;
1005 1.36 macallan #endif
1006 1.30 martin attr = scr->scr_attrs[coffset];
1007 1.16 macallan #ifdef FFB_CURSOR_SWAP_COLOURS
1008 1.30 martin revattr=((attr >> 8 ) & 0x000f0000) | ((attr &
1009 1.30 martin 0x000f0000)<<8) | (attr & 0x0000ffff);
1010 1.16 macallan #else
1011 1.30 martin revattr = attr ^ 0xffff0000;
1012 1.16 macallan #endif
1013 1.30 martin ffb_ras_wait(sc);
1014 1.38 macallan ffb_putchar(cookie, ri->ri_crow, ri->ri_ccol,
1015 1.30 martin scr->scr_chars[coffset], revattr);
1016 1.30 martin ri->ri_flg |= RI_CURSOR;
1017 1.30 martin }
1018 1.30 martin } else {
1019 1.30 martin ri->ri_crow = row;
1020 1.30 martin ri->ri_ccol = col;
1021 1.30 martin ri->ri_flg &= ~RI_CURSOR;
1022 1.16 macallan }
1023 1.16 macallan }
1024 1.16 macallan }
1025 1.16 macallan
1026 1.16 macallan void
1027 1.16 macallan ffb_putchar(void *cookie, int row, int col, u_int c, long attr)
1028 1.16 macallan {
1029 1.16 macallan struct rasops_info *ri = cookie;
1030 1.30 martin struct vcons_screen *scr = ri->ri_hw;
1031 1.38 macallan struct wsdisplay_font *font = PICK_FONT(ri, c);
1032 1.30 martin struct ffb_softc *sc = scr->scr_cookie;
1033 1.49 macallan void *data;
1034 1.49 macallan uint32_t fg, bg;
1035 1.49 macallan int uc, i;
1036 1.49 macallan int x, y, wi, he;
1037 1.16 macallan
1038 1.49 macallan if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL)
1039 1.49 macallan return;
1040 1.49 macallan
1041 1.49 macallan wi = font->fontwidth;
1042 1.49 macallan he = font->fontheight;
1043 1.49 macallan
1044 1.49 macallan if (!CHAR_IN_FONT(c, font))
1045 1.49 macallan return;
1046 1.49 macallan
1047 1.49 macallan bg = ri->ri_devcmap[(attr >> 16) & 0xf];
1048 1.49 macallan fg = ri->ri_devcmap[(attr >> 24) & 0xf];
1049 1.49 macallan x = ri->ri_xorigin + col * wi;
1050 1.49 macallan y = ri->ri_yorigin + row * he;
1051 1.38 macallan
1052 1.49 macallan uc = c - font->firstchar;
1053 1.49 macallan data = (uint8_t *)font->data + uc * ri->ri_fontscale;
1054 1.38 macallan
1055 1.49 macallan if (font->stride < wi) {
1056 1.49 macallan /* mono bitmap font */
1057 1.38 macallan ffb_ras_setbg(sc, bg);
1058 1.38 macallan ffb_ras_setfg(sc, fg);
1059 1.49 macallan ffb_ras_fifo_wait(sc, 4);
1060 1.38 macallan FBC_WRITE(sc, FFB_FBC_ROP, FBC_ROP_NEW);
1061 1.38 macallan FBC_WRITE(sc, FFB_FBC_FONTXY, (y << 16) | x);
1062 1.38 macallan FBC_WRITE(sc, FFB_FBC_FONTW, wi);
1063 1.49 macallan FBC_WRITE(sc, FFB_FBC_PPC,
1064 1.49 macallan FBC_PPC_VCE_DIS | FBC_PPC_TBE_OPAQUE | FBC_PPC_ACE_DIS |
1065 1.49 macallan FBC_PPC_APE_DIS | FBC_PPC_DCE_DIS | FBC_PPC_CS_CONST |
1066 1.49 macallan FBC_PPC_ABE_DIS | FBC_PPC_XS_WID);
1067 1.38 macallan
1068 1.49 macallan switch (font->stride) {
1069 1.38 macallan case 1: {
1070 1.38 macallan uint8_t *data8 = data;
1071 1.38 macallan uint32_t reg;
1072 1.38 macallan for (i = 0; i < he; i++) {
1073 1.38 macallan reg = *data8;
1074 1.38 macallan FBC_WRITE(sc, FFB_FBC_FONT, reg << 24);
1075 1.38 macallan data8++;
1076 1.38 macallan }
1077 1.38 macallan break;
1078 1.38 macallan }
1079 1.38 macallan case 2: {
1080 1.38 macallan uint16_t *data16 = data;
1081 1.38 macallan uint32_t reg;
1082 1.38 macallan for (i = 0; i < he; i++) {
1083 1.38 macallan reg = *data16;
1084 1.38 macallan FBC_WRITE(sc, FFB_FBC_FONT, reg << 16);
1085 1.38 macallan data16++;
1086 1.38 macallan }
1087 1.38 macallan break;
1088 1.38 macallan }
1089 1.38 macallan }
1090 1.49 macallan } else {
1091 1.49 macallan /* alpha font */
1092 1.49 macallan volatile uint32_t *dest, *ddest;
1093 1.49 macallan uint32_t alpha = 0x80;
1094 1.49 macallan uint8_t *data8 = data;
1095 1.49 macallan int j;
1096 1.49 macallan
1097 1.49 macallan /* first we erase the background */
1098 1.49 macallan ffb_ras_fill(sc);
1099 1.49 macallan ffb_ras_setfg(sc, bg);
1100 1.49 macallan ffb_ras_fifo_wait(sc, 4);
1101 1.49 macallan FBC_WRITE(sc, FFB_FBC_BY, y);
1102 1.49 macallan FBC_WRITE(sc, FFB_FBC_BX, x);
1103 1.49 macallan FBC_WRITE(sc, FFB_FBC_BH, he);
1104 1.49 macallan FBC_WRITE(sc, FFB_FBC_BW, wi);
1105 1.49 macallan
1106 1.49 macallan /* if we draw a space we're done */
1107 1.49 macallan if (c == ' ') return;
1108 1.49 macallan
1109 1.49 macallan /* now enable alpha blending */
1110 1.49 macallan ffb_ras_setfg(sc, fg);
1111 1.49 macallan ffb_ras_fifo_wait(sc, 2);
1112 1.49 macallan FBC_WRITE(sc, FFB_FBC_ROP, FBC_ROP_NEW);
1113 1.49 macallan
1114 1.49 macallan FBC_WRITE(sc, FFB_FBC_PPC,
1115 1.49 macallan FBC_PPC_VCE_DIS | FBC_PPC_TBE_OPAQUE | FBC_PPC_ACE_DIS |
1116 1.49 macallan FBC_PPC_APE_DIS | FBC_PPC_DCE_DIS | FBC_PPC_CS_CONST |
1117 1.49 macallan FBC_PPC_ABE_ENA | FBC_PPC_XS_VAR);
1118 1.49 macallan /*
1119 1.49 macallan * we have to wait for both the rectangle drawing op above and
1120 1.49 macallan * the FFB_FBC_PPC write to finish before mucking around in
1121 1.49 macallan * the SFB aperture
1122 1.49 macallan */
1123 1.49 macallan ffb_ras_wait(sc);
1124 1.49 macallan
1125 1.49 macallan /* ... and draw the character */
1126 1.49 macallan dest = sc->sc_sfb32 + 2048 * y + x;
1127 1.49 macallan for (i = 0; i < he; i++) {
1128 1.49 macallan ddest = dest;
1129 1.49 macallan for (j = 0; j < wi; j++) {
1130 1.49 macallan alpha = *data8;
1131 1.49 macallan /*
1132 1.49 macallan * We set the colour source to constant above
1133 1.49 macallan * so we only have to write the alpha channel
1134 1.49 macallan * here and the colour comes from the FG
1135 1.49 macallan * register. It would be nice if we could
1136 1.49 macallan * just use the SFB8X aperture and memcpy()
1137 1.49 macallan * the alpha map line by line but for some
1138 1.49 macallan * strange reason that will take colour info
1139 1.49 macallan * from the framebuffer even if we set the
1140 1.49 macallan * FBC_PPC_CS_CONST bit above.
1141 1.49 macallan */
1142 1.49 macallan *ddest = alpha << 24;
1143 1.49 macallan data8++;
1144 1.49 macallan ddest++;
1145 1.49 macallan }
1146 1.49 macallan dest += 2048;
1147 1.49 macallan }
1148 1.49 macallan }
1149 1.16 macallan }
1150 1.16 macallan
1151 1.16 macallan int
1152 1.16 macallan ffb_allocattr(void *cookie, int fg, int bg, int flags, long *attrp)
1153 1.16 macallan {
1154 1.16 macallan if ((fg == 0) && (bg == 0))
1155 1.16 macallan {
1156 1.16 macallan fg = WS_DEFAULT_FG;
1157 1.16 macallan bg = WS_DEFAULT_BG;
1158 1.16 macallan }
1159 1.16 macallan if (flags & WSATTR_REVERSE) {
1160 1.16 macallan *attrp = (bg & 0xff) << 24 | (fg & 0xff) << 16 |
1161 1.16 macallan (flags & 0xff);
1162 1.16 macallan } else
1163 1.16 macallan *attrp = (fg & 0xff) << 24 | (bg & 0xff) << 16 |
1164 1.16 macallan (flags & 0xff);
1165 1.16 macallan return 0;
1166 1.16 macallan }
1167 1.16 macallan
1168 1.16 macallan void
1169 1.30 martin ffb_init_screen(void *cookie, struct vcons_screen *scr,
1170 1.16 macallan int existing, long *defattr)
1171 1.16 macallan {
1172 1.30 martin struct ffb_softc *sc = cookie;
1173 1.30 martin struct rasops_info *ri = &scr->scr_ri;
1174 1.16 macallan
1175 1.16 macallan ri->ri_depth = 32;
1176 1.16 macallan ri->ri_width = sc->sc_width;
1177 1.16 macallan ri->ri_height = sc->sc_height;
1178 1.16 macallan ri->ri_stride = sc->sc_linebytes;
1179 1.49 macallan ri->ri_flg = RI_CENTER | RI_ENABLE_ALPHA;
1180 1.16 macallan
1181 1.38 macallan /*
1182 1.38 macallan * we can't accelerate copycols() so instead of falling back to
1183 1.38 macallan * software use vcons' putchar() based implementation
1184 1.38 macallan */
1185 1.38 macallan scr->scr_flags |= VCONS_NO_COPYCOLS;
1186 1.45 macallan #ifdef VCONS_DRAW_INTR
1187 1.45 macallan scr->scr_flags |= VCONS_DONT_READ;
1188 1.45 macallan #endif
1189 1.39 jdc DPRINTF(("ffb_init_screen: addr: %08lx\n",(ulong)ri->ri_bits));
1190 1.39 jdc
1191 1.16 macallan rasops_init(ri, sc->sc_height/8, sc->sc_width/8);
1192 1.16 macallan ri->ri_caps = WSSCREEN_WSCOLORS;
1193 1.16 macallan rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight,
1194 1.16 macallan sc->sc_width / ri->ri_font->fontwidth);
1195 1.16 macallan
1196 1.16 macallan /* enable acceleration */
1197 1.16 macallan ri->ri_ops.copyrows = ffb_ras_copyrows;
1198 1.16 macallan ri->ri_ops.eraserows = ffb_ras_eraserows;
1199 1.16 macallan ri->ri_ops.erasecols = ffb_ras_erasecols;
1200 1.16 macallan ri->ri_ops.cursor = ffb_cursor;
1201 1.16 macallan ri->ri_ops.allocattr = ffb_allocattr;
1202 1.16 macallan ri->ri_ops.putchar = ffb_putchar;
1203 1.16 macallan }
1204 1.39 jdc
1205 1.39 jdc /* I2C bitbanging */
1206 1.39 jdc static void ffb_i2cbb_set_bits(void *cookie, uint32_t bits)
1207 1.39 jdc {
1208 1.39 jdc struct ffb_softc *sc = cookie;
1209 1.39 jdc
1210 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_CFG_MPDATA);
1211 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, bits);
1212 1.39 jdc }
1213 1.39 jdc
1214 1.39 jdc static void ffb_i2cbb_set_dir(void *cookie, uint32_t dir)
1215 1.39 jdc {
1216 1.39 jdc /* Nothing to do */
1217 1.39 jdc }
1218 1.39 jdc
1219 1.39 jdc static uint32_t ffb_i2cbb_read(void *cookie)
1220 1.39 jdc {
1221 1.39 jdc struct ffb_softc *sc = cookie;
1222 1.39 jdc uint32_t bits;
1223 1.39 jdc
1224 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_CFG_MPSENSE);
1225 1.39 jdc bits = DAC_READ(sc, FFB_DAC_VALUE);
1226 1.39 jdc
1227 1.39 jdc return bits;
1228 1.39 jdc }
1229 1.39 jdc
1230 1.39 jdc /* higher level I2C stuff */
1231 1.39 jdc static int
1232 1.39 jdc ffb_i2c_acquire_bus(void *cookie, int flags)
1233 1.39 jdc {
1234 1.39 jdc /* private bus */
1235 1.39 jdc return (0);
1236 1.39 jdc }
1237 1.39 jdc
1238 1.39 jdc static void
1239 1.39 jdc ffb_i2c_release_bus(void *cookie, int flags)
1240 1.39 jdc {
1241 1.39 jdc /* private bus */
1242 1.39 jdc }
1243 1.39 jdc
1244 1.39 jdc static int
1245 1.39 jdc ffb_i2c_send_start(void *cookie, int flags)
1246 1.39 jdc {
1247 1.39 jdc return (i2c_bitbang_send_start(cookie, flags, &ffb_i2cbb_ops));
1248 1.39 jdc }
1249 1.39 jdc
1250 1.39 jdc static int
1251 1.39 jdc ffb_i2c_send_stop(void *cookie, int flags)
1252 1.39 jdc {
1253 1.39 jdc
1254 1.39 jdc return (i2c_bitbang_send_stop(cookie, flags, &ffb_i2cbb_ops));
1255 1.39 jdc }
1256 1.39 jdc
1257 1.39 jdc static int
1258 1.39 jdc ffb_i2c_initiate_xfer(void *cookie, i2c_addr_t addr, int flags)
1259 1.39 jdc {
1260 1.39 jdc /*
1261 1.39 jdc * for some reason i2c_bitbang_initiate_xfer left-shifts
1262 1.39 jdc * the I2C-address and then sets the direction bit
1263 1.39 jdc */
1264 1.39 jdc return (i2c_bitbang_initiate_xfer(cookie, addr, flags,
1265 1.39 jdc &ffb_i2cbb_ops));
1266 1.39 jdc }
1267 1.39 jdc
1268 1.39 jdc static int
1269 1.39 jdc ffb_i2c_read_byte(void *cookie, uint8_t *valp, int flags)
1270 1.39 jdc {
1271 1.39 jdc return (i2c_bitbang_read_byte(cookie, valp, flags, &ffb_i2cbb_ops));
1272 1.39 jdc }
1273 1.39 jdc
1274 1.39 jdc static int
1275 1.39 jdc ffb_i2c_write_byte(void *cookie, uint8_t val, int flags)
1276 1.39 jdc {
1277 1.39 jdc return (i2c_bitbang_write_byte(cookie, val, flags, &ffb_i2cbb_ops));
1278 1.39 jdc }
1279 1.39 jdc
1280 1.39 jdc
1281 1.39 jdc #define TVC_READ_LIMIT 100000
1282 1.39 jdc int
1283 1.39 jdc ffb_tgc_disable(struct ffb_softc *sc)
1284 1.39 jdc {
1285 1.39 jdc int i;
1286 1.39 jdc
1287 1.39 jdc /* Is the timing generator disabled? */
1288 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_TGC);
1289 1.39 jdc if (!(DAC_READ(sc, FFB_DAC_VALUE) & FFB_DAC_TGC_TIMING_ENABLE))
1290 1.39 jdc return 1;
1291 1.39 jdc
1292 1.39 jdc /* If not, disable it when the vertical counter reaches 0 */
1293 1.39 jdc for (i = 0; i < TVC_READ_LIMIT; i++) {
1294 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_TVC);
1295 1.39 jdc if (!DAC_READ(sc, FFB_DAC_VALUE)) {
1296 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_TGC);
1297 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, 0);
1298 1.39 jdc return 1;
1299 1.39 jdc }
1300 1.39 jdc }
1301 1.39 jdc return 0;
1302 1.39 jdc }
1303 1.39 jdc
1304 1.39 jdc /*
1305 1.39 jdc * PLL Control Register values:
1306 1.39 jdc * M)ultiplier = bits 0:6 + 1
1307 1.39 jdc * D)ivisor = bits 7:10 + 1
1308 1.39 jdc * P)ost divisor = bits 11:13 (000 = 1, 001 = 2, 010 = 4, 011 = 8)
1309 1.39 jdc * Frequency = 13.5 * M / D / P
1310 1.39 jdc */
1311 1.39 jdc #define FFB_PLL_FREQ 13500000
1312 1.39 jdc void
1313 1.39 jdc ffb_get_pclk(int request, uint32_t *pll, int *diff)
1314 1.39 jdc {
1315 1.39 jdc int m, d, p, f, hex = 0, curdiff;
1316 1.39 jdc
1317 1.39 jdc *diff = 100000000;
1318 1.39 jdc
1319 1.39 jdc for (m = 32; m <= 80; m++) {
1320 1.39 jdc for (d = 4; d <= 11; d++) {
1321 1.39 jdc for (p = 1; p <= 8; p = p << 1) {
1322 1.39 jdc switch (p) {
1323 1.39 jdc case 1:
1324 1.39 jdc hex = 0x4000 + (d << 7) + m;
1325 1.39 jdc break;
1326 1.39 jdc case 2:
1327 1.39 jdc hex = 0x4800 + (d << 7) + m;
1328 1.39 jdc break;
1329 1.39 jdc case 4:
1330 1.39 jdc hex = 0x5000 + (d << 7) + m;
1331 1.39 jdc break;
1332 1.39 jdc case 8:
1333 1.39 jdc hex = 0x6000 + (d << 7) + m;
1334 1.39 jdc break;
1335 1.39 jdc }
1336 1.39 jdc f = 13500000 * m / d / p;
1337 1.39 jdc if (f == request) {
1338 1.39 jdc *diff = 0;
1339 1.39 jdc *pll = hex;
1340 1.39 jdc return;
1341 1.39 jdc } else {
1342 1.39 jdc curdiff = abs(request - f);
1343 1.39 jdc if (curdiff < *diff) {
1344 1.39 jdc *diff = curdiff;
1345 1.39 jdc *pll = hex;
1346 1.39 jdc }
1347 1.39 jdc }
1348 1.39 jdc }
1349 1.39 jdc }
1350 1.39 jdc }
1351 1.39 jdc }
1352 1.39 jdc
1353 1.39 jdc /*
1354 1.39 jdc * Details of the FFB RAMDAC are contained in the Brooktree BT497/498
1355 1.39 jdc * and in the Connexant BT497A/498A documentation.
1356 1.39 jdc *
1357 1.39 jdc * VESA timings to FFB register conversion:
1358 1.39 jdc * If interleave = 4/2:1 then x = 2, if interleave = 8/2:1 then x = 4
1359 1.39 jdc * VBE = VBS - vres = (sync pulse - 1) + back porch
1360 1.39 jdc * VBS = VSS - front porch = (sync pulse - 1) + back porch + vres
1361 1.39 jdc * VSE = sync pulse - 1
1362 1.39 jdc * VSS = (sync pulse - 1) + back porch + vres + front porch
1363 1.39 jdc * HRE = HSS - HSE - 1
1364 1.39 jdc * HBE = (sync pulse + back porch) / x - 1
1365 1.39 jdc * HBS = (sync pulse + back porch + hres) / x - 1
1366 1.39 jdc * HSE = sync pulse / x - 1
1367 1.39 jdc * HSS = (sync pulse + back porch + hres + front porch) / x - 1
1368 1.39 jdc * HCE = HBS - 4
1369 1.39 jdc * HCS = HBE - 4
1370 1.39 jdc * EPE = EIE = EIS = 0 (for all non-interlaced modes)
1371 1.39 jdc *
1372 1.39 jdc * Note, that 8/2:1 Single Buffered Interleaving is only supported by the
1373 1.39 jdc * double-buffered FFB (Creator3D), and at higher resolutions than 1280x1024
1374 1.39 jdc *
1375 1.39 jdc * Note, that the timing generator should be disabled and re-enabled when the
1376 1.39 jdc * the timing parameter registers are being programmed. Stopping the timing
1377 1.39 jdc * generator should only be done when the vertical counter is zero.
1378 1.39 jdc */
1379 1.39 jdc #define DIVIDE(x,y) (((x) + ((y) / 2)) / (y))
1380 1.39 jdc int
1381 1.39 jdc ffb_set_vmode(struct ffb_softc *sc, struct videomode *mode, int btype,
1382 1.39 jdc int *hres, int *vres)
1383 1.39 jdc {
1384 1.39 jdc int diff;
1385 1.39 jdc uint32_t fp, sp, bp, x;
1386 1.39 jdc uint32_t pll, pfc, ucl, dcl, tgc;
1387 1.39 jdc uint32_t vbe, vbs, vse, vss, hre, hbe, hbs, hse, hss, hce, hcs;
1388 1.39 jdc uint32_t epe, eie, eis;
1389 1.39 jdc uint32_t fbcfg0;
1390 1.39 jdc
1391 1.39 jdc DPRINTF(("ffb_set_vmode: %dx%d@%d", mode->hdisplay, mode->vdisplay,
1392 1.39 jdc DIVIDE(DIVIDE(mode->dot_clock * 1000,
1393 1.39 jdc mode->htotal), mode->vtotal)));
1394 1.39 jdc DPRINTF((" (%d %d %d %d %d %d %d",
1395 1.39 jdc mode->dot_clock, mode->hsync_start, mode->hsync_end, mode->htotal,
1396 1.39 jdc mode->vsync_start, mode->vsync_end, mode->vtotal));
1397 1.39 jdc DPRINTF((" %s%sH %s%sV)\n",
1398 1.39 jdc mode->flags & VID_PHSYNC ? "+" : "",
1399 1.39 jdc mode->flags & VID_NHSYNC ? "-" : "",
1400 1.39 jdc mode->flags & VID_PVSYNC ? "+" : "",
1401 1.39 jdc mode->flags & VID_NVSYNC ? "-" : ""));
1402 1.39 jdc
1403 1.39 jdc /* We don't handle interlaced or doublescan (yet) */
1404 1.39 jdc if ((mode->flags & VID_INTERLACE) || (mode->flags & VID_DBLSCAN))
1405 1.39 jdc return 0;
1406 1.39 jdc
1407 1.39 jdc /* Only Creator3D can be set to > 1280x1024 */
1408 1.39 jdc if(((sc->sc_type == FFB_CREATOR && !((btype & 7) == 3)) ||
1409 1.39 jdc sc->sc_type == FFB_AFB)
1410 1.39 jdc && (mode->hdisplay > 1280 || mode->vdisplay > 1024))
1411 1.39 jdc return 0;
1412 1.39 jdc /* Creator3D can be set to <= 1920x1360 */
1413 1.39 jdc if (mode->hdisplay > 1920 || mode->vdisplay > 1360)
1414 1.39 jdc return 0;
1415 1.39 jdc
1416 1.39 jdc /*
1417 1.39 jdc * Look for a matching pixel clock and set PLL Control.
1418 1.39 jdc * XXX: 640x480@60 is 25175000 in modelines but 25125000 in the
1419 1.39 jdc * FFB PROM, and the closest match to 25175000 (0x4da9/25159090)
1420 1.39 jdc * does not work. So, use the PROM value instead.
1421 1.39 jdc */
1422 1.39 jdc if (mode->hdisplay == 640 && mode->vdisplay == 480 &&
1423 1.39 jdc mode->dot_clock == 25175) {
1424 1.39 jdc DPRINTF(("ffb_set_vmode: 640x480@60: adjusted dot clock\n"));
1425 1.39 jdc mode->dot_clock = 25125;
1426 1.39 jdc }
1427 1.39 jdc ffb_get_pclk(mode->dot_clock * 1000, &pll, &diff);
1428 1.39 jdc if (diff > 250000)
1429 1.39 jdc return 0;
1430 1.39 jdc
1431 1.39 jdc /* Pixel Format Control, User Control and FBC Configuration. */
1432 1.39 jdc if (mode->hdisplay > 1280) {
1433 1.39 jdc pfc = FFB_DAC_PIX_FMT_821;
1434 1.39 jdc ucl = FFB_DAC_USR_CTRL_OVERLAY | FFB_DAC_USR_CTRL_WMODE_C;
1435 1.39 jdc x = 4;
1436 1.39 jdc fbcfg0 = FBC_READ(sc, FFB_FBC_FBCFG0) | FBC_CFG0_DOUBLE_BUF;
1437 1.39 jdc } else {
1438 1.39 jdc pfc = FFB_DAC_PIX_FMT_421;
1439 1.39 jdc /* Only Creator3D and Elite3D can have double-buffer */
1440 1.39 jdc if ((sc->sc_type == FFB_CREATOR && !((btype & 7) == 3)))
1441 1.39 jdc ucl = 0;
1442 1.39 jdc else
1443 1.39 jdc ucl = FFB_DAC_USR_CTRL_DOUBLE;
1444 1.39 jdc ucl |= (FFB_DAC_USR_CTRL_OVERLAY | FFB_DAC_USR_CTRL_WMODE_S8);
1445 1.39 jdc x = 2;
1446 1.39 jdc fbcfg0 = FBC_READ(sc, FFB_FBC_FBCFG0) | FBC_CFG0_SINGLE_BUF;
1447 1.39 jdc }
1448 1.39 jdc
1449 1.39 jdc /* DAC Control and Timing Generator Control */
1450 1.47 jdc if (mode->flags & VID_PVSYNC)
1451 1.47 jdc dcl = FFB_DAC_DAC_CTRL_POS_VSYNC;
1452 1.47 jdc else
1453 1.39 jdc dcl = 0;
1454 1.47 jdc tgc = 0;
1455 1.39 jdc #define EDID_VID_INP sc->sc_edid_info.edid_video_input
1456 1.47 jdc if ((EDID_VID_INP & EDID_VIDEO_INPUT_COMPOSITE_SYNC)) {
1457 1.47 jdc dcl |= FFB_DAC_DAC_CTRL_VSYNC_DIS;
1458 1.47 jdc tgc = FFB_DAC_TGC_EQUAL_DISABLE;
1459 1.47 jdc } else {
1460 1.39 jdc dcl |= FFB_DAC_DAC_CTRL_SYNC_G;
1461 1.41 jdc if (EDID_VID_INP & EDID_VIDEO_INPUT_SEPARATE_SYNCS)
1462 1.41 jdc tgc |= FFB_DAC_TGC_VSYNC_DISABLE;
1463 1.47 jdc else
1464 1.47 jdc tgc = FFB_DAC_TGC_EQUAL_DISABLE;
1465 1.39 jdc }
1466 1.39 jdc if (EDID_VID_INP & EDID_VIDEO_INPUT_BLANK_TO_BLACK)
1467 1.39 jdc dcl |= FFB_DAC_DAC_CTRL_PED_ENABLE;
1468 1.39 jdc tgc |= (FFB_DAC_TGC_VIDEO_ENABLE | FFB_DAC_TGC_TIMING_ENABLE |
1469 1.39 jdc FFB_DAC_TGC_MASTER_ENABLE);
1470 1.39 jdc
1471 1.39 jdc /* Vertical timing */
1472 1.39 jdc fp = mode->vsync_start - mode->vdisplay;
1473 1.39 jdc sp = mode->vsync_end - mode->vsync_start;
1474 1.39 jdc bp = mode->vtotal - mode->vsync_end;
1475 1.39 jdc
1476 1.39 jdc vbe = sp - 1 + bp;
1477 1.39 jdc vbs = sp - 1 + bp + mode->vdisplay;
1478 1.39 jdc vse = sp - 1;
1479 1.39 jdc vss = sp - 1 + bp + mode->vdisplay + fp;
1480 1.39 jdc
1481 1.39 jdc /* Horizontal timing */
1482 1.39 jdc fp = mode->hsync_start - mode->hdisplay;
1483 1.39 jdc sp = mode->hsync_end - mode->hsync_start;
1484 1.39 jdc bp = mode->htotal - mode->hsync_end;
1485 1.39 jdc
1486 1.39 jdc hbe = (sp + bp) / x - 1;
1487 1.39 jdc hbs = (sp + bp + mode->hdisplay) / x - 1;
1488 1.39 jdc hse = sp / x - 1;
1489 1.39 jdc hss = (sp + bp + mode->hdisplay + fp) / x -1;
1490 1.39 jdc hre = hss - hse - 1;
1491 1.39 jdc hce = hbs - 4;
1492 1.39 jdc hcs = hbe - 4;
1493 1.39 jdc
1494 1.39 jdc /* Equalisation (interlaced modes) */
1495 1.39 jdc epe = 0;
1496 1.39 jdc eie = 0;
1497 1.39 jdc eis = 0;
1498 1.39 jdc
1499 1.39 jdc DPRINTF(("ffb_set_vmode: 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n",
1500 1.39 jdc pll, pfc, ucl, dcl, tgc));
1501 1.39 jdc DPRINTF(("\t0x%04x 0x%04x 0x%04x 0x%04x\n", vbe, vbs, vse, vss));
1502 1.39 jdc DPRINTF(("\t0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n",
1503 1.39 jdc hre, hbe, hbs, hse, hss, hce, hcs));
1504 1.39 jdc DPRINTF(("\t0x%04x 0x%04x 0x%04x\n", epe, eie, eis));
1505 1.39 jdc
1506 1.39 jdc if (!ffb_tgc_disable(sc)) {
1507 1.39 jdc DPRINTF(("ffb_set_vmode: failed to disable TGC register\n"));
1508 1.39 jdc return 0;
1509 1.39 jdc }
1510 1.39 jdc
1511 1.39 jdc /*
1512 1.39 jdc * Program the mode registers.
1513 1.39 jdc * Program the timing generator last, as that re-enables output.
1514 1.39 jdc * Note, that a read to/write from a register increments the
1515 1.39 jdc * register address to the next register automatically.
1516 1.39 jdc */
1517 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_PLL_CTRL);
1518 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, pll);
1519 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_PIX_FMT);
1520 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, pfc);
1521 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, ucl);
1522 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_DAC_CTRL);
1523 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, dcl);
1524 1.39 jdc
1525 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_VBE);
1526 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, vbe);
1527 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, vbs);
1528 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, vse);
1529 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, vss);
1530 1.39 jdc
1531 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, hre);
1532 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, hbe);
1533 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, hbs);
1534 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, hse);
1535 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, hss);
1536 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, hce);
1537 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, hcs);
1538 1.39 jdc
1539 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, epe);
1540 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, eie);
1541 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, eis);
1542 1.39 jdc
1543 1.39 jdc FBC_WRITE(sc, FFB_FBC_FBCFG0, fbcfg0);
1544 1.39 jdc
1545 1.39 jdc DAC_WRITE(sc, FFB_DAC_TYPE, FFB_DAC_TGC);
1546 1.39 jdc DAC_WRITE(sc, FFB_DAC_VALUE, tgc);
1547 1.45 macallan DPRINTF(("new tgc: %08x\n", tgc));
1548 1.45 macallan
1549 1.39 jdc *hres = mode->hdisplay;
1550 1.39 jdc *vres = mode->vdisplay;
1551 1.39 jdc
1552 1.39 jdc printf("%s: video mode set to %d x %d @ %dHz\n",
1553 1.43 christos device_xname(sc->sc_dev),
1554 1.39 jdc mode->hdisplay, mode->vdisplay,
1555 1.39 jdc DIVIDE(DIVIDE(mode->dot_clock * 1000,
1556 1.39 jdc mode->htotal), mode->vtotal));
1557 1.39 jdc
1558 1.39 jdc return 1;
1559 1.39 jdc }
1560