fhc.c revision 1.4 1 1.4 palle /* $NetBSD: fhc.c,v 1.4 2016/05/10 19:23:59 palle Exp $ */
2 1.1 mrg /* $OpenBSD: fhc.c,v 1.17 2010/11/11 17:58:23 miod Exp $ */
3 1.1 mrg
4 1.1 mrg /*
5 1.1 mrg * Copyright (c) 2004 Jason L. Wright (jason (at) thought.net)
6 1.1 mrg * All rights reserved.
7 1.1 mrg *
8 1.1 mrg * Redistribution and use in source and binary forms, with or without
9 1.1 mrg * modification, are permitted provided that the following conditions
10 1.1 mrg * are met:
11 1.1 mrg * 1. Redistributions of source code must retain the above copyright
12 1.1 mrg * notice, this list of conditions and the following disclaimer.
13 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 mrg * notice, this list of conditions and the following disclaimer in the
15 1.1 mrg * documentation and/or other materials provided with the distribution.
16 1.1 mrg *
17 1.1 mrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 mrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
19 1.1 mrg * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20 1.1 mrg * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
21 1.1 mrg * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22 1.1 mrg * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23 1.1 mrg * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 1.1 mrg * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
25 1.1 mrg * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
26 1.1 mrg * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 mrg * POSSIBILITY OF SUCH DAMAGE.
28 1.1 mrg */
29 1.1 mrg
30 1.3 mrg #include <sys/cdefs.h>
31 1.4 palle __KERNEL_RCSID(0, "$NetBSD: fhc.c,v 1.4 2016/05/10 19:23:59 palle Exp $");
32 1.3 mrg
33 1.1 mrg #include <sys/types.h>
34 1.1 mrg #include <sys/param.h>
35 1.1 mrg #include <sys/systm.h>
36 1.1 mrg #include <sys/kernel.h>
37 1.1 mrg #include <sys/device.h>
38 1.1 mrg #include <sys/conf.h>
39 1.1 mrg #include <sys/malloc.h>
40 1.1 mrg #include <sys/bus.h>
41 1.1 mrg
42 1.1 mrg #include <machine/autoconf.h>
43 1.1 mrg #include <machine/openfirm.h>
44 1.1 mrg
45 1.1 mrg #include <sparc64/dev/fhcreg.h>
46 1.1 mrg #include <sparc64/dev/fhcvar.h>
47 1.1 mrg #include <sparc64/dev/iommureg.h>
48 1.1 mrg
49 1.1 mrg int fhc_print(void *, const char *);
50 1.1 mrg
51 1.1 mrg bus_space_tag_t fhc_alloc_bus_tag(struct fhc_softc *);
52 1.1 mrg int _fhc_bus_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, vaddr_t,
53 1.1 mrg bus_space_handle_t *);
54 1.1 mrg void *fhc_intr_establish(bus_space_tag_t, int, int,
55 1.1 mrg int (*)(void *), void *, void (*)(void));
56 1.1 mrg bus_space_handle_t *fhc_find_intr_handle(struct fhc_softc *, int);
57 1.1 mrg
58 1.1 mrg void
59 1.1 mrg fhc_attach(struct fhc_softc *sc)
60 1.1 mrg {
61 1.1 mrg int node0, node;
62 1.1 mrg u_int32_t ctrl;
63 1.1 mrg
64 1.1 mrg printf(" board %d: %s\n", sc->sc_board,
65 1.1 mrg prom_getpropstring(sc->sc_node, "board-model"));
66 1.1 mrg
67 1.1 mrg sc->sc_cbt = fhc_alloc_bus_tag(sc);
68 1.1 mrg
69 1.1 mrg sc->sc_ign = sc->sc_board << 1;
70 1.1 mrg bus_space_write_4(sc->sc_bt, sc->sc_ireg, FHC_I_IGN, sc->sc_ign);
71 1.1 mrg sc->sc_ign = bus_space_read_4(sc->sc_bt, sc->sc_ireg, FHC_I_IGN);
72 1.1 mrg
73 1.1 mrg ctrl = bus_space_read_4(sc->sc_bt, sc->sc_preg, FHC_P_CTRL);
74 1.1 mrg if (!sc->sc_is_central)
75 1.1 mrg ctrl |= FHC_P_CTRL_IXIST;
76 1.1 mrg ctrl &= ~(FHC_P_CTRL_AOFF | FHC_P_CTRL_BOFF | FHC_P_CTRL_SLINE);
77 1.1 mrg bus_space_write_4(sc->sc_bt, sc->sc_preg, FHC_P_CTRL, ctrl);
78 1.1 mrg bus_space_read_4(sc->sc_bt, sc->sc_preg, FHC_P_CTRL);
79 1.1 mrg
80 1.1 mrg /* clear interrupts */
81 1.1 mrg bus_space_write_4(sc->sc_bt, sc->sc_freg, FHC_F_ICLR, 0);
82 1.1 mrg bus_space_read_4(sc->sc_bt, sc->sc_freg, FHC_F_ICLR);
83 1.1 mrg bus_space_write_4(sc->sc_bt, sc->sc_sreg, FHC_S_ICLR, 0);
84 1.1 mrg bus_space_read_4(sc->sc_bt, sc->sc_sreg, FHC_S_ICLR);
85 1.1 mrg bus_space_write_4(sc->sc_bt, sc->sc_ureg, FHC_U_ICLR, 0);
86 1.1 mrg bus_space_read_4(sc->sc_bt, sc->sc_ureg, FHC_U_ICLR);
87 1.1 mrg bus_space_write_4(sc->sc_bt, sc->sc_treg, FHC_T_ICLR, 0);
88 1.1 mrg bus_space_read_4(sc->sc_bt, sc->sc_treg, FHC_T_ICLR);
89 1.1 mrg
90 1.1 mrg prom_getprop(sc->sc_node, "ranges", sizeof(struct fhc_range),
91 1.1 mrg &sc->sc_nrange, (void **)&sc->sc_range);
92 1.1 mrg
93 1.1 mrg node0 = firstchild(sc->sc_node);
94 1.1 mrg for (node = node0; node; node = nextsibling(node)) {
95 1.1 mrg struct fhc_attach_args fa;
96 1.1 mrg
97 1.1 mrg #if 0
98 1.1 mrg if (!checkstatus(node))
99 1.1 mrg continue;
100 1.1 mrg #endif
101 1.1 mrg
102 1.1 mrg bzero(&fa, sizeof(fa));
103 1.1 mrg
104 1.1 mrg fa.fa_node = node;
105 1.1 mrg fa.fa_bustag = sc->sc_cbt;
106 1.1 mrg
107 1.1 mrg if (fhc_get_string(fa.fa_node, "name", &fa.fa_name)) {
108 1.1 mrg printf("can't fetch name for node 0x%x\n", node);
109 1.1 mrg continue;
110 1.1 mrg }
111 1.1 mrg prom_getprop(node, "reg", sizeof(struct fhc_reg),
112 1.1 mrg &fa.fa_nreg, (void **)&fa.fa_reg);
113 1.1 mrg prom_getprop(node, "interrupts", sizeof(int),
114 1.1 mrg &fa.fa_nintr, (void **)&fa.fa_intr);
115 1.1 mrg prom_getprop(node, "address", sizeof(*fa.fa_promvaddrs),
116 1.1 mrg &fa.fa_npromvaddrs, (void **)&fa.fa_promvaddrs);
117 1.1 mrg
118 1.1 mrg (void)config_found(sc->sc_dev, (void *)&fa, fhc_print);
119 1.1 mrg
120 1.1 mrg if (fa.fa_name != NULL)
121 1.1 mrg free(fa.fa_name, M_DEVBUF);
122 1.1 mrg if (fa.fa_reg != NULL)
123 1.1 mrg free(fa.fa_reg, M_DEVBUF);
124 1.1 mrg if (fa.fa_intr != NULL)
125 1.1 mrg free(fa.fa_intr, M_DEVBUF);
126 1.1 mrg if (fa.fa_promvaddrs != NULL)
127 1.1 mrg free(fa.fa_promvaddrs, M_DEVBUF);
128 1.1 mrg }
129 1.1 mrg }
130 1.1 mrg
131 1.1 mrg int
132 1.1 mrg fhc_print(void *args, const char *busname)
133 1.1 mrg {
134 1.1 mrg struct fhc_attach_args *fa = args;
135 1.1 mrg char *class;
136 1.1 mrg
137 1.1 mrg if (busname != NULL) {
138 1.1 mrg printf("\"%s\" at %s", fa->fa_name, busname);
139 1.1 mrg class = prom_getpropstring(fa->fa_node, "device_type");
140 1.1 mrg if (*class != '\0')
141 1.1 mrg printf(" class %s", class);
142 1.1 mrg }
143 1.1 mrg return (UNCONF);
144 1.1 mrg }
145 1.1 mrg
146 1.1 mrg int
147 1.1 mrg fhc_get_string(int node, const char *name, char **buf)
148 1.1 mrg {
149 1.1 mrg int len;
150 1.1 mrg
151 1.1 mrg len = prom_getproplen(node, name);
152 1.1 mrg if (len < 0)
153 1.1 mrg return (len);
154 1.1 mrg *buf = (char *)malloc(len + 1, M_DEVBUF, M_NOWAIT);
155 1.1 mrg if (*buf == NULL)
156 1.1 mrg return (-1);
157 1.1 mrg
158 1.1 mrg if (len != 0)
159 1.1 mrg prom_getpropstringA(node, name, *buf, len + 1);
160 1.1 mrg (*buf)[len] = '\0';
161 1.1 mrg return (0);
162 1.1 mrg }
163 1.1 mrg
164 1.1 mrg bus_space_tag_t
165 1.1 mrg fhc_alloc_bus_tag(struct fhc_softc *sc)
166 1.1 mrg {
167 1.1 mrg struct sparc_bus_space_tag *bt;
168 1.1 mrg
169 1.1 mrg bt = malloc(sizeof(*bt), M_DEVBUF, M_NOWAIT | M_ZERO);
170 1.1 mrg if (bt == NULL)
171 1.1 mrg panic("fhc: couldn't alloc bus tag");
172 1.1 mrg
173 1.1 mrg bt->cookie = sc;
174 1.1 mrg bt->parent = sc->sc_bt;
175 1.1 mrg bt->type = 0; /* XXX asi? */
176 1.1 mrg bt->sparc_bus_map = _fhc_bus_map;
177 1.1 mrg /* XXX bt->sparc_bus_mmap = fhc_bus_mmap; */
178 1.1 mrg bt->sparc_intr_establish = fhc_intr_establish;
179 1.1 mrg return (bt);
180 1.1 mrg }
181 1.1 mrg
182 1.1 mrg int
183 1.1 mrg _fhc_bus_map(bus_space_tag_t t, bus_addr_t addr, bus_size_t size,
184 1.1 mrg int flags, vaddr_t unused, bus_space_handle_t *hp)
185 1.1 mrg {
186 1.1 mrg struct fhc_softc *sc = t->cookie;
187 1.1 mrg int64_t slot = BUS_ADDR_IOSPACE(addr);
188 1.1 mrg int64_t offset = BUS_ADDR_PADDR(addr);
189 1.1 mrg int i;
190 1.1 mrg
191 1.1 mrg if (t->parent == NULL || t->parent->sparc_bus_map == NULL) {
192 1.1 mrg printf("\n_fhc_bus_map: invalid parent");
193 1.1 mrg return (EINVAL);
194 1.1 mrg }
195 1.1 mrg
196 1.1 mrg for (i = 0; i < sc->sc_nrange; i++) {
197 1.1 mrg bus_addr_t paddr;
198 1.1 mrg
199 1.1 mrg if (sc->sc_range[i].cspace != slot)
200 1.1 mrg continue;
201 1.1 mrg
202 1.1 mrg paddr = offset - sc->sc_range[i].coffset;
203 1.1 mrg paddr += sc->sc_range[i].poffset;
204 1.1 mrg paddr |= ((bus_addr_t)sc->sc_range[i].pspace << 32);
205 1.1 mrg
206 1.1 mrg return bus_space_map(t->parent, paddr, size, flags, hp);
207 1.1 mrg }
208 1.1 mrg
209 1.1 mrg return (EINVAL);
210 1.1 mrg }
211 1.1 mrg
212 1.1 mrg bus_space_handle_t *
213 1.1 mrg fhc_find_intr_handle(struct fhc_softc *sc, int ino)
214 1.1 mrg {
215 1.1 mrg switch (FHC_INO(ino)) {
216 1.1 mrg case FHC_F_INO:
217 1.1 mrg return &sc->sc_freg;
218 1.1 mrg case FHC_S_INO:
219 1.1 mrg return &sc->sc_sreg;
220 1.1 mrg case FHC_U_INO:
221 1.1 mrg return &sc->sc_ureg;
222 1.1 mrg case FHC_T_INO:
223 1.1 mrg return &sc->sc_treg;
224 1.1 mrg default:
225 1.1 mrg break;
226 1.1 mrg }
227 1.1 mrg
228 1.1 mrg return (NULL);
229 1.1 mrg }
230 1.1 mrg
231 1.1 mrg void *
232 1.1 mrg fhc_intr_establish(bus_space_tag_t t, int ihandle, int level,
233 1.1 mrg int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */)
234 1.1 mrg {
235 1.1 mrg struct fhc_softc *sc = t->cookie;
236 1.1 mrg volatile u_int64_t *intrmapptr = NULL, *intrclrptr = NULL;
237 1.1 mrg struct intrhand *ih;
238 1.1 mrg long vec;
239 1.1 mrg bus_space_handle_t *hp;
240 1.1 mrg struct fhc_intr_reg *intrregs;
241 1.1 mrg
242 1.1 mrg hp = fhc_find_intr_handle(sc, ihandle);
243 1.1 mrg if (hp == NULL) {
244 1.1 mrg printf(": can't find intr handle\n");
245 1.1 mrg return (NULL);
246 1.1 mrg }
247 1.1 mrg
248 1.1 mrg intrregs = bus_space_vaddr(sc->sc_bt, *hp);
249 1.1 mrg intrmapptr = &intrregs->imap;
250 1.1 mrg intrclrptr = &intrregs->iclr;
251 1.1 mrg vec = ((sc->sc_ign << INTMAP_IGN_SHIFT) & INTMAP_IGN) |
252 1.1 mrg INTINO(ihandle);
253 1.1 mrg
254 1.4 palle ih = intrhand_alloc();
255 1.1 mrg
256 1.1 mrg ih->ih_ivec = ihandle;
257 1.1 mrg
258 1.1 mrg /* Register the map and clear intr registers */
259 1.1 mrg ih->ih_map = intrmapptr;
260 1.1 mrg ih->ih_clr = intrclrptr;
261 1.1 mrg
262 1.1 mrg ih->ih_fun = handler;
263 1.1 mrg ih->ih_arg = arg;
264 1.1 mrg ih->ih_pil = level;
265 1.1 mrg ih->ih_number = vec;
266 1.1 mrg
267 1.1 mrg intr_establish(ih->ih_pil, level != IPL_VM, ih);
268 1.1 mrg
269 1.1 mrg /*
270 1.1 mrg * XXXX --- we really should use bus_space for this.
271 1.1 mrg */
272 1.1 mrg if (intrmapptr != NULL) {
273 1.1 mrg u_int64_t r;
274 1.1 mrg
275 1.1 mrg r = *intrmapptr;
276 1.2 jdc r |= INTMAP_V | (CPU_UPAID << INTMAP_TID_SHIFT);
277 1.1 mrg *intrmapptr = r;
278 1.1 mrg r = *intrmapptr;
279 1.1 mrg ih->ih_number |= r & INTMAP_INR;
280 1.1 mrg }
281 1.1 mrg
282 1.1 mrg return (ih);
283 1.1 mrg }
284