iommu.c revision 1.1
1 /* $NetBSD: iommu.c,v 1.1 1999/06/04 13:48:48 mrg Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1992, 1993 41 * The Regents of the University of California. All rights reserved. 42 * 43 * This software was developed by the Computer Systems Engineering group 44 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 45 * contributed to Berkeley. 46 * 47 * All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by the University of 50 * California, Lawrence Berkeley Laboratory. 51 * 52 * Redistribution and use in source and binary forms, with or without 53 * modification, are permitted provided that the following conditions 54 * are met: 55 * 1. Redistributions of source code must retain the above copyright 56 * notice, this list of conditions and the following disclaimer. 57 * 2. Redistributions in binary form must reproduce the above copyright 58 * notice, this list of conditions and the following disclaimer in the 59 * documentation and/or other materials provided with the distribution. 60 * 3. All advertising materials mentioning features or use of this software 61 * must display the following acknowledgement: 62 * This product includes software developed by the University of 63 * California, Berkeley and its contributors. 64 * 4. Neither the name of the University nor the names of its contributors 65 * may be used to endorse or promote products derived from this software 66 * without specific prior written permission. 67 * 68 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 69 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 70 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 71 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 72 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 73 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 74 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 75 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 76 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 77 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 78 * SUCH DAMAGE. 79 * 80 * from: NetBSD: sbus.c,v 1.13 1999/05/23 07:24:02 mrg Exp 81 * from: @(#)sbus.c 8.1 (Berkeley) 6/11/93 82 */ 83 84 #include <sys/param.h> 85 #include <sys/extent.h> 86 #include <sys/malloc.h> 87 #include <sys/systm.h> 88 #include <sys/device.h> 89 #include <vm/vm.h> 90 91 #include <machine/bus.h> 92 #include <sparc64/sparc64/vaddrs.h> 93 #include <sparc64/dev/iommureg.h> 94 #include <sparc64/dev/iommuvar.h> 95 96 #include <machine/autoconf.h> 97 #include <machine/ctlreg.h> 98 #include <machine/cpu.h> 99 100 #ifdef DEBUG 101 #define IDB_DVMA 0x1 102 #define IDB_INTR 0x2 103 int iommudebug = 0; 104 #endif 105 106 /* 107 * initialise the UltraSPARC IOMMU (SBUS or PCI): 108 * - allocate and setup the iotsb. 109 * - enable the IOMMU 110 * - initialise the streaming buffers 111 * - create a private DVMA map. 112 * 113 */ 114 void 115 iommu_init(name, is, tsbsize) 116 char *name; 117 struct iommu_state *is; 118 int tsbsize; 119 { 120 121 /* 122 * Setup the iommu. 123 * 124 * The sun4u iommu is part of the SBUS controller so we will 125 * deal with it here. We could try to fake a device node so 126 * we can eventually share it with the PCI bus run by psycho, 127 * but I don't want to get into that sort of cruft. 128 * 129 * First we need to allocate a IOTSB. Problem is that the IOMMU 130 * can only access the IOTSB by physical address, so all the 131 * pages must be contiguous. Luckily, the smallest IOTSB size 132 * is one 8K page. 133 */ 134 if (tsbsize != 0) 135 panic("tsbsize != 0; FIX ME"); /* XXX */ 136 137 /* we want 8K pages */ 138 is->is_cr = IOMMUCR_8KPG | IOMMUCR_EN; 139 140 /* set the tsbsize and get the dvmabase */ 141 switch (tsbsize) { 142 case 0: 143 is->is_dvmabase = 0x1fffffff; 144 is->is_cr |= IOMMUCR_TSB1K; 145 break; 146 147 #if 0 148 /* XXX are these right? got the values from the linux driver */ 149 case 1: 150 is->is_dvmabase = 0x3fffffff; 151 is->is_cr |= IOMMUCR_TSB2K; 152 break; 153 154 case 2: 155 is->is_dvmabase = 0x7fffffff; 156 is->is_cr |= IOMMUCR_TSB4K; 157 break; 158 #endif 159 160 default: 161 panic("unknown tsbsize, fix me"); 162 } 163 164 is->is_tsbsize = tsbsize; 165 is->is_tsb = malloc(NBPG, M_DMAMAP, M_WAITOK); /* XXX */ 166 is->is_ptsb = pmap_extract(pmap_kernel(), (vaddr_t)is->is_tsb); 167 168 #ifdef DEBUG 169 if (iommudebug & IDB_DVMA) 170 { 171 /* Probe the iommu */ 172 struct iommureg *regs = is->is_iommu; 173 int64_t cr, tsb; 174 175 printf("iommu regs at: cr=%lx tsb=%lx flush=%lx\n", ®s->iommu_cr, 176 ®s->iommu_tsb, ®s->iommu_flush); 177 cr = regs->iommu_cr; 178 tsb = regs->iommu_tsb; 179 printf("iommu cr=%lx tsb=%lx\n", (long)cr, (long)tsb); 180 printf("TSB base %p phys %p\n", (long)is->is_tsb, (long)is->is_ptsb); 181 delay(1000000); /* 1 s */ 182 } 183 #endif 184 185 /* 186 * Initialize streaming buffer. 187 */ 188 is->is_flushpa = pmap_extract(pmap_kernel(), (vaddr_t)&is->is_flush); 189 190 /* 191 * now actually start up the IOMMU 192 */ 193 iommu_reset(is); 194 195 /* 196 * Now all the hardware's working we need to allocate a dvma map. 197 * 198 * The IOMMU address space always ends at 0xffffe000, but the starting 199 * address depends on the size of the map. The map size is 1024 * 2 ^ 200 * is->is_tsbsize entries, where each entry is 8 bytes. The start of 201 * the map can be calculated by (0xffffe000 << (8 + is->is_tsbsize)). 202 * 203 * Note: the stupid IOMMU ignores the high bits of an address, so a 204 * NULL DMA pointer will be translated by the first page of the IOTSB. 205 * To trap bugs we'll skip the first entry in the IOTSB. 206 */ 207 is->is_dvmamap = extent_create(name, 208 IOTSB_VSTART(is->is_tsbsize) + NBPG, IOTSB_VEND, 209 M_DEVBUF, 0, 0, EX_NOWAIT); 210 } 211 212 void 213 iommu_reset(is) 214 struct iommu_state *is; 215 { 216 217 /* Need to do 64-bit stores */ 218 bus_space_write_8(is->is_bustag, &is->is_iommu->iommu_cr, 0, is->is_cr); 219 bus_space_write_8(is->is_bustag, &is->is_iommu->iommu_tsb, 0, is->is_ptsb); 220 /* Enable diagnostics mode? */ 221 bus_space_write_8(is->is_bustag, &is->is_sb->strbuf_ctl, 0, STRBUF_EN); 222 } 223
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